usb: dwc3: Add workaround for isoc start transfer failure
PATCH v4 13/15 usb: dwc3: Add workaround for isoc start transfer failure
Hi,
Quoted 31 lines · Thinh Nguyen
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Thank you for reviewing the patches. I'll make the change to this patch for the next merge window. However, can you cherry-pick the other patches in this series for this merge window? If they also need more work, please let me know.
I don't think it makes sense to pick the others without this, specially since you're touching usb core on patch 2 and I can't apply that. I did, however, take Mass Storage patch setting its max speed to SSP.
The patch to the usb core is unrelated to this workaround. Only 3 of the patches are related to the workaround. Other updates are independent of it. The ones that are related are marked with 'X' in the list below:
Thinh Nguyen (15):
usb: dwc3: Add SoftReset PHY synchonization delay
usb: core: urb: Check SSP isoc ep comp descriptor
usb: dwc3: UpdateDWC_usb31GTXFIFOSIZ reg fields
usb: dwc3: Check IP revision for GTXFIFOSIZ
usb: dwc3: AddDWC_usb31GRXTHRCFG bit fields
usb: dwc3: gadget: Check IP revision for GRXTHRCFG
usb: dwc3: AddDWC_usb31GTXTHRCFG reg fields
usb: dwc3: Make TX/RX threshold configurable
usb: dwc3: Check for ESS TX/RX threshold config
usb: dwc3: Dump LSP and BMU debug info
X usb: dwc3: TrackDWC_usb31VERSIONTYPE
X usb: dwc3: Add disabling ofstart_transferfailure quirk X usb: dwc3: Add workaround for isoc start transfer failure
usb: dwc3: Check controller type before setting speed
usb: gadget:mass_storage: Setmax_speedto SSP
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It would be great if you can apply them this merge window.
in that case, please rebase only needed patches on top of testing/next and resend. usb: core change should be done separately and sent to Greg as a separate patch, not part of this series.