cpufreq on Pentium M

Hello,

I am running on a Thinkpad T40p laptop, which has a 1.6GHz Intel Pentium M CPU (this is their "Centrino" CPU; *NOT* the same thing as the Pentium 4 M).

I have tried 2.4.21-rc7-ac1, but it reports:

cpufreq: Intel(R) SpeedStep(TM) for this chipset not (yet) available.

Yet my BIOS lets me configure SpeedStep for it by name. Are there any plans in the works for this?

While we're at it, I'm concerned that Linux is ignoring the sizable cache available on this platform:

$ cat /proc/cpuinfo
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 9
model name      : Intel(R) Pentium(R) M processor 1600MHz
stepping        : 5
cpu MHz         : 1598.686
cache size      : 0 KB
fdiv_bug        : no
hlt_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr mce cx8 sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 tm
bogomips        : 3191.60

Stay tuned. Jeremy Fitzhardinge wrote a driver for centrino style speedstep. It's currently getting the kinks worked out on the cpufreq list. It should turn up in 2.5 sometime real soon, and at some point, maybe someone will backport it.

Looks like missing cache descriptors. Grab x86info[1] and mail me the output of x86info -c

Dave

[1] http://www.codemonkey.org.uk/x86info/

Citat Dave Jones <[email protected]>:

Got the same thing here on a Dell Latitude D600

processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 9
model name : Intel(R) Pentium(R) M processor 1600MHz
stepping : 5
cpu MHz : 1594.855
cache size : 0 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr mce cx8 sep mtrr pge mca cmov pat clflush dts
acpi mmx fxsr sse sse2 tm
bogomips : 3185.04

x86info will follow (just want to upgrade my kernel first, the thing is on 2.4.21-rc2-ac2 now)

Regards,
Martin List-Petersen
martin at list-petersen dot dk
--
Talkers are no good doers.
-- William Shakespeare, "Henry VI"

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Thought this may help:
- From a Dell D600 w/ 1.6Ghz Pentium M cpu...

Mark.

cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 9
model name : Intel(R) Pentium(R) M processor 1600MHz
stepping : 5
cpu MHz : 1598.671
cache size : 0 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr mce cx8 sep mtrr pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 tm
bogomips : 3191.60

x86info v1.11. Dave Jones 2001, 2002
Feedback to <[email protected]>.

Found 1 CPU
eax in: 0x00000000, eax = 00000002 ebx = 756e6547 ecx = 6c65746e edx = 49656e69 eax in: 0x00000001, eax = 00000695 ebx = 00000816 ecx = 00000180 edx = a7e9f9bf eax in: 0x00000002, eax = 02b3b001 ebx = 00000000 ecx = 00000000 edx = 2c043087

eax in: 0x80000000, eax = 80000004 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000001, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000002, eax = 20202020 ebx = 20202020 ecx = 65746e49 edx = 2952286c eax in: 0x80000003, eax = 6e655020 ebx = 6d756974 ecx = 20295228 edx = 7270204d eax in: 0x80000004, eax = 7365636f ebx = 20726f73 ecx = 30303631 edx = 007a484d

Family: 6 Model: 9 Stepping: 5 Type: 0
CPU Model: Unknown CPU Original OEM
Feature flags:
Onboard FPU
Virtual Mode Extensions
Debugging Extensions
Page Size Extensions
Time Stamp Counter
Model-Specific Registers
Machine Check Architecture
CMPXCHG8 instruction
SYSENTER/SYSEXIT
Memory Type Range Registers
Page Global Enable
Machine Check Architecture
CMOV instruction
Page Attribute Table
CLFLUSH instruction
Debug Trace Store
ACPI via MSR
MMX support
FXSAVE and FXRESTORE instructions
SSE support
SSE2 support
Automatic clock Control
Pending Break Enable

unknown TLB/cache descriptor:

        0xb0
unknown TLB/cache descriptor:
        0xb3
Instruction TLB: 4MB pages, fully associative, 2 entries
unknown TLB/cache descriptor:
        0x87
unknown TLB/cache descriptor:
        0x30
Data TLB: 4MB pages, 4-way associative, 8 entries
unknown TLB/cache descriptor:
        0x2c

/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device

MTRR registers:
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
/dev/cpu/0/msr: No such device
MTRRcap (0xfe): MTRRphysBase0 (0x200): MTRRphysMask0 (0x201): MTRRphysBase1 (0x202): MTRRphysMask1 (0x203): MTRRphysBase2 (0x204): MTRRphysMask2 (0x205): MTRRphysBase3 (0x206): MTRRphysMask3 (0x207): MTRRphysBase4 (0x208): MTRRphysMask4 (0x209): MTRRphysBase5 (0x20a): MTRRphysMask5 (0x20b): MTRRphysBase6 (0x20c): MTRRphysMask6 (0x20d): MTRRphysBase7 (0x20e): MTRRphysMask7 (0x20f): MTRRfix64K_00000 (0x250): MTRRfix16K_80000 (0x258): MTRRfix16K_A0000 (0x259): MTRRfix4K_C8000 (0x269): MTRRfix4K_D0000 0x26a: MTRRfix4K_D8000 0x26b: MTRRfix4K_E0000 0x26c: MTRRfix4K_E8000 0x26d: MTRRfix4K_F0000 0x26e: MTRRfix4K_F8000 0x26f: MTRRdefType (0x2ff):

1598.66 MHz processor (estimate).

- --
Mark Watts
Systems Engineer
QinetiQ TIM
St Andrews Road, Malvern
GPG Public Key ID: 455420ED

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Yep, the latest bunch of cache descriptors are missing from 2.4 (They're in 2.5 already). I did send these to Marcelo, but they seem to have got lost when we entered -rc stage.
I'll resend them for 2.4.22pre

uninteresting (tlb sizes)

1MB l2 unified cache.

32KB L1 I cache

32KB L1 D cache

Current CVS version of x86info already supports all these too btw, (just in case someone was tempted to hack a patch for that against 1.11). I'll do another release sometime this weekend.

Dave

I do hope so. I can be a risk taker but I've learned that running a development kernel on a laptop does not make for a good travel experience. (When you've got no 'net connection and no backup device handy, getting the latest patch for the IDE driver isn't fun <g>)

Here ya go:

heinrich:~# x86info -c
x86info v1.11.  Dave Jones 2001, 2002
Feedback to <[email protected]>.

Found 1 CPU
Family: 6 Model: 9 Stepping: 5 Type: 0
CPU Model: Unknown CPU Original OEM
unknown TLB/cache descriptor:

        0xb0
unknown TLB/cache descriptor:
        0xb3
Instruction TLB: 4MB pages, fully associative, 2 entries
unknown TLB/cache descriptor:
        0x87
unknown TLB/cache descriptor:
        0x30
Data TLB: 4MB pages, 4-way associative, 8 entries
unknown TLB/cache descriptor:
        0x2c

Is it already too late for 2.4.21rc?

Then i don't need to resend this, i assume :)

Regards,
Martin List-Petersen
martin at list-petersen dot dk
--
Have at you!

Yes. Exactly the same thing happened for .20rc, but with different descriptors. Despite the change being so harmless its almost in the 'nothing can possibly go wrong' zone, Marcelo wanted to hold back.

Dave

For info folks, I've now had a dozen or so mails with the same cache descriptors. Please don't send me any more centrino based outputs, I have plenty now, thanks 8-)

Dave