Honour current_tc for MIPS M{T,F}{HI,LO}

I noticed while working on something else that the MIPS muldiv code is careful to store in {HI,LO}[current_tc] but that the M{F,T}{HI,LO} code always uses {HI,LO}[0]. I realise we don't really support MT yet, but I thought I might as well have a stab at "fixing" it.

Following the current use of "current_tc_gprs", the patch introduces a new TCG global, "current_tc_hi", to point at the current thread context's HI array. This is good for accessing LO as well, and could be used for ACX in future.

HI and LO accesses are now more complicated than they were when the gen_{load,store}_{HI,LO} accessor functions were removed, so I've added them back. I also added an accumulator register parameter, ready for any future DSP support.

This might well not seem like the right approach, or it might interfere with a longer-term plan. If so, I apologise; please feel free to ignore. ;)

Richard

Index: qemu/target-mips/cpu.h
===================================================================
@@ -159,6 +159,7 @@ struct CPUMIPSState {
     CPUMIPSFPUContext *fpu;
     uint32_t current_tc;
     target_ulong *current_tc_gprs;
+    target_ulong *current_tc_hi;
 
     uint32_t SEGBITS;
     target_ulong SEGMask;

Index: qemu/target-mips/translate_init.c
===================================================================
@@ -547,6 +547,7 @@ static int cpu_mips_register (CPUMIPSSta
     env->CP0_SRSCtl = def->CP0_SRSCtl;
     env->current_tc = 0;
     env->current_tc_gprs = &env->gpr[env->current_tc][0];
+    env->current_tc_hi = &env->HI[env->current_tc][0];
     env->SEGBITS = def->SEGBITS;
     env->SEGMask = (target_ulong)((1ULL << def->SEGBITS) - 1);
 #if defined(TARGET_MIPS64)