standard SCI support

PATCH New Yoshinori Sato 2 participants 2 messages Mar 2, 2011 – Mar 7, 2011

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Yoshinori Sato

author

2011-03-02 07:40 UTC #0 lore raw

PATCH 4/5 standard SCI support

h8300 have simlar sh serial I/F.
It without FIFO.
This changes support of no FIFO.

Signed-off-by Yoshinori Sato <[email protected]>

---
 drivers/serial/serial_sh.c |   74 +++++++++++++++++++++++++++++++---
 drivers/serial/serial_sh.h |   93 +++++++++++++++-----------------------------
 2 files changed, 98 insertions(+), 69 deletions(-)

drivers/serial/serial_sh.c +67 -7

index fcf69ab..b6c800d 100644
@@ -39,18 +39,73 @@
 # error "Default SCIF doesn't set....."
 #endif
 
-#if defined(CONFIG_SCIF_A)
-	#define SCIF_BASE_PORT	PORT_SCIFA
+#if defined(CONFIG_SCI)
+# define PORT_TYPE	PORT_SCI
+#elif defined(CONFIG_SCIF_A)
+# define PORT_TYPE	PORT_SCIFA
 #else
-	#define SCIF_BASE_PORT	PORT_SCIF
+# define PORT_TYPE	PORT_SCIF
 #endif
 
 static struct uart_port sh_sci = {
 	.membase	= (unsigned char*)SCIF_BASE,
 	.mapbase	= SCIF_BASE,
-	.type		= SCIF_BASE_PORT,
+	.type		= PORT_TYPE,
 };
 
+/* TDRE / RDRF emulation for RX610 */
+/* RX610's SCI don't have TDRE and RDRF in SSR
+   This part emulate these flags of IR */
+#if defined(CONFIG_CPU_RX610)
+
+#define port_to_irq(port) ((((port)->mapbase - 0x88240) / 8) + 214)
+#define read_ir(irq) __raw_readb((unsigned char *)(0x00087000 + (irq)))
+#define clear_ir(irq) __raw_writeb(0, (unsigned char *)(0x00087000 + (irq)))
+
+#define write_ier(flg, irq)			\
+do { \
+	unsigned char ier = __raw_readb((unsigned char *)(0x00087200 + ((irq) >> 3))); \
+	ier &= ~(1 << ((irq) & 7));					\
+	if (flg) \
+		ier |= (1 << ((irq) & 7));			       \
+	__raw_writeb(ier, (unsigned char *)(0x00087200 + ((irq) >> 3))); \
+} while(0)
+
+
+static unsigned int sci_SCxSR_in(struct uart_port *port)
+{
+	int irq = port_to_irq(port);
+	unsigned char ssr;
+	ssr = __raw_readb(port->membase + 4);
+	ssr &= ~0xc0;
+	/* map to RXI -> RDRF and TXI -> TDRE */
+	ssr |= read_ir(irq + 1) << 6 | read_ir(irq + 2) << 7;
+	return ssr;
+}
+
+static void sci_SCxSR_out(struct uart_port *port, unsigned int value)
+{
+	int irq = port_to_irq(port);
+	/* clear ir */
+	if ((value & 0x84) != 0x84)
+		clear_ir(irq + 2);
+	if ((value & 0x40) == 0)
+		clear_ir(irq + 1);
+	value |= 0xc0;		/* b7 and b6 is always 1 */
+	value &= ~0x01;		/* b0 is always 0 */
+	__raw_writeb(value, port->membase + 4);
+}
+
+static void sci_SCSCR_out(struct uart_port *port, unsigned int value)
+{
+	int irq = port_to_irq(port);
+	write_ier(value & 0x40, irq + 1);
+	write_ier(value & 0x80, irq + 2);
+	/* TXI and RXI always enabled */
+	__raw_writeb(value | 0xc0, port->membase + 2);
+}
+#endif
+
 void serial_setbrg(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;

@@ -99,6 +154,11 @@ static int scif_rxfill(struct uart_port *port)
 	else
 		return sci_in(port, SCRFDR);
 }
+#elif defined(CONFIG_SCI)
+static int scif_rxfill(struct uart_port *port)
+{
+	return (sci_in(port, SCxSR) & SCxSR_RDxF(port))?1:0;
+}
 #else
 static int scif_rxfill(struct uart_port *port)
 {

@@ -115,12 +175,12 @@ void serial_raw_putc(const char c)
 {
 	while (1) {
 		/* Tx fifo is empty */
-		if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci))
+		if (sci_in(&sh_sci, SCxSR) & SCxSR_TXRDY(&sh_sci))
 			break;
 	}
 
 	sci_out(&sh_sci, SCxTDR, c);
-	sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci));
+	sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TXRDY(&sh_sci));
 }
 
 void serial_putc(const char c)

@@ -156,7 +216,7 @@ int serial_getc_check(void)
 
 	status = sci_in(&sh_sci, SCxSR);
 
-	if (status & SCIF_ERRORS)
+	if (status & SCxSR_ERRORS(&sh_sci))
 		handle_error();
 	if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
 		handle_error();

drivers/serial/serial_sh.h +31 ~~-62~~

163 lines not on this page · raw message

Signature · 1 line

1.7.2.3

Nobuhiro Iwamatsu

2011-03-07 01:21 UTC #1 lore raw

PATCH 4/5 standard SCI support

Hi,

2011/3/2 Yoshinori Sato <[email protected]>:

Quoted 41 lines

h8300 have simlar sh serial I/F.
It without FIFO.
This changes support of no FIFO.
Signed-off-by Yoshinori Sato <[email protected]>
---
?drivers/serial/serial_sh.c | ? 74 +++++++++++++++++++++++++++++++--- ?drivers/serial/serial_sh.h | ? 93 +++++++++++++++----------------------------- ?2 files changed, 98 insertions(+), 69 deletions(-)
drivers/serial/serial_sh.c +0 -0
index fcf69ab..b6c800d 100644
@@ -39,18 +39,73 @@
?# error "Default SCIF doesn't set....."
?#endif
drivers/serial/serial_sh.c +4 -2
-#if defined(CONFIG_SCIF_A)
- ? ? ? #define SCIF_BASE_PORT ?PORT_SCIFA
+#if defined(CONFIG_SCI)
+# define PORT_TYPE ? ? PORT_SCI
+#elif defined(CONFIG_SCIF_A)
+# define PORT_TYPE ? ? PORT_SCIFA
?#else
- ? ? ? #define SCIF_BASE_PORT ?PORT_SCIF
+# define PORT_TYPE ? ? PORT_SCIF
?#endif
?static struct uart_port sh_sci = {
? ? ? ?.membase ? ? ? ?= (unsigned char*)SCIF_BASE, ? ? ? ?.mapbase ? ? ? ?= SCIF_BASE,
- ? ? ? .type ? ? ? ? ? = SCIF_BASE_PORT,
+ ? ? ? .type ? ? ? ? ? = PORT_TYPE,
?};
drivers/serial/serial_sh.c +5 -0
+/* TDRE / RDRF emulation for RX610 */
+/* RX610's SCI don't have TDRE and RDRF in SSR
+ ? This part emulate these flags of IR */
+#if defined(CONFIG_CPU_RX610)
+

<snip>

Quoted 12 lines

drivers/serial/serial_sh.c +9 -0

+#elif defined(CONFIG_RX)
+# define SCSPTR0 0x00088240 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSPTR1 0x00088248 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSPTR2 0x00088250 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSPTR3 0x00088258 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSPTR4 0x00088260 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSPTR5 0x00088268 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSPTR6 0x00088270 ? ? ? ? ? ?/* 8 bit SCI */
+# define SCSCR_INIT(port) ? ? ?0x38 ? ?/* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */

?#else
?# error CPU subtype not defined
?#endif

<snip>

Quoted 9 lines

drivers/serial/serial_sh.c +0 -0
@@ -437,7 +449,7 @@ static inline void sci_##name##_out(struct uart_port *port,\
 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?sh4_scif_offset, sh4_scif_size) \
 ? ? ? ?CPU_SCIF_FNS(name, sh3_scif_offset, sh3_scif_size)
?#endif
drivers/serial/serial_sh.c +1 -1
-#elif defined(__H8300H__) || defined(__H8300S__)
+#elif defined(CONFIG_H8300) || defined(CONFIG_RX)
?#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?sh4_sci_offset, sh4_sci_size, \
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?sh3_scif_offset, sh3_scif_size,\

<snip>

drivers/serial/serial_sh.c SCIF_FNS(SCLSR, ? ? ? ? ? ? ? ? ? ? ? ? 0, ?0, 0x24, 16)

Quoted 15 lines

drivers/serial/serial_sh.c +7 -0

@@ -512,6 +524,13 @@ SCIF_FNS(SCFER, ?0x10, 16)
 ?SCIF_FNS(SCFCR, ?0x18, 16)
 ?SCIF_FNS(SCFDR, ?0x1c, 16)
 ?SCIF_FNS(SCLSR, ?0x24, 16)
+#elif defined(CONFIG_CPU_RX610)
+SCIx_FNS(SCSMR, ?0x00, ?8, 0x00, ?8, 0x00, ?8, 0x00, 16, 0x00, ?8)
+SCIx_FNS(SCBRR, ?0x02, ?8, 0x04, ?8, 0x02, ?8, 0x04, ?8, 0x01, ?8)
+SCIx_FNS(SCxTDR, 0x06, ?8, 0x0c, ?8, 0x06, ?8, 0x0C, ?8, 0x03, ?8)
+SCIx_FNS(SCxRDR, 0x0a, ?8, 0x14, ?8, 0x0A, ?8, 0x14, ?8, 0x05, ?8)
+SCIF_FNS(SCFCR, ? ? ? ? ? ? ? ? ? ? ?0x0c, ?8, 0x18, 16)
+SCIF_FNS(SCLSR, ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?0, ?0, 0x28, 16)

?#else
?/* ? ? ?reg ? ? ?SCI/SH3 ? SCI/SH4 ?SCIF/SH3 ? SCIF/SH4 ?SCI/H8*/ ?/* ? ? ?name ? ? off ?sz ? off ?sz ? off ?sz ? off ?sz ? off ?sz*/

drivers/serial/serial_sh.c +0 -0

@@ -552,48 +571,6 @@ SCIF_FNS(SCLSR, ? ? ? ? ? ? ? ? ? ? ? ? 0, ?0, 0x24, 16)

Why do you use CPU_RX610 and CONFIG_RX ?
Is these necessary for support of H8300 support?

Best regards,
Nobuhiro

Signature · 3 lines

Nobuhiro Iwamatsu
?? iwamatsu at {nigauri.org / debian.org}
?? GPG ID: 40AD1FA6