interrupt latency/700microsecs
On kernel 2.4.7, AMDK6 @ 450MHz processor, is it possible to get latency fluctuations of upto 700microsecs for running the timer interrupt, due to interrupts being disabled ?
I am using the time stamp counter and reading it at the start of the timer interrupt and measuring the cycles elapsed between two inovocations of it. The number of cycles elapsed is ~4500225, but sometimes it increases to as high as 4848032. Can i conclude that this difference is due to interrupts being disabled in critical sections ? ( I think i am making some mistake :-)
- sangam
Quoted 8 lines · Muthal Sangam
On kernel 2.4.7, AMDK6 @ 450MHz processor, is it possible to get latency fluctuations of upto 700microsecs for running the timer interrupt, due to interrupts being disabled ?
I am using the time stamp counter and reading it at the start of the timer interrupt and measuring the cycles elapsed between two inovocations of it. The number of cycles elapsed is ~4500225, but sometimes it increases to as high as 4848032. Can i conclude that this difference is due to interrupts being disabled in critical sections ? ( I think i am making some mistake :-)
IIRC there have been prior reports of excessive interrupt disablement in 2.4.x, and also IIRC it was reported against a more recent kernel. I think it was suspected there are bug(s) where some code is leaving interrupts off and someone later unconditionally turns them back on.
Any chance you could upgrade to a more recent kernel and try to reproduce there? There have been a number of critical bugfixes since 2.4.7 (and although none are particularly pertinent to this issue, people would probably rather field bug reports for 2.4.19-pre* than 2.4.7).
Cheers,
Bill
Quoted 9 lines · Muthal Sangam
On kernel 2.4.7, AMDK6 @ 450MHz processor, is it possible to get latency fluctuations of upto 700microsecs for running the timer interrupt, due to interrupts being disabled ?
I am using the time stamp counter and reading it at the start of the timer interrupt and measuring the cycles elapsed between two inovocations of it. The number of cycles elapsed is ~4500225, but sometimes it increases to as high as 4848032. Can i conclude that this difference is due to interrupts being disabled in critical sections ? ( I think i am making some mistake :-)
In X with a matrox G200 I've observed processor stalls in excess of 1mS so Im not actually much suprised.