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net: sparx5: phylink validate implementation updates

PATCH Applied Russell King (Oracle) 3 participants 5 messages Nov 16, 2021 – Nov 17, 2021

Subsystems (3)
Networking Network drivers Arm/Microchip Sparx5 SoC support
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Russell King (Oracle)

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#0 lore raw

cover net: sparx5: phylink validate implementation updates

Hi,

This series converts sparx5 to fill in the supported_interfaces member of phylink_config, cleans up the validate() implementation, and then converts to phylink_generic_validate().

 .../net/ethernet/microchip/sparx5/sparx5_main.c    | 27 ++++++++
 .../net/ethernet/microchip/sparx5/sparx5_phylink.c | 75 +---------------------
 2 files changed, 28 insertions(+), 74 deletions(-)
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#1 lore raw

PATCH 1/3 net: sparx5: populate supported_interfaces member

Populate the phy_interface_t bitmap for the Microchip Sparx5 driver with interfaces modes supported by the MAC.

Signed-off-by Russell King (Oracle) <[email protected]>
---
 .../ethernet/microchip/sparx5/sparx5_main.c   | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)
drivers/net/ethernet/microchip/sparx5/sparx5_main.c +24 -0
index 4625d4fb4cde..3cb6c1fe43ff 100644
@@ -293,6 +293,30 @@ static int sparx5_create_port(struct sparx5 *sparx5,
 	spx5_port->phylink_config.type = PHYLINK_NETDEV;
 	spx5_port->phylink_config.pcs_poll = true;
 
+	__set_bit(PHY_INTERFACE_MODE_SGMII,
+		  spx5_port->phylink_config.supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_QSGMII,
+		  spx5_port->phylink_config.supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_1000BASEX,
+		  spx5_port->phylink_config.supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_2500BASEX,
+		  spx5_port->phylink_config.supported_interfaces);
+
+	if (spx5_port->conf.bandwidth == SPEED_5000 ||
+	    spx5_port->conf.bandwidth == SPEED_10000 ||
+	    spx5_port->conf.bandwidth == SPEED_25000)
+		__set_bit(PHY_INTERFACE_MODE_5GBASER,
+			  spx5_port->phylink_config.supported_interfaces);
+
+	if (spx5_port->conf.bandwidth == SPEED_10000 ||
+	    spx5_port->conf.bandwidth == SPEED_25000)
+		__set_bit(PHY_INTERFACE_MODE_10GBASER,
+			  spx5_port->phylink_config.supported_interfaces);
+
+	if (spx5_port->conf.bandwidth == SPEED_25000)
+		__set_bit(PHY_INTERFACE_MODE_25GBASER,
+			  spx5_port->phylink_config.supported_interfaces);
+
 	phylink = phylink_create(&spx5_port->phylink_config,
 				 of_fwnode_handle(config->node),
 				 config->conf.phy_mode,
Signature · 1 line
2.30.2
#2 lore raw

PATCH 2/3 net: sparx5: clean up sparx5_phylink_validate()

In reply to Russell King (Oracle)

sparx5_phylink_validate() no longer needs to check for PHY_INTERFACE_MODE_NA as phylink will walk the supported interface types to discover the link mode capabilities. Neither is it necessary to check the device capabilities as we will not be called for unsupported interface modes. Remove these checks.

Signed-off-by Russell King (Oracle) <[email protected]>
---
 .../microchip/sparx5/sparx5_phylink.c         | 63 +++++++------------
 1 file changed, 24 insertions(+), 39 deletions(-)
drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c +24 -39
index fb74752de0ca..e77ddded4811 100644
@@ -30,7 +30,6 @@ static void sparx5_phylink_validate(struct phylink_config *config,
 				    unsigned long *supported,
 				    struct phylink_link_state *state)
 {
-	struct sparx5_port *port = netdev_priv(to_net_dev(config->dev));
 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 
 	phylink_set(mask, Autoneg);

@@ -40,34 +39,23 @@ static void sparx5_phylink_validate(struct phylink_config *config,
 
 	switch (state->interface) {
 	case PHY_INTERFACE_MODE_5GBASER:
+		phylink_set(mask, 5000baseT_Full);
+		break;
+
 	case PHY_INTERFACE_MODE_10GBASER:
+		phylink_set(mask, 10000baseT_Full);
+		phylink_set(mask, 10000baseCR_Full);
+		phylink_set(mask, 10000baseSR_Full);
+		phylink_set(mask, 10000baseLR_Full);
+		phylink_set(mask, 10000baseLRM_Full);
+		phylink_set(mask, 10000baseER_Full);
+		break;
+
 	case PHY_INTERFACE_MODE_25GBASER:
-	case PHY_INTERFACE_MODE_NA:
-		if (port->conf.bandwidth == SPEED_5000)
-			phylink_set(mask, 5000baseT_Full);
-		if (port->conf.bandwidth == SPEED_10000) {
-			phylink_set(mask, 5000baseT_Full);
-			phylink_set(mask, 10000baseT_Full);
-			phylink_set(mask, 10000baseCR_Full);
-			phylink_set(mask, 10000baseSR_Full);
-			phylink_set(mask, 10000baseLR_Full);
-			phylink_set(mask, 10000baseLRM_Full);
-			phylink_set(mask, 10000baseER_Full);
-		}
-		if (port->conf.bandwidth == SPEED_25000) {
-			phylink_set(mask, 5000baseT_Full);
-			phylink_set(mask, 10000baseT_Full);
-			phylink_set(mask, 10000baseCR_Full);
-			phylink_set(mask, 10000baseSR_Full);
-			phylink_set(mask, 10000baseLR_Full);
-			phylink_set(mask, 10000baseLRM_Full);
-			phylink_set(mask, 10000baseER_Full);
-			phylink_set(mask, 25000baseCR_Full);
-			phylink_set(mask, 25000baseSR_Full);
-		}
-		if (state->interface != PHY_INTERFACE_MODE_NA)
-			break;
-		fallthrough;
+		phylink_set(mask, 25000baseCR_Full);
+		phylink_set(mask, 25000baseSR_Full);
+		break;
+
 	case PHY_INTERFACE_MODE_SGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 		phylink_set(mask, 10baseT_Half);

@@ -76,21 +64,18 @@ static void sparx5_phylink_validate(struct phylink_config *config,
 		phylink_set(mask, 100baseT_Full);
 		phylink_set(mask, 1000baseT_Full);
 		phylink_set(mask, 1000baseX_Full);
-		if (state->interface != PHY_INTERFACE_MODE_NA)
-			break;
-		fallthrough;
+		break;
+
 	case PHY_INTERFACE_MODE_1000BASEX:
+		phylink_set(mask, 1000baseT_Full);
+		phylink_set(mask, 1000baseX_Full);
+		break;
+
 	case PHY_INTERFACE_MODE_2500BASEX:
-		if (state->interface != PHY_INTERFACE_MODE_2500BASEX) {
-			phylink_set(mask, 1000baseT_Full);
-			phylink_set(mask, 1000baseX_Full);
-		}
-		if (state->interface == PHY_INTERFACE_MODE_2500BASEX ||
-		    state->interface == PHY_INTERFACE_MODE_NA) {
-			phylink_set(mask, 2500baseT_Full);
-			phylink_set(mask, 2500baseX_Full);
-		}
+		phylink_set(mask, 2500baseT_Full);
+		phylink_set(mask, 2500baseX_Full);
 		break;
+
 	default:
 		linkmode_zero(supported);
 		return;
Signature · 1 line
2.30.2
#3 lore raw

PATCH 3/3 net: sparx5: use phylink_generic_validate()

In reply to Russell King (Oracle)

Sparx5 has no special behaviour in its validation implementation, so can be switched to phylink_generic_validate().

Signed-off-by Russell King (Oracle) <[email protected]>
---
 .../ethernet/microchip/sparx5/sparx5_main.c   |  3 +
 .../microchip/sparx5/sparx5_phylink.c         | 60 +------------------
 2 files changed, 4 insertions(+), 59 deletions(-)
drivers/net/ethernet/microchip/sparx5/sparx5_main.c +3 -0
index 3cb6c1fe43ff..16266275dd36 100644
@@ -292,6 +292,9 @@ static int sparx5_create_port(struct sparx5 *sparx5,
 	spx5_port->phylink_config.dev = &spx5_port->ndev->dev;
 	spx5_port->phylink_config.type = PHYLINK_NETDEV;
 	spx5_port->phylink_config.pcs_poll = true;
+	spx5_port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |
+		MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD |
+		MAC_2500FD | MAC_5000FD | MAC_10000FD | MAC_25000FD;
 
 	__set_bit(PHY_INTERFACE_MODE_SGMII,
 		  spx5_port->phylink_config.supported_interfaces);
drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c +1 -59

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Signature · 1 line
2.30.2
CI Applied
#4 lore raw
In reply to Russell King (Oracle)
This series was applied to netdev/net-next.git (master) by David S. Miller <[email protected]>:

Hello:

This series was applied to netdev/net-next.git (master) by David S. Miller <[email protected]>:

Quoted 9 lines · On Tue, 16 Nov 2021 10:01:44 +0000 you wrote:

Hi,

This series converts sparx5 to fill in the supported_interfaces member of phylink_config, cleans up the validate() implementation, and then converts to phylink_generic_validate().

 .../net/ethernet/microchip/sparx5/sparx5_main.c    | 27 ++++++++
 .../net/ethernet/microchip/sparx5/sparx5_phylink.c | 75 +---------------------
 2 files changed, 28 insertions(+), 74 deletions(-)

Here is the summary with links:
- [net-next,1/3] net: sparx5: populate supported_interfaces member

    https://git.kernel.org/netdev/net-next/c/ae089a819176
  - [net-next,2/3] net: sparx5: clean up sparx5_phylink_validate()
    https://git.kernel.org/netdev/net-next/c/9b5cc05fd91c
  - [net-next,3/3] net: sparx5: use phylink_generic_validate()
    https://git.kernel.org/netdev/net-next/c/319faa90b724

You are awesome, thank you!

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