Skip to contentSkip to conversation

arch: add support for loongarch64

PATCH Superseded Waldemar Brodkorb 2 participants 2 messages May 14, 2024

v1 of 2 Superseded Latest is v2 →

lore
Share & tools
lore
#0 lore raw

PATCH 1/3 arch: add support for loongarch64

---
 arch/Config.in             | 12 ++++++++++++
 arch/Config.in.loongarch64 | 14 ++++++++++++++
 package/glibc/Config.in    |  1 +
 package/musl/Config.in     |  1 +
 4 files changed, 28 insertions(+)
 create mode 100644 arch/Config.in.loongarch64
arch/Config.in +12 -0
index f39c33ef7f..070a4aca3a 100644
@@ -77,6 +77,14 @@ config BR2_i386
 	  Intel i386 architecture compatible microprocessor
 	  http://en.wikipedia.org/wiki/I386
 
+config BR2_loongarch64
+	bool "loongarch64"
+	select BR2_ARCH_IS_64
+	select BR2_USE_MMU
+	help
+	  Loongarch is a RISC microprocessor from Loongarch Technologies.
+	  https://en.wikipedia.org/wiki/Loongson
+
 config BR2_m68k
 	bool "m68k"
 	# MMU support is set by the subarchitecture file, arch/Config.in.m68k
@@ -374,6 +382,10 @@ if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
 source "arch/Config.in.arm"
 endif
 
+if BR2_loongarch64
+source "arch/Config.in.loongarch64"
+endif
+
 if BR2_m68k
 source "arch/Config.in.m68k"
 endif
arch/Config.in.loongarch64 new file +14 -0
new file mode 100644
index 0000000000..2b5bac095d
@@ -0,0 +1,14 @@
+config BR2_ARCH
+	default "loongarch64"
+
+config BR2_NORMALIZED_ARCH
+	default "loongarch"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "LoongArch"
+
+# vim: ft=kconfig
+# -*- mode:kconfig; -*-
package/glibc/Config.in +1 -0
index 81c64083f4..5385e2a855 100644
@@ -5,6 +5,7 @@ config BR2_PACKAGE_GLIBC_ARCH_SUPPORTS
 	default y if BR2_aarch64
 	default y if BR2_aarch64_be
 	default y if BR2_i386
+	default y if BR2_loongarch64
 	default y if BR2_m68k_m68k
 	default y if BR2_mips
 	default y if BR2_mipsel
package/musl/Config.in +1 -0
index a6e2af054c..70475326f5 100644
@@ -5,6 +5,7 @@ config BR2_PACKAGE_MUSL_ARCH_SUPPORTS
 	default y if BR2_arm
 	default y if BR2_armeb
 	default y if BR2_i386
+	default y if BR2_loongarch64
 	default y if BR2_m68k_m68k
 	default y if BR2_microblaze
 	default y if BR2_mips
Signature · 6 lines
2.30.2

_______________________________________________
buildroot mailing list
[email protected]
https://lists.buildroot.org/mailman/listinfo/buildroot
#1 lore raw
Quoted 8 lines · On Tue, 14 May 2024 08:26:09 +0200 Waldemar Brodkorb <[email protected]> wrote:
---
 arch/Config.in             | 12 ++++++++++++
 arch/Config.in.loongarch64 | 14 ++++++++++++++
 package/glibc/Config.in    |  1 +
 package/musl/Config.in     |  1 +
 4 files changed, 28 insertions(+)
 create mode 100644 arch/Config.in.loongarch64

This needs an entry in the DEVELOPERS file.

Is this architecture supported in all versions of binutils/gcc/gdb we support?

Quoted 8 lines
arch/Config.in.loongarch64 new file +2 -0
new file mode 100644
index 0000000000..2b5bac095d
@@ -0,0 +1,14 @@
+config BR2_ARCH
+	default "loongarch64"

arch/Config.in.loongarch64 line 12

Quoted 10 lines
arch/Config.in.loongarch64 new file +10 -0
+
+config BR2_NORMALIZED_ARCH
+	default "loongarch"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "LoongArch"
+

Based on the gcc documentation, I see two -march values:

‘loongarch64’
A generic CPU with 64-bit extensions.
‘la464’
LoongArch LA464 CPU with LBT, LSX, LASX, LVZ.

And also 3 ABIs:

‘lp64d’
Uses 64-bit general purpose registers and 32/64-bit floating-point registers for parameter passing. Data model is LP64, where ‘int’ is 32 bits, while ‘long int’ and pointers are 64 bits.
‘lp64f’
Uses 64-bit general purpose registers and 32-bit floating-point registers for parameter passing. Data model is LP64, where ‘int’ is 32 bits, while ‘long int’ and pointers are 64 bits.
‘lp64s’
Uses 64-bit general purpose registers and no floating-point registers for parameter passing. Data model is LP64, where ‘int’ is 32 bits, while ‘long int’ and pointers are 64 bits.

Should we do something about this?

Thomas

Signature · 7 lines
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
_______________________________________________
buildroot mailing list
[email protected]
https://lists.buildroot.org/mailman/listinfo/buildroot