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Add ASCII Art to DTS Docs

DPDK/DTS Bug 1752 [email protected] 1 participant 1 message Jul 14, 2025

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https://bugs.dpdk.org/show_bug.cgi?id=1752

Bug ID: 1752
Summary: Add ASCII Art to DTS Docs
Product: DPDK
Version: unspecified
Hardware: All
OS: All
Status: UNCONFIRMED
Severity: enhancement
Priority: Normal
Component: DTS
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected], [email protected]
Target Milestone: ---

Add ASCII art to illustrate concepts laid out in DTS documentation. For example,

2 link topology:

+------------------------------+                
+------------------------------+                      
|                              |                 |                             
|                      
|                              | --------------- |                             
|                      
|                              |                 |                             
|                      
|  Tester (Traffic Generator)  |                 |     System Under Test       
|                      
|                              |                 |                             
|                      
|                              | --------------- |                             
|                      
|                              |                 |                             
|                      
+------------------------------+                
+------------------------------+             

1 link topology:

+------------------------------+                
+------------------------------+                      
|                              |                 |                             
|                      
|                              | --------------- |                             
|                      
|                              |                 |                             
|                      
|  Tester (Traffic Generator)  |                 |     System Under Test       
|                      
|                              |                 |                             
|                      
|                              |                 |                             
|                      
|                              |                 |                             
|                      
+------------------------------+                                  
+------------------------------+       

2 link topology on a single host:

-----------------------------------
| |
| ------------------------- |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
+--------------------------------------------------+
| |
| |
| |
| |
| Combined Tester & SUT system |
| |
| |
-
| |
| |
+--------------------------------------------------+

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