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New: Xilinx pcie endpoint DMA not functional for ZynqMP PS AXI-PXI DMA endpoint

Bug 203435 Bjorn Helgaas 3 participants 3 messages Apr 26, 2019 1 message not in the archive

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#1 lore raw
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[+cc linux-pci, Xilinx and DMA engine folks]

I'm not sure what to do with this report. It mentions "vivado" and xilinx_ps_pcie_platform.c, neither of which seems to be in mainline or linux-next. A Google search suggests that Vivado is a Xilinx product; maybe this bug report should be directed there?

Quoted 54 lines · On Fri, Apr 26, 2019 at 7:09 AM <[email protected]> wrote:

https://bugzilla.kernel.org/show_bug.cgi?id=203435

            Bug ID: 203435
           Summary: Xilinx pcie endpoint DMA not functional for ZynqMP PS
                    AXI-PXI DMA endpoint
           Product: Drivers
           Version: 2.5
    Kernel Version: 4.14.0
          Hardware: Other
                OS: Linux
              Tree: Mainline
            Status: NEW
          Severity: normal
          Priority: P1
         Component: PCI
          Assignee: [email protected]
          Reporter: [email protected]
        Regression: No

The ps_pcie_dma-1.00.a driver does not work as an endpoint. I'd be happy to help fix/enable/test this out, but I do not understand what the intent was.

The rootdma option is the only one allowed / documented through device-tree and kernel docs. It does not cover the epdma branches in the code that require that drivers/dma/xilinx/xilinx_ps_pcie_platform.c:18:#define PLATFORM_DRIVER_NAME

          "ps_pcie_pform_dma"

be available. I am not sure if this was intended to be the endpoint.

The vivado build for the pcie endpoint will not enable the endpoint DMA channels. I would expect that to be done through device-tree/PCIe BAR configuration reads (for sizes) to set up the channels, but I can't find anything that may other than the mystery of epdma with PLATFORM_DRIVER_NAME.

Because the fsbl does not enable the AXI-DMA the rootdma channel enable check fails on line xilinx_ps_pcie_platform.c:1832

        channel->chan_base =
        (struct DMA_ENGINE_REGISTERS *)((__force char *)(xdev->reg_base) +
                                 (channel_number * DMA_CHANNEL_REGS_SIZE));

        if (((channel->chan_base->dma_channel_status) &
                                DMA_STATUS_DMA_PRES_BIT) == 0) {
                dev_err(&platform_dev->dev,
                        "Hardware reports channel not present\n");
                return -ENOTSUPP;
        }

Is there a different way to access use the PS AXI-PCIe DMA?

Can anyone offer some advice? Have I misunderstood the dis-functionality of the epdma -vs- rootdma branching?

Thanks

#2 lore raw

Hi Bjorn,

Quoted 6 lines · Bjorn Helgaas

[+cc linux-pci, Xilinx and DMA engine folks]

I'm not sure what to do with this report. It mentions "vivado" and xilinx_ps_pcie_platform.c, neither of which seems to be in mainline or linux-next. A Google search suggests that Vivado is a Xilinx product; maybe this bug report should be directed there?

vivado is xilinx design tool for programmable logic and soc setup.

And this driver is not in mainline but just in xilinx git tree. It means you can simply close this.
And author should contact Xilinx via forums or via [email protected] if there is any issue with this driver.

Thanks,
Michal

maintainer
#3 lore raw
Quoted 11 lines · Michal Simek

Hi Bjorn,

Quoted 6 lines · Bjorn Helgaas

[+cc linux-pci, Xilinx and DMA engine folks]

I'm not sure what to do with this report. It mentions "vivado" and xilinx_ps_pcie_platform.c, neither of which seems to be in mainline or linux-next. A Google search suggests that Vivado is a Xilinx product; maybe this bug report should be directed there?

Quoted 6 lines

vivado is xilinx design tool for programmable logic and soc setup.

And this driver is not in mainline but just in xilinx git tree. It means you can simply close this.
And author should contact Xilinx via forums or via [email protected] if there is any issue with this driver.

Great, thanks! I've closed the upstream bugzilla.