i.MX25 3DS fixes and enhancements

This series of patches includes the following:

1. Fixes and clean-ups for the i.MX25 3DS board code
2. New driver for the i.MX25 3DS on-board PMIC
3. Enable proper FEC initialization including PHY power supply enable
4. Add support for boot from UART on the i.MX25 3DS

Note that currently there is no watchdog service routine. Since the UART boot mode enables the watchdog, this means that you can only have Barebox running for 90 seconds before the watchdog resets the CPU.

Baruch Siach (8):
mx25 3ds: fix build failure
mx25: fix typo in imx25-regs.h
mx25 3ds: cleanup lowlevel_init code
mx25: add support for i2c
i2c: add driver for the MC34704 PMIC
mx25 3ds: add support for i2c master and PMIC
mx25 3ds: fix fec initialization
mx25 3ds: add support for boot from UART

 arch/arm/mach-imx/Kconfig                    |    5 +
 arch/arm/mach-imx/include/mach/imx25-regs.h  |    3 +-
 arch/arm/mach-imx/include/mach/iomux-mx25.h  |    4 +-
 arch/arm/mach-imx/speed-imx25.c              |    5 +
 board/freescale-mx25-3-stack/3stack.c        |   87 ++++++++++------
 board/freescale-mx25-3-stack/lowlevel_init.S |   18 ++--
 drivers/i2c/Kconfig                          |    3 +
 drivers/i2c/Makefile                         |    1 +
 drivers/i2c/mc34704.c                        |  140 ++++++++++++++++++++++++++
 include/i2c/mc34704.h                        |   26 +++++
 10 files changed, 247 insertions(+), 45 deletions(-)
 create mode 100644 drivers/i2c/mc34704.c
 create mode 100644 include/i2c/mc34704.h

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Remove redundant parameters from the imx_nand_load_image() call.

---
 board/freescale-mx25-3-stack/3stack.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

index f5316bf..6659185 100644
@@ -320,7 +320,7 @@ console_initcall(imx25_console_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, 256 * 1024, 2048, 16384);
+	imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
 }
 #endif
 

1.7.1


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---
 arch/arm/mach-imx/include/mach/imx25-regs.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

index 556ffb0..8052125 100644
@@ -21,7 +21,7 @@
  */
 
 #ifndef __ASM_ARCH_MX25_REGS_H
-#define __ASM_ARCH_MX35_REGS_H
+#define __ASM_ARCH_MX25_REGS_H
 
 /*
  * sanity check

1.7.1


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* remove unused asm/cache-l2x0.h header include
* remove out of place comment
* remove redundant defines

---
 board/freescale-mx25-3-stack/lowlevel_init.S |   13 +++----------
 1 files changed, 3 insertions(+), 10 deletions(-)

index bf03390..73bb147 100644
@@ -24,7 +24,6 @@
 #include <mach/imx-regs.h>
 #include <mach/imx-pll.h>
 #include <mach/esdctl.h>
-#include <asm/cache-l2x0.h>
 
 #define writel(val, reg) \
 	ldr		r0,	=reg;	\

@@ -56,13 +55,7 @@ CCM_BASE_ADDR_W:        .word   IMX_CCM_BASE
 board_init_lowlevel:
 	mov     r10, lr
 
-/*
- * End of ARM1136 init
- */
 #define MX25_CCM_MCR	0x64
-#define MX25_CCM_CGR0	0x0c
-#define MX25_CCM_CGR1	0x10
-#define MX25_CCM_CGR2	0x14
 
 	ldr r0, CCM_BASE_ADDR_W
 	/* default CLKO to 1/32 of the ARM core */

@@ -75,9 +68,9 @@ board_init_lowlevel:
 	str r1, [r0, #MX25_CCM_MCR]
 
 	/* enable all the clocks */
-	writel(0x1FFFFFFF, IMX_CCM_BASE + MX25_CCM_CGR0)
-	writel(0xFFFFFFFF, IMX_CCM_BASE + MX25_CCM_CGR1)
-	writel(0x000FDFFF, IMX_CCM_BASE + MX25_CCM_CGR2)
+	writel(0x1FFFFFFF, IMX_CCM_BASE + CCM_CGCR0)
+	writel(0xFFFFFFFF, IMX_CCM_BASE + CCM_CGCR1)
+	writel(0x000FDFFF, IMX_CCM_BASE + CCM_CGCR2)
 	writel(0x0000FEFF, IMX_CCM_BASE + MX25_CCM_MCR)
 
 	/* Skip SDRAM initialization if we run from RAM */

1.7.1


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---
 arch/arm/mach-imx/include/mach/imx25-regs.h |    1 +
 arch/arm/mach-imx/include/mach/iomux-mx25.h |    4 ++--
 arch/arm/mach-imx/speed-imx25.c             |    5 +++++
 3 files changed, 8 insertions(+), 2 deletions(-)

index 8052125..e91e7b6 100644
@@ -46,6 +46,7 @@
 #define IMX_M3IF_BASE		0xB8003000
 #define IMX_NFC_BASE		0xBB000000
 #define IMX_FEC_BASE		0x50038000
+#define IMX_I2C1_BASE		0x43F80000
 
 /*
  * Clock Controller Module (CCM)

index 379bfcb..a290a33 100644
@@ -417,10 +417,10 @@
 #define MX25_PAD_HSYNC__GPIO22                             IOMUX_PAD(0x300, 0x108, 5,     0, 0, NO_PAD_CTRL)
 #define MX25_PAD_HSYNC__USBH2_DATA4                        IOMUX_PAD(0x300, 0x108, 6,     0, 0, 0xe5)
 #define MX25_PAD_HSYNC__BT_UART_SRC1                       IOMUX_PAD(0x300, 0x108, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_I2C1_CLK__SCL                             IOMUX_PAD(0x348, 0x150, 0,     0, 0, NO_PAD_CTRL)
+#define MX25_PAD_I2C1_CLK__SCL                             IOMUX_PAD(0x348, 0x150, 0,     0, 0, (HYS | PKE | PUE | PUS_100K_UP))
 #define MX25_PAD_I2C1_CLK__GPIO12                          IOMUX_PAD(0x348, 0x150, 5,     0, 0, NO_PAD_CTRL)
 #define MX25_PAD_I2C1_CLK__SLCDC_DATA6                     IOMUX_PAD(0x348, 0x150, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_I2C1_DAT__SDA                             IOMUX_PAD(0x34c, 0x154, 0,     0, 0, NO_PAD_CTRL)
+#define MX25_PAD_I2C1_DAT__SDA                             IOMUX_PAD(0x34c, 0x154, 0,     0, 0, (HYS | PKE | PUE | PUS_100K_UP))
 #define MX25_PAD_I2C1_DAT__GPIO13                          IOMUX_PAD(0x34c, 0x154, 5,     0, 0, NO_PAD_CTRL)
 #define MX25_PAD_I2C1_DAT__SLCDC_DATA7                     IOMUX_PAD(0x34c, 0x154, 6,     0, 0, NO_PAD_CTRL)
 #define MX25_PAD_KPP_COL0__COL0                            IOMUX_PAD(0x3b0, 0x1b8, 0,     0, 0, NO_PAD_CTRL)

index a615017..9605674 100644
@@ -77,6 +77,11 @@ unsigned long imx_get_lcdclk(void)
 	return imx_get_perclk(7);
 }
 
+unsigned long imx_get_i2cclk(void)
+{
+	return imx_get_perclk(6);
+}
+
 int imx_dump_clocks(void)
 {
 	printf("mpll:    %10d Hz\n", imx_get_mpllclk());

1.7.1


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---
 drivers/i2c/Kconfig   |    3 +
 drivers/i2c/Makefile  |    1 +
 drivers/i2c/mc34704.c |  140 +++++++++++++++++++++++++++++++++++++++++++++++++
 include/i2c/mc34704.h |   26 +++++++++
 4 files changed, 170 insertions(+), 0 deletions(-)
 create mode 100644 drivers/i2c/mc34704.c
 create mode 100644 include/i2c/mc34704.h

index f1b2949..a9ee411 100644
@@ -10,6 +10,9 @@ config DRIVER_I2C_IMX
 config DRIVER_I2C_MC13892
 	bool "MC13892 a.k.a. PMIC driver"
 
+config DRIVER_I2C_MC34704
+	bool "MC34704 PMIC driver"
+
 config DRIVER_I2C_MC9SDZ60
 	bool "MC9SDZ60 driver"
 

index 62d030b..13e5804 100644
@@ -3,5 +3,6 @@ obj-$(CONFIG_I2C) += i2c.o
 obj-$(CONFIG_DRIVER_I2C_IMX) += i2c-imx.o
 
 obj-$(CONFIG_DRIVER_I2C_MC13892) += mc13892.o
+obj-$(CONFIG_DRIVER_I2C_MC34704) += mc34704.o
 obj-$(CONFIG_DRIVER_I2C_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_DRIVER_I2C_LP3972) += lp3972.o

new file mode 100644
index 0000000..a3723d7
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <[email protected]>
+ * Copyright (C) 2010 Baruch Siach <[email protected]>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - arch-mxc/pmic_external.h --  contains interface of the PMIC protocol driver
+ *   Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
+#ifndef __I2C_MC34704_H
+#define __I2C_MC34704_H
+
+struct mc34704 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+};
+
+extern struct mc34704 *mc34704_get(void);
+
+extern int mc34704_reg_read(struct mc34704 *mc34704, u8 reg, u8 *val);
+extern int mc34704_reg_write(struct mc34704 *mc34704, u8 reg, u8 val);
+
+#endif /* __I2C_MC34704_H */

1.7.1


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---
 board/freescale-mx25-3-stack/3stack.c |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

index 6659185..316a2bc 100644
@@ -36,6 +36,8 @@
 #include <nand.h>
 #include <mach/imx-flash-header.h>
 #include <mach/iomux-mx25.h>
+#include <i2c/i2c.h>
+#include <i2c/mc34704.h>
 
 extern unsigned long _stext;
 

@@ -183,8 +185,18 @@ static struct device_d usbh2_dev = {
 };
 #endif
 
+static struct i2c_board_info i2c_devices[] = {
+	{
+		I2C_BOARD_INFO("mc34704", 0x54),
+	},
+};
 #define IOMUXC_BASE_ADDR        0x43FAC000
 
+static struct device_d i2c_dev = {
+	.name     = "i2c-imx",
+	.map_base = IMX_I2C1_BASE,
+};
+
 static int imx25_devices_init(void)
 {
 	ulong val;

@@ -256,6 +268,9 @@ static int imx25_devices_init(void)
 	register_device(&sdram0_dev);
 	register_device(&sram0_dev);
 
+	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
+	register_device(&i2c_dev);
+
 	armlinux_set_bootparams((void *)0x80000100);
 	armlinux_set_architecture(MACH_TYPE_MX25_3DS);
 

@@ -303,6 +318,9 @@ static struct pad_desc imx25_pads[] = {
 	MX25_PAD_VSYNC__USBH2_DATA5,
 	MX25_PAD_LSCLK__USBH2_DATA6,
 	MX25_PAD_OE_ACD__USBH2_DATA7,
+	/* i2c */
+	MX25_PAD_I2C1_CLK__SCL,
+	MX25_PAD_I2C1_DAT__SDA,
 };
 
 static int imx25_console_init(void)

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On barebox-next, I get:

board/freescale-mx25-3-stack/built-in.o: In function `go':
3stack.c:(.flash_header_start+0x0): undefined reference to _start' board/freescale-mx25-3-stack/built-in.o: In function imx25_3ds_fec_init':
3stack.c:(.text.imx25_3ds_fec_init+0x4): undefined reference to mc34704_get' 3stack.c:(.text.imx25_3ds_fec_init+0x1c): undefined reference to mc34704_reg_write'

I guess this change also needs:

index afd8cae..18a9cbc 100644
@@ -140,6 +140,8 @@ config MACH_FREESCALE_MX25_3STACK
        bool "Freescale MX25 3stack"
        select HAS_CFI
        select MACH_HAS_LOWLEVEL_INIT
+       select I2C
+       select DRIVER_I2C_MC34704
        help
          Say Y here if you are using the Freescale MX25 3stack board equipped
          with a Freescale i.MX25 Processor

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Hi Ivo,

                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -

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The fec network interface initialization depends on the initialization of the PMIC. Once the MC34704 driver is registered we can enable the PHY power supply, and go on with the PHY initialization.

While we are at it convert the hard-coded GPIO registers access to the general GPIO API for shorter and clearer code.

---
 board/freescale-mx25-3-stack/3stack.c |   63 +++++++++++++++++----------------
 1 files changed, 32 insertions(+), 31 deletions(-)

index 316a2bc..a657a47 100644
@@ -36,6 +36,7 @@
 #include <nand.h>
 #include <mach/imx-flash-header.h>
 #include <mach/iomux-mx25.h>
+#include <linux/err.h>
 #include <i2c/i2c.h>
 #include <i2c/mc34704.h>
 

@@ -190,16 +191,30 @@ static struct i2c_board_info i2c_devices[] = {
 		I2C_BOARD_INFO("mc34704", 0x54),
 	},
 };
-#define IOMUXC_BASE_ADDR        0x43FAC000
 
 static struct device_d i2c_dev = {
 	.name     = "i2c-imx",
 	.map_base = IMX_I2C1_BASE,
 };
 
-static int imx25_devices_init(void)
+static int imx25_3ds_pmic_init(void)
+{
+	struct mc34704 *pmic;
+
+	pmic = mc34704_get();
+	if (pmic == NULL)
+		return -EIO;
+
+	return mc34704_reg_write(pmic, 0x2, 0x9);
+}
+
+static int imx25_3ds_fec_init(void)
 {
-	ulong val;
+	int ret;
+
+	ret = imx25_3ds_pmic_init();
+	if (ret < 0)
+		return ret;
 
 	/*
 	 * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.

@@ -209,36 +224,27 @@ static int imx25_devices_init(void)
 	 * FEC_RESET_B: gpio2[3] is ALT 5 mode of pin A17
 	 * FEC_ENABLE_B: gpio4[8] is ALT 5 mode of pin D12
 	 */
-	writel(0x8, IOMUXC_BASE_ADDR + 0x0238); /* open drain */
-	writel(0x0, IOMUXC_BASE_ADDR + 0x028C); /* cmos, no pu/pd */
+	writel(0x8, IMX_IOMUXC_BASE + 0x0238); /* open drain */
+	writel(0x0, IMX_IOMUXC_BASE + 0x028C); /* cmos, no pu/pd */
 
-#define GPIO2_BASE_ADDR         0x53FD0000
-#define GPIO4_BASE_ADDR         0x53F9C000
-#define GPIO_GDIR               0x04
-#define GPIO_DR                 0x00
+#define FEC_ENABLE_GPIO		35
+#define FEC_RESET_B_GPIO	104
 
 	/* make the pins output */
-	val = (1 << 3) | readl(GPIO2_BASE_ADDR + GPIO_GDIR);
-	writel(val, GPIO2_BASE_ADDR + GPIO_GDIR);
-
-	val = (1 << 8) | readl(GPIO4_BASE_ADDR + GPIO_GDIR);
-	writel(val, GPIO4_BASE_ADDR + GPIO_GDIR);
-
-	/* drop PHY power */
-	val = readl(GPIO2_BASE_ADDR + GPIO_DR) & ~(1 << 3);
-	writel(val, GPIO2_BASE_ADDR + GPIO_DR);
-
-	/* assert reset */
-	val = readl(GPIO4_BASE_ADDR + GPIO_DR) & ~(1 << 8);
-	writel(val, GPIO4_BASE_ADDR + GPIO_DR);
+	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
+	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
 	udelay(2);
 
 	/* turn on power & lift reset */
-	val = (1 << 3) | readl(GPIO2_BASE_ADDR + GPIO_DR);
-	writel(val, GPIO2_BASE_ADDR + GPIO_DR);
-	val = (1 << 8) | readl(GPIO4_BASE_ADDR + GPIO_DR);
-	writel(val, GPIO4_BASE_ADDR + GPIO_DR);
+	gpio_set_value(FEC_ENABLE_GPIO, 1);
+	gpio_set_value(FEC_RESET_B_GPIO, 1);
+
+	return 0;
+}
+late_initcall(imx25_3ds_fec_init);
 
+static int imx25_devices_init(void)
+{
 #ifdef CONFIG_USB
 	/* USB does not work yet. Don't know why. Maybe
 	 * the CPLD has to be initialized.

@@ -247,11 +253,6 @@ static int imx25_devices_init(void)
 	register_device(&usbh2_dev);
 #endif
 
-	/* FEC does only work when the CPLD is initialized.
-	 * Currently we do not do this in barebox, so it
-	 * does only work when Linux has been started after
-	 * the last powercycle.
-	 */
 	register_device(&fec_dev);
 
 	if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 14))

1.7.1


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For details of the UART protocol see the i.MX25 Reference Manual, section 7.8 "Serial Download protocol".

---
 arch/arm/mach-imx/Kconfig                    |    5 +++++
 board/freescale-mx25-3-stack/3stack.c        |    4 ++++
 board/freescale-mx25-3-stack/lowlevel_init.S |    5 +++++
 3 files changed, 14 insertions(+), 0 deletions(-)

index 419daab..40cebed 100644
@@ -319,6 +319,11 @@ config FREESCALE_MX25_3STACK_SDRAM_64MB_DDR2
 config FREESCALE_MX25_3STACK_SDRAM_128MB_MDDR
 	bool "128 MB (mDDR)"
 endchoice
+
+config FREESCALE_MX25_3STACK_UART_BOOT
+	bool "Boot from UART"
+	depends on ARCH_IMX_INTERNAL_BOOT
+
 endif
 endmenu
 

index a657a47..081487a 100644
@@ -44,7 +44,11 @@ extern unsigned long _stext;
 
 void __naked __flash_header_start go(void)
 {
+#if defined CONFIG_FREESCALE_MX25_3STACK_UART_BOOT
+	__asm__ (".word	exception_vectors\n");
+#else
 	__asm__ __volatile__("b exception_vectors\n");
+#endif
 }
 
 struct imx_dcd_entry __dcd_entry_0x400 dcd_entry[] = {

index 73bb147..b65a070 100644
@@ -73,6 +73,11 @@ board_init_lowlevel:
 	writel(0x000FDFFF, IMX_CCM_BASE + CCM_CGCR2)
 	writel(0x0000FEFF, IMX_CCM_BASE + MX25_CCM_MCR)
 
+#if defined CONFIG_FREESCALE_MX25_3STACK_UART_BOOT
+	/* initialize CCM_CCTL, ARM clk = 400, AHB clk = 133 */
+	writel(0x20034000, IMX_CCM_BASE + 0x8);
+#endif
+
 	/* Skip SDRAM initialization if we run from RAM */
 	cmp	pc, #0x80000000
 	bls	1f

1.7.1


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Hi Sascha,

[snip]

This is actually a (very) short "flash" header with only the app_code_jump_vector entry left. Only reverse engineering the Freescale ATK software revealed this secret. Reading through the i.MX25 Reference Manual I now see that there is an option to pass DCD separately, but it complicates the boot sequence. This change only affects builds when this configuration option, and this option is disabled by default.

baruch

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What do you use to upload images? I once updated my favourite terminal program microcom (git://git.pengutronix.de/git/tools/microcom) to be able to upload and start images. I didn't need any special images. I just used the ability to write registers to initialize the SDRAM and then uploaded an image to sdram with image type 0xaa which seems to just start the image at the given address. Find a log attached (which is on an i.MX27, but I tested it on i.MX35 and i.MX51 aswell) Maybe this could be a solution for you aswell.

Anyway, that said, I can apply your patch, too. I just find it very comfortable to use one image for all boot scenarios.

Sascha

sha@kiwi:~/octopus/microcom/microcom ./microcom -p /dev/ttyS0 -f connected to /dev/ttyS0
Escape character: Ctrl-\
Type the escape character followed by c to get to the menu or q to quit

barebox:/
Enter command. Try 'help' for a list of builtin commands
-> x b
mw 0xD8001010 0x00000004
mw 0xD8001004 0x006ac73a
mw 0xD8001000 0x92100000
mw 0xA0000f00 0x12344321
mw 0xD8001000 0xa2100000
mw 0xA0000000 0x12344321
mw 0xA0000000 0x12344321
mw 0xD8001000 0xb2100000
mwb 0xA0000033 0xda
mwb 0xA1000000 0xff
mw 0xD8001000 0x82226080
mw 0xA0000000 0xDEADBEEF
mw 0xD8001010 0x0000000c
upload 0xa0000000 /home/sha/octopus/barebox/barebox/barebox-pcm038.bin 0xaa image type: 0xaa

    ################################################################
    ################################################################
    ########################################

----------------------
����

barebox 2010.04.0-00140-g0a28ada-dirty (Apr 15 2010 - 11:40:21)

Board: Phytec phyCORE-i.MX27
cfi_probe: cfi_flash base: 0xc0000000 size: 0x02000000
NAND device: Manufacturer ID: 0x20, Chip ID: 0x36 (ST Micro NAND 64MiB 1,8V 8-bit)
Bad block table found at page 131040, version 0x01
Bad block table found at page 131008, version 0x01 imxfb@imxfb0: i.MX Framebuffer driver
ULPI Vendor ID 0xffffff92 Product ID 0xffffff92
No ISP1504 found
ehci@ehci0: USB EHCI 1.00
cfi_protect: protect 0xc0040000 (size 131072)

Using environment in NOR Flash
initialising PLLs: 0xa7f1ea18 0xa7f291f4 Malloc space: 0xa6f00000 -> 0xa7f00000 (size 16 MB) Stack space : 0xa6ef8000 -> 0xa6f00000 (size 32 kB) running /env/bin/init...

Hit any key to stop autoboot: 2

type update_kernel nand|nor [<imagename>] to update kernel into flash type update_root nand|nor [<imagename>] to update rootfs into flash

barebox:/

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Hi Sascha,

I use a custom Perl script that parses a .inc file with the same syntax as the those distributed with the Freescale ATK. This script and the .inc file are attached.

What is this "given address"? Is this the same address as the image load address, i.e., the first instruction in the image?

This could really simplify things. Is this support integrated in the git version of microcom?

Some more question below.

Do you have Barebox running on the board at this point? Is the above 'x b' a special microcom command, or a Barebox script?

I must say that Barebox is much more fun to work with than RedBoot. A huge improvement.

Thanks.

baruch

                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -

_______________________________________________
barebox mailing list
[email protected]
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Hi Sascha,

Now really attaching the files.

baruch

                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -

#!/usr/bin/perl

# Copyright 2009, 2010, Orex Computed Radiography
#
# This program file is free software; you can redistribute it and/or modify it

# under the terms of the GNU General Public License as published by the
# Free Software Foundation; version 2 of the License, or (at your option) any 
# later version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
# for more details.
#
# You should have received a copy of the GNU General Public License. If not, 
# see <http://www.gnu.org/licenses/>.
#
# Author: Baruch Siach <[email protected]>

use strict;
use warnings;
use English;

my @cmd_status = (0x05, 0x05, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,

    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0);

my $resp1 = pack ("C4", 0x56, 0x78, 0x78, 0x56);
my $resp2 = pack ("C4", 0x12, 0x8a, 0x8a, 0x12);
my $resp3 = pack ("C4", 0x88, 0x88, 0x88, 0x88);

my $serial_dev;
my $config_file;

my $buf_in;

sub data_size {
    my $bits = shift;

    if ($bits == 8) {
        return 0x08;
    } elsif ($bits == 16) {
        return 0x10;
    } elsif ($bits == 32) {
        return 0x20;
    }

    return;
}

sub hexdump {
    my $buf = shift;

    foreach (unpack ("C*", $buf)) {
        printf "%02x ", $_;
    }
    print "\n";
}

sub usage {
    print "usage: $0 -p serial_port -c config_file\n";
    exit 0;
}

usage unless defined $ARGV[0];

while ($ARGV[0] and $ARGV[0] =~ /-(.*)/) {
    if ($1 eq "p") {
        $serial_dev = $ARGV[1];
        shift @ARGV;
    } elsif ($1 eq "c") {
        $config_file = $ARGV[1];
        shift @ARGV;
    }
    shift @ARGV;
}

usage unless defined $serial_dev;
usage unless defined $config_file;

system ("stty -F $serial_dev 115200 raw min 0 time 5") == 0

    or die "stty failed: $?";

open (my $serial_fh, '+<', $serial_dev) or die "$serial_dev: $!\n"; open (my $config_fh, '<', $config_file) or die "$config_file: $!";

while (<$config_fh>) {
    chomp;
    next if (/^;/);     # discard comments
    next if (/^\s*$/);  # discard empty lines

    if (m#^setmem\s*/(\d*)\s*0x([[:xdigit:]]*)\s*=\s*0x([[:xdigit:]]*)#) {
        my $ds = data_size $1;
        my $addr = sprintf ("%08s", $2);
        my $data = sprintf ("%08s", $3);
        my $write_mem_cmd;

        $write_mem_cmd = pack ("C2", 0x02, 0x02) .
            pack ("H8", $addr) .
            pack ("C", $ds) .
            pack ("C4", 0x0, 0x0, 0x0, 0x0) .
            pack ("H8", $data) .
            pack ("C", 0x0);

        print "line $.: 0x$addr <- 0x$3 ";
        print $serial_fh $write_mem_cmd;
        read $serial_fh, $buf_in, 8;
        if ($buf_in eq $resp1 . $resp2) {
            print "OK\n";
        } elsif ($buf_in eq $resp1) {
            print "FAIL\n";
        } else {
            print "UNKNOWN\n";
            print "   ";
            foreach (unpack ("C*", $buf_in)) {
                printf "%02x ", $_;
            }
            print "\n";
        }

        next;
    }

    if (m#^getmem\s*/(\d*)\s*0x([[:xdigit:]]*)#) {
        my $bits = $1;
        my $ds = data_size $bits;
        my $addr = sprintf ("%08s", $2);
        my $read_mem_cmd;

        $read_mem_cmd = pack ("C2", 0x01, 0x01) .
            pack ("H8", $addr) .
            pack ("C", $ds) .
            pack ("H8", "00000001") .
            pack ("C5", 0x0, 0x0, 0x0, 0x0, 0x0);

        print $serial_fh $read_mem_cmd;
        read $serial_fh, $buf_in, 4 + ($bits/8);
        if (substr ($buf_in, 0, 4) eq $resp1) {
            print "$.: read at 0x$addr: ";
            foreach (unpack ("C*", substr ($buf_in, 4))) {
                printf "%02x ", $_;
            }
            print "\n";
        } else {
            print "line $. UNKNOWN\n";
        }

        next;
    }

    if (m#readfile,raw,gui\s*"(.*)"\s*=\s*0x([[:xdigit:]]*)#) {
        my $addr = sprintf ("%08s", $2);
        my $img_fh;

        print "line $.: start loading $1 at 0x$addr ";

        if (not open ($img_fh, '<', $1)) {
            warn "$1: ", $!;
            next;
        }
        binmode $img_fh;

        my $hex_size = sprintf ("%08x", (stat ($1))[7]);

        my $write_file_cmd = pack ("C2", 0x04, 0x04) .
            pack ("H8", $addr) .
            pack ("C", 0x0) .
            pack ("H8", $hex_size) .
            pack ("C5", 0x0, 0x0, 0x0, 0x0, 0xaa);

        print $serial_fh $write_file_cmd;
        read $serial_fh, $buf_in, 4;
        if ($buf_in eq $resp1) {
            print "OK\n";
        } else {
            print "UNKNOWN\n";
            next;
        }

        $OUTPUT_AUTOFLUSH = 1;
        print "loading... ";
        my $rx;
        while (($rx = read $img_fh, my $bin_buf, 1024)) {
            print $serial_fh $bin_buf;
            print "#";
        }
        $OUTPUT_AUTOFLUSH = 0;
        print "\n";
        if (not defined $rx) {
            warn $!;
            next;
        }
 
        print "line $.: execute ";
        print $serial_fh pack ("C*", @cmd_status); # write something
        read $serial_fh, $buf_in, 4;
        if ($buf_in eq $resp3) {
            print "OK\n";
        } else {
            print "UNKNOWN\n";
            next;
        }

        next;
    }
}

; WEIM config-CS5 init -- CPLD
setmem /32 0xB8002050 = 0x0000D843
setmem /32 0xB8002054 = 0x22252521
setmem /32 0xB8002058 = 0x22220A00

; DDR2 init
setmem /32 0xB8001004 = 0x0076E83A
setmem /32 0xB8001010 = 0x00000204
setmem /32 0xB8001000 = 0x92210000
setmem /32 0x80000f00 = 0x12344321
setmem /32 0xB8001000 = 0xB2210000

setmem /8  0x82000000 = 0xda
setmem /8  0x83000000 = 0xda
setmem /8  0x81000000 = 0xda
setmem /8  0x80000333 = 0xda

setmem /32 0xB8001000 = 0x92210000
setmem /8 0x80000400 = 0x12345678

setmem /32 0xB8001000 = 0xA2210000
setmem /32 0x80000000 = 0x87654321
setmem /32 0x80000000 = 0x87654321

setmem /32 0xB8001000 = 0xB2210000

setmem /8  0x80000233 = 0xda
setmem /8  0x81000780 = 0xda
setmem /8  0x81000400 = 0xda

setmem /32 0xB8001000 = 0x82216080

setmem /32 0x43FAC454 = 0x00001000

setmem /32 0x80000000 = 0x00000000

;setmem /32 0x53F80008 = 0x20034000

readfile,raw,gui "barebox.bin"=0x83f00000

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Yes.

It is now. It's in the cli-fsl branch.

Ok, barebox is running here, but...

I pressed the escape sequence for microcom here and pushed the reset button. The board is in UART boot mode now and waits.

This is to execute a (microcom) script. It just executes the 'mw' instructions below. (In microcom, they are just named after the barebox pendants)

Thanks, nice to hear ;)

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Hi Sascha,

OK. You're right. Generating the header at run time makes much more sense. I updated my Perl script and .inc file (changed the load address), and I'm now able to boot over UART without this patch.

Thank you very much.

baruch

                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - [email protected] - tel: +972.2.679.5364, http://www.tkos.co.il -

#!/usr/bin/perl

# Copyright 2009, 2010, Orex Computed Radiography
#
# This program file is free software; you can redistribute it and/or modify it

# under the terms of the GNU General Public License as published by the
# Free Software Foundation; version 2 of the License, or (at your option) any 
# later version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
# for more details.
#
# You should have received a copy of the GNU General Public License. If not, 
# see <http://www.gnu.org/licenses/>.
#
# Author: Baruch Siach <[email protected]>

use strict;
use warnings;
use English;

my @cmd_status = (0x05, 0x05, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,

    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0);

my $resp1 = pack ("C4", 0x56, 0x78, 0x78, 0x56);
my $resp2 = pack ("C4", 0x12, 0x8a, 0x8a, 0x12);
my $resp3 = pack ("C4", 0x88, 0x88, 0x88, 0x88);

my $serial_dev;
my $config_file;

my $buf_in;

sub data_size {
    my $bits = shift;

    if ($bits == 8) {
        return 0x08;
    } elsif ($bits == 16) {
        return 0x10;
    } elsif ($bits == 32) {
        return 0x20;
    }

    return;
}

sub hexdump {
    my $buf = shift;

    foreach (unpack ("C*", $buf)) {
        printf "%02x ", $_;
    }
    print "\n";
}

sub usage {
    print "usage: $0 -p serial_port -c config_file\n";
    exit 0;
}

usage unless defined $ARGV[0];

while ($ARGV[0] and $ARGV[0] =~ /-(.*)/) {
    if ($1 eq "p") {
        $serial_dev = $ARGV[1];
        shift @ARGV;
    } elsif ($1 eq "c") {
        $config_file = $ARGV[1];
        shift @ARGV;
    }
    shift @ARGV;
}

usage unless defined $serial_dev;
usage unless defined $config_file;

system ("stty -F $serial_dev 115200 raw min 0 time 5") == 0

    or die "stty failed: $?";

open (my $serial_fh, '+<', $serial_dev) or die "$serial_dev: $!\n"; open (my $config_fh, '<', $config_file) or die "$config_file: $!";

while (<$config_fh>) {
    chomp;
    next if (/^;/);     # discard comments
    next if (/^\s*$/);  # discard empty lines

    if (m#^setmem\s*/(\d*)\s*0x([[:xdigit:]]*)\s*=\s*0x([[:xdigit:]]*)#) {
        my $ds = data_size $1;
        my $addr = sprintf ("%08s", $2);
        my $data = sprintf ("%08s", $3);
        my $write_mem_cmd;

        $write_mem_cmd = pack ("C2", 0x02, 0x02) .
            pack ("H8", $addr) .
            pack ("C", $ds) .
            pack ("C4", 0x0, 0x0, 0x0, 0x0) .
            pack ("H8", $data) .
            pack ("C", 0x0);

        print "line $.: 0x$addr <- 0x$3 ";
        print $serial_fh $write_mem_cmd;
        read $serial_fh, $buf_in, 8;
        if ($buf_in eq $resp1 . $resp2) {
            print "OK\n";
        } elsif ($buf_in eq $resp1) {
            print "FAIL\n";
        } else {
            print "UNKNOWN\n";
            print "   ";
            foreach (unpack ("C*", $buf_in)) {
                printf "%02x ", $_;
            }
            print "\n";
        }

        next;
    }

    if (m#^getmem\s*/(\d*)\s*0x([[:xdigit:]]*)#) {
        my $bits = $1;
        my $ds = data_size $bits;
        my $addr = sprintf ("%08s", $2);
        my $read_mem_cmd;

        $read_mem_cmd = pack ("C2", 0x01, 0x01) .
            pack ("H8", $addr) .
            pack ("C", $ds) .
            pack ("H8", "00000001") .
            pack ("C5", 0x0, 0x0, 0x0, 0x0, 0x0);

        print $serial_fh $read_mem_cmd;
        read $serial_fh, $buf_in, 4 + ($bits/8);
        if (substr ($buf_in, 0, 4) eq $resp1) {
            print "$.: read at 0x$addr: ";
            foreach (unpack ("C*", substr ($buf_in, 4))) {
                printf "%02x ", $_;
            }
            print "\n";
        } else {
            print "line $. UNKNOWN\n";
        }

        next;
    }

    if (m#readfile,raw,gui\s*"(.*)"\s*=\s*0x([[:xdigit:]]*)#) {
        my $addr = sprintf ("%08s", $2);
        my $entry = hex ($2) + 0x20;
        my $img_fh;

        print "line $.: start loading $1 at 0x$addr ";

        if (not open ($img_fh, '<', $1)) {
            warn "$1: ", $!;
            next;
        }
        binmode $img_fh;

        # get image file size + 0x20 header bytes
        my $hex_size = sprintf ("%08x", (stat ($1))[7] + 0x20);

        my $write_file_cmd = pack ("C2", 0x04, 0x04) .
            pack ("H8", $addr) .
            pack ("C", 0x0) .
            pack ("H8", $hex_size) .
            pack ("C5", 0x0, 0x0, 0x0, 0x0, 0xaa);

        print $serial_fh $write_file_cmd;
        read $serial_fh, $buf_in, 4;
        if ($buf_in eq $resp1) {
            print "OK\n";
        } else {
            print "UNKNOWN\n";
            next;
        }

        my $write_file_header = pack ("V", $entry) . pack ("x28");
        print $serial_fh $write_file_header;

        $OUTPUT_AUTOFLUSH = 1;
        print "loading... ";
        my $rx;
        while (($rx = read $img_fh, my $bin_buf, 1024)) {
            print $serial_fh $bin_buf;
            print "#";
        }
        $OUTPUT_AUTOFLUSH = 0;
        print "\n";
        if (not defined $rx) {
            warn $!;
            next;
        }
 
        print "line $.: execute ";
        print $serial_fh pack ("C*", @cmd_status); # write something
        read $serial_fh, $buf_in, 4;
        if ($buf_in eq $resp3) {
            print "OK\n";
        } else {
            print "UNKNOWN\n";
            next;
        }

        next;
    }
}

; WEIM config-CS5 init -- CPLD
setmem /32 0xB8002050 = 0x0000D843
setmem /32 0xB8002054 = 0x22252521
setmem /32 0xB8002058 = 0x22220A00

; DDR2 init
setmem /32 0xB8001004 = 0x0076E83A
setmem /32 0xB8001010 = 0x00000204
setmem /32 0xB8001000 = 0x92210000
setmem /32 0x80000f00 = 0x12344321
setmem /32 0xB8001000 = 0xB2210000

setmem /8  0x82000000 = 0xda
setmem /8  0x83000000 = 0xda
setmem /8  0x81000000 = 0xda
setmem /8  0x80000333 = 0xda

setmem /32 0xB8001000 = 0x92210000
setmem /8 0x80000400 = 0x12345678

setmem /32 0xB8001000 = 0xA2210000
setmem /32 0x80000000 = 0x87654321
setmem /32 0x80000000 = 0x87654321

setmem /32 0xB8001000 = 0xB2210000

setmem /8  0x80000233 = 0xda
setmem /8  0x81000780 = 0xda
setmem /8  0x81000400 = 0xda

setmem /32 0xB8001000 = 0x82216080

setmem /32 0x43FAC454 = 0x00001000

setmem /32 0x80000000 = 0x00000000

;setmem /32 0x53F80008 = 0x20034000

readfile,raw,gui "barebox.bin"=0x83000000

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Hi Baruch,

Applied them all except the last one, see the comment there.

Sascha

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox