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omap-sham: use prefetch mechanism to increase transfer speed

PATCH In review Dmitry Kasatkin 2 participants 3 messages Sep 2, 2010 – Sep 3, 2010 Crypto API

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cover omap-sham: use prefetch mechanism to increase transfer speed

Samu Onkalo (1):
crypto: omap-sham: Adjust DMA parameters

 drivers/crypto/omap-sham.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)
#1 lore raw

PATCH 1/1 crypto: omap-sham: Adjust DMA parameters

From: Samu Onkalo <[email protected]>

DMA is set to use burst mode also for source channel. It should descrease memory bandwidth needs.

DMA synchronization is set to use prefetch mechanism. SHAM block is behind L4 bus and it doesn't have fifo. SHAM block is stalling as long as the new data is available. It takes time to fetch data from memory and transfer it via L4 bus. With prefetch enabled, data is waiting in DMA fifo and SHAM block receives new data block faster.
This increases SHA processing speed up to 30 percent depending on the bus / memory load.

---
 drivers/crypto/omap-sham.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)
drivers/crypto/omap-sham.c +5 -1
index 7d14856..a081c7c 100644
@@ -311,7 +311,8 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
 	len32 = DIV_ROUND_UP(length, sizeof(u32));
 
 	omap_set_dma_transfer_params(dd->dma_lch, OMAP_DMA_DATA_TYPE_S32, len32,
-			1, OMAP_DMA_SYNC_PACKET, dd->dma, OMAP_DMA_DST_SYNC);
+			1, OMAP_DMA_SYNC_PACKET, dd->dma,
+				OMAP_DMA_DST_SYNC_PREFETCH);
 
 	omap_set_dma_src_params(dd->dma_lch, 0, OMAP_DMA_AMODE_POST_INC,
 				dma_addr, 0, 0);
@@ -1072,6 +1073,9 @@ static int omap_sham_dma_init(struct omap_sham_dev *dd)
 	omap_set_dma_dest_burst_mode(dd->dma_lch,
 			OMAP_DMA_DATA_BURST_16);
 
+	omap_set_dma_src_burst_mode(dd->dma_lch,
+			OMAP_DMA_DATA_BURST_4);
+
 	return 0;
 }
 
Signature · 1 line
1.7.0.4
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#2 lore raw

Re: [PATCH 1/1] crypto: omap-sham: Adjust DMA parameters

Quoted 13 lines · Dmitry Kasatkin

From: Samu Onkalo <[email protected]>

DMA is set to use burst mode also for source channel. It should descrease memory bandwidth needs.

DMA synchronization is set to use prefetch mechanism. SHAM block is behind L4 bus and it doesn't have fifo. SHAM block is stalling as long as the new data is available. It takes time to fetch data from memory and transfer it via L4 bus. With prefetch enabled, data is waiting in DMA fifo and SHAM block receives new data block faster.
This increases SHA processing speed up to 30 percent depending on the bus / memory load.

Quoted 2 lines

Patch applied. Thanks!

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt