ARM: tegra: add TrimSlice support

PATCH New Mike Rapoport 2 participants 8 messages Feb 7, 2011 – Feb 20, 2011

Subsystems (3)

Arm (32-bit) Arm sub-architectures Tegra architecture support

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Mike Rapoport

author

2011-02-07 08:10 UTC #0 lore raw

cover ARM: tegra: add TrimSlice support

These patches add basic support for TrimSlice platform. The mach-types update is required until the updated machine registry is merged, otherwise the kernel would not build.

The patches are also available at git repository
git://git.kernel.org/pub/scm/linux/kernel/git/rppt/linux-tegra.git trimslice/upstream

The following changes since commit 8dbdea8444d303a772bceb1ba963f0e3273bfc5e:

Merge branch 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6 (2011-02-06 12:05:58 -0800)

Mike Rapoport (2):
ARM: update trimslice entry in the machine registry
ARM: tegra: add TrimSlice board

 arch/arm/mach-tegra/Kconfig                  |    6 +
 arch/arm/mach-tegra/Makefile                 |    3 +
 arch/arm/mach-tegra/board-trimslice-pinmux.c |  145 ++++++++++++++++++++++++++
 arch/arm/mach-tegra/board-trimslice.c        |  104 ++++++++++++++++++
 arch/arm/mach-tegra/board-trimslice.h        |   22 ++++
 arch/arm/tools/mach-types                    |    2 +-
 6 files changed, 281 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-tegra/board-trimslice-pinmux.c
 create mode 100644 arch/arm/mach-tegra/board-trimslice.c
 create mode 100644 arch/arm/mach-tegra/board-trimslice.h

Signature · 1 line

1.7.3.1

Mike Rapoport

author

2011-02-07 08:10 UTC #1 lore raw

PATCH 1/2 ARM: update trimslice entry in the machine registry

Signed-off-by Mike Rapoport <[email protected]>

---
 arch/arm/tools/mach-types |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

arch/arm/tools/mach-types +1 -1

index 2fea897..bda8b81 100644
@@ -3190,7 +3190,7 @@ synergy			MACH_SYNERGY		SYNERGY			3205
 ics_if_voip		MACH_ICS_IF_VOIP	ICS_IF_VOIP		3206
 wlf_cragg_6410		MACH_WLF_CRAGG_6410	WLF_CRAGG_6410		3207
 punica			MACH_PUNICA		PUNICA			3208
-sbc_nt250		MACH_SBC_NT250		SBC_NT250		3209
+trimslice		MACH_TRIMSLICE		TRIMSLICE		3209
 mx27_wmultra		MACH_MX27_WMULTRA	MX27_WMULTRA		3210
 mackerel		MACH_MACKEREL		MACKEREL		3211
 fa9x27			MACH_FA9X27		FA9X27			3213

Signature · 1 line

1.7.3.1

Mike Rapoport

author

2011-02-07 08:10 UTC #2 lore raw

PATCH 2/2 ARM: tegra: add TrimSlice board

In reply to Mike Rapoport

Add basic support for CompuLab TrimSlice platform

Signed-off-by Mike Rapoport <[email protected]>

---
 arch/arm/mach-tegra/Kconfig                  |    6 +
 arch/arm/mach-tegra/Makefile                 |    3 +
 arch/arm/mach-tegra/board-trimslice-pinmux.c |  145 ++++++++++++++++++++++++++
 arch/arm/mach-tegra/board-trimslice.c        |  104 ++++++++++++++++++
 arch/arm/mach-tegra/board-trimslice.h        |   22 ++++
 5 files changed, 280 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-tegra/board-trimslice-pinmux.c
 create mode 100644 arch/arm/mach-tegra/board-trimslice.c
 create mode 100644 arch/arm/mach-tegra/board-trimslice.h

arch/arm/mach-tegra/Kconfig +6 -0

index acd9552..f0fda77 100644
@@ -27,6 +27,12 @@ config MACH_HARMONY
        help
          Support for nVidia Harmony development platform
 
+config MACH_TRIMSLICE
+       bool "TrimSlice board"
+       select TEGRA_PCI
+       help
+         Support for CompuLab TrimSlice platform
+
 choice
         prompt "Low-level debug console UART"
         default TEGRA_DEBUG_UART_NONE

arch/arm/mach-tegra/Makefile +3 -0

index cdbc68e..0e1844b 100644
@@ -19,3 +19,6 @@ obj-$(CONFIG_TEGRA_PCI)			+= pcie.o
 obj-${CONFIG_MACH_HARMONY}              += board-harmony.o
 obj-${CONFIG_MACH_HARMONY}              += board-harmony-pinmux.o
 obj-${CONFIG_MACH_HARMONY}              += board-harmony-pcie.o
+
+obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice.o
+obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice-pinmux.o

arch/arm/mach-tegra/board-trimslice-pinmux.c new file +145 -0

145 lines not on this page · raw message

arch/arm/mach-tegra/board-trimslice.c new file +104 -0

104 lines not on this page · raw message

arch/arm/mach-tegra/board-trimslice.h new file +22 -0

new file mode 100644
index 0000000..16ec0f0
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.h
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
+#define _MACH_TEGRA_BOARD_TRIMSLICE_H
+
+void trimslice_pinmux_init(void);
+
+#endif

Signature · 1 line

1.7.3.1

Colin Cross

2011-02-11 02:43 UTC #3 lore raw

PATCH 2/2 ARM: tegra: add TrimSlice board

Quoted 332 lines · Mike Rapoport

Add basic support for CompuLab TrimSlice platform

Signed-off-by Mike Rapoport <[email protected]>

---

?arch/arm/mach-tegra/Kconfig ? ? ? ? ? ? ? ? ?| ? ?6 +
?arch/arm/mach-tegra/Makefile ? ? ? ? ? ? ? ? | ? ?3 +
?arch/arm/mach-tegra/board-trimslice-pinmux.c | ?145 ++++++++++++++++++++++++++
?arch/arm/mach-tegra/board-trimslice.c ? ? ? ?| ?104 ++++++++++++++++++
?arch/arm/mach-tegra/board-trimslice.h ? ? ? ?| ? 22 ++++

?5 files changed, 280 insertions(+), 0 deletions(-) ?create mode 100644 arch/arm/mach-tegra/board-trimslice-pinmux.c ?create mode 100644 arch/arm/mach-tegra/board-trimslice.c ?create mode 100644 arch/arm/mach-tegra/board-trimslice.h

arch/arm/mach-tegra/Kconfig +0 -0

index acd9552..f0fda77 100644
@@ -27,6 +27,12 @@ config MACH_HARMONY

? ? ? ?help
? ? ? ? ?Support for nVidia Harmony development platform

arch/arm/mach-tegra/Kconfig +6 -0

+config MACH_TRIMSLICE
+ ? ? ? bool "TrimSlice board"
+ ? ? ? select TEGRA_PCI
+ ? ? ? help
+ ? ? ? ? Support for CompuLab TrimSlice platform
+

?choice
? ? ? ? prompt "Low-level debug console UART"
? ? ? ? default TEGRA_DEBUG_UART_NONE

arch/arm/mach-tegra/Makefile +0 -0

index cdbc68e..0e1844b 100644
@@ -19,3 +19,6 @@ obj-$(CONFIG_TEGRA_PCI) ? ? ? ? ? ? ? ? ? ? ? += pcie.o

?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony.o ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony-pinmux.o ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony-pcie.o

arch/arm/mach-tegra/Makefile +3 -0

+
+obj-${CONFIG_MACH_TRIMSLICE} ? ? ? ? ? ?+= board-trimslice.o
+obj-${CONFIG_MACH_TRIMSLICE} ? ? ? ? ? ?+= board-trimslice-pinmux.o

arch/arm/mach-tegra/board-trimslice-pinmux.c new file +145 -0

new file mode 100644
index 0000000..6d4fc9f
@@ -0,0 +1,145 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice-pinmux.c
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <mach/pinmux.h>
+
+#include "board-trimslice.h"
+
+static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
+ ? ? ? {TEGRA_PINGROUP_ATA, ? TEGRA_MUX_IDE, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_ATB, ? TEGRA_MUX_SDIO4, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_ATC, ? TEGRA_MUX_NAND, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_ATD, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_ATE, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, ? ? TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CRTP, ?TEGRA_MUX_CRT, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CSUS, ?TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DAP1, ?TEGRA_MUX_DAP1, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DAP2, ?TEGRA_MUX_DAP2, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DAP3, ?TEGRA_MUX_DAP3, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DAP4, ?TEGRA_MUX_DAP4, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DDC, ? TEGRA_MUX_I2C2, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DTA, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTB, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTC, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTD, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTE, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTF, ? TEGRA_MUX_I2C3, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GMA, ? TEGRA_MUX_SDIO4, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GMB, ? TEGRA_MUX_NAND, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_GMC, ? TEGRA_MUX_SFLASH, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GMD, ? TEGRA_MUX_SFLASH, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GME, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_GPU, ? TEGRA_MUX_UARTA, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GPU7, ?TEGRA_MUX_RTCK, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GPV, ? TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_I2CP, ?TEGRA_MUX_I2C, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_IRRX, ?TEGRA_MUX_UARTB, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_IRTX, ?TEGRA_MUX_UARTB, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCA, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCB, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCC, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCD, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCE, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCF, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LCSN, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LD0, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD1, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD2, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD3, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD4, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD5, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD6, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD7, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD8, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD9, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD10, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD11, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD12, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD13, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD14, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD15, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD16, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD17, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LDC, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LDI, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHP0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHP1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHP2, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHS, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LM0, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LM1, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LPP, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LPW0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LPW1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LPW2, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LSC0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LSC1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSCK, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSDA, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSDI, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSPI, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LVP0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LVP1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LVS, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_OWC, ? TEGRA_MUX_RSVD2, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_PMC, ? TEGRA_MUX_PWR_ON, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_PTA, ? TEGRA_MUX_RSVD3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_RM, ? ?TEGRA_MUX_I2C, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDB, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDC, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDD, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SLXA, ?TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SLXC, ?TEGRA_MUX_SDIO3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SLXD, ?TEGRA_MUX_SDIO3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SLXK, ?TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SPDI, ?TEGRA_MUX_SPDIF, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPDO, ?TEGRA_MUX_SPDIF, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIA, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIB, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIC, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPID, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIE, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIF, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIG, ?TEGRA_MUX_SPI2_ALT, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIH, ?TEGRA_MUX_SPI2_ALT, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAA, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAB, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAC, ? TEGRA_MUX_RSVD2, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAD, ? TEGRA_MUX_IRDA, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UCA, ? TEGRA_MUX_UARTC, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UCB, ? TEGRA_MUX_UARTC, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UDA, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CK32, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DDRC, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCA, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCB, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCC, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCD, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCE, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_XM2C, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_XM2D, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+};
+
+void __init trimslice_pinmux_init(void)
+{
+ ? ? ? tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
+}

arch/arm/mach-tegra/board-trimslice.c new file +104 -0

new file mode 100644
index 0000000..ef233b2
@@ -0,0 +1,104 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.c
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ * Author: Mike Rapoport <[email protected]>
+ *
+ * Based on board-harmony.c
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/io.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/setup.h>
+
+#include <mach/iomap.h>
+
+#include "board.h"
+#include "clock.h"
+
+#include "board-trimslice.h"
+
+static struct plat_serial8250_port debug_uart_platform_data[] = {
+ ? ? ? {
+ ? ? ? ? ? ? ? .membase ? ? ? ?= IO_ADDRESS(TEGRA_UARTA_BASE),
+ ? ? ? ? ? ? ? .mapbase ? ? ? ?= TEGRA_UARTA_BASE,
+ ? ? ? ? ? ? ? .irq ? ? ? ? ? ?= INT_UARTA,
+ ? ? ? ? ? ? ? .flags ? ? ? ? ?= UPF_BOOT_AUTOCONF,
+ ? ? ? ? ? ? ? .iotype ? ? ? ? = UPIO_MEM,
+ ? ? ? ? ? ? ? .regshift ? ? ? = 2,
+ ? ? ? ? ? ? ? .uartclk ? ? ? ?= 216000000,
+ ? ? ? }, {
+ ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0
+ ? ? ? }
+};
+
+static struct platform_device debug_uart = {
+ ? ? ? .name ? = "serial8250",
+ ? ? ? .id ? ? = PLAT8250_DEV_PLATFORM,
+ ? ? ? .dev ? ?= {
+ ? ? ? ? ? ? ? .platform_data ?= debug_uart_platform_data,
+ ? ? ? },
+};
+
+static struct platform_device *trimslice_devices[] __initdata = {
+ ? ? ? &debug_uart,
+};
+
+static void __init tegra_trimslice_fixup(struct machine_desc *desc,
+ ? ? ? struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+ ? ? ? mi->nr_banks = 2;
+ ? ? ? mi->bank[0].start = PHYS_OFFSET;
+ ? ? ? mi->bank[0].size = 448 * SZ_1M;
+ ? ? ? mi->bank[1].start = SZ_512M;
+ ? ? ? mi->bank[1].size = SZ_512M;
+}
+
+static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
+ ? ? ? /* name ? ? ? ? parent ? ? ? ? ?rate ? ? ? ? ? ?enabled */
+ ? ? ? { "uarta", ? ? ?"pll_p", ? ? ? ?216000000, ? ? ?true },
+ ? ? ? { NULL, ? ? ? ? NULL, ? ? ? ? ? 0, ? ? ? ? ? ? ?0},
+};
+
+static int __init tegra_trimslice_pci_init(void)
+{
+ ? ? ? return tegra_pcie_init(true, true);
+}
+subsys_initcall(tegra_trimslice_pci_init);
+
+static void __init tegra_trimslice_init(void)
+{
+ ? ? ? tegra_common_init();
+
+ ? ? ? tegra_clk_init_from_table(trimslice_clk_init_table);
+
+ ? ? ? trimslice_pinmux_init();
+
+ ? ? ? platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
+}
+
+MACHINE_START(TRIMSLICE, "trimslice")
+ ? ? ? .boot_params ? ?= 0x00000100,
+ ? ? ? .fixup ? ? ? ? ?= tegra_trimslice_fixup,
+ ? ? ? .init_irq ? ? ? = tegra_init_irq,
+ ? ? ? .init_machine ? = tegra_trimslice_init,
+ ? ? ? .map_io ? ? ? ? = tegra_map_common_io,
+ ? ? ? .timer ? ? ? ? ?= &tegra_timer,
+MACHINE_END

arch/arm/mach-tegra/board-trimslice.h new file +22 -1

new file mode 100644
index 0000000..16ec0f0
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.h
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
+#define _MACH_TEGRA_BOARD_TRIMSLICE_H
+
+void trimslice_pinmux_init(void);
+
+#endif
--

Quoted 1 line

1.7.3.1

Ack, the machine type is merged so I'll put this in for-next. Do you want it enabled in tegra_defconfig?

Mike Rapoport

author

2011-02-13 11:08 UTC #4 lore raw

PATCH 2/2 ARM: tegra: add TrimSlice board

Quoted 329 lines · Colin Cross

Quoted 328 lines · Mike Rapoport

Add basic support for CompuLab TrimSlice platform

Signed-off-by Mike Rapoport <[email protected]>

---
 arch/arm/mach-tegra/Kconfig                  |    6 +
 arch/arm/mach-tegra/Makefile                 |    3 +
 arch/arm/mach-tegra/board-trimslice-pinmux.c |  145 ++++++++++++++++++++++++++
 arch/arm/mach-tegra/board-trimslice.c        |  104 ++++++++++++++++++
 arch/arm/mach-tegra/board-trimslice.h        |   22 ++++
 5 files changed, 280 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-tegra/board-trimslice-pinmux.c
 create mode 100644 arch/arm/mach-tegra/board-trimslice.c
 create mode 100644 arch/arm/mach-tegra/board-trimslice.h

arch/arm/mach-tegra/Kconfig +6 -0

index acd9552..f0fda77 100644
@@ -27,6 +27,12 @@ config MACH_HARMONY
       help
         Support for nVidia Harmony development platform
 
+config MACH_TRIMSLICE
+       bool "TrimSlice board"
+       select TEGRA_PCI
+       help
+         Support for CompuLab TrimSlice platform
+
 choice
        prompt "Low-level debug console UART"
        default TEGRA_DEBUG_UART_NONE

arch/arm/mach-tegra/Makefile +3 -0

index cdbc68e..0e1844b 100644
@@ -19,3 +19,6 @@ obj-$(CONFIG_TEGRA_PCI)                       += pcie.o
 obj-${CONFIG_MACH_HARMONY}              += board-harmony.o
 obj-${CONFIG_MACH_HARMONY}              += board-harmony-pinmux.o
 obj-${CONFIG_MACH_HARMONY}              += board-harmony-pcie.o
+
+obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice.o
+obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice-pinmux.o

arch/arm/mach-tegra/board-trimslice-pinmux.c new file +145 -0

new file mode 100644
index 0000000..6d4fc9f
@@ -0,0 +1,145 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice-pinmux.c
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <mach/pinmux.h>
+
+#include "board-trimslice.h"
+
+static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
+       {TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_ATB,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_ATC,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_ATD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_ATE,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4,     TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_CRTP,  TEGRA_MUX_CRT,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_CSUS,  TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DAP1,  TEGRA_MUX_DAP1,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_DAP2,  TEGRA_MUX_DAP2,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DAP3,  TEGRA_MUX_DAP3,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_DAP4,  TEGRA_MUX_DAP4,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DDC,   TEGRA_MUX_I2C2,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_DTA,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DTB,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DTC,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DTD,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DTE,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_DTF,   TEGRA_MUX_I2C3,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GMA,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GMB,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_GMC,   TEGRA_MUX_SFLASH,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GMD,   TEGRA_MUX_SFLASH,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GME,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_GPU,   TEGRA_MUX_UARTA,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTB,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTB,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_KBCB,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_KBCD,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_KBCE,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_KBCF,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LCSN,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LD0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD2,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD3,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD4,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD5,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD6,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD7,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD8,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD9,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD10,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD11,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD12,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD13,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD14,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD15,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD16,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LD17,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LDC,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LDI,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LHP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LHP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LHP2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LHS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LM0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LM1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LPP,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LPW0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LPW1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LPW2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LSC0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LSC1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LSCK,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LSDA,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LSDI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LSPI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LVP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_LVP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_LVS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_OWC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_PMC,   TEGRA_MUX_PWR_ON,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_PTA,   TEGRA_MUX_RSVD3,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_RM,    TEGRA_MUX_I2C,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SDB,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SDC,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_SPDI,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPDO,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIA,  TEGRA_MUX_SPI2,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIB,  TEGRA_MUX_SPI2,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIC,  TEGRA_MUX_SPI2,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPID,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIE,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIF,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIG,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SPIH,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UAA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UAC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UAD,   TEGRA_MUX_IRDA,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_PMCA,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_PMCB,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_PMCC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_PMCD,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_PMCE,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_XM2C,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+};
+
+void __init trimslice_pinmux_init(void)
+{
+       tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
+}

arch/arm/mach-tegra/board-trimslice.c new file +104 -0

new file mode 100644
index 0000000..ef233b2
@@ -0,0 +1,104 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.c
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ * Author: Mike Rapoport <[email protected]>
+ *
+ * Based on board-harmony.c
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/io.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/setup.h>
+
+#include <mach/iomap.h>
+
+#include "board.h"
+#include "clock.h"
+
+#include "board-trimslice.h"
+
+static struct plat_serial8250_port debug_uart_platform_data[] = {
+       {
+               .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
+               .mapbase        = TEGRA_UARTA_BASE,
+               .irq            = INT_UARTA,
+               .flags          = UPF_BOOT_AUTOCONF,
+               .iotype         = UPIO_MEM,
+               .regshift       = 2,
+               .uartclk        = 216000000,
+       }, {
+               .flags          = 0
+       }
+};
+
+static struct platform_device debug_uart = {
+       .name   = "serial8250",
+       .id     = PLAT8250_DEV_PLATFORM,
+       .dev    = {
+               .platform_data  = debug_uart_platform_data,
+       },
+};
+
+static struct platform_device *trimslice_devices[] __initdata = {
+       &debug_uart,
+};
+
+static void __init tegra_trimslice_fixup(struct machine_desc *desc,
+       struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+       mi->nr_banks = 2;
+       mi->bank[0].start = PHYS_OFFSET;
+       mi->bank[0].size = 448 * SZ_1M;
+       mi->bank[1].start = SZ_512M;
+       mi->bank[1].size = SZ_512M;
+}
+
+static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
+       /* name         parent          rate            enabled */
+       { "uarta",      "pll_p",        216000000,      true },
+       { NULL,         NULL,           0,              0},
+};
+
+static int __init tegra_trimslice_pci_init(void)
+{
+       return tegra_pcie_init(true, true);
+}
+subsys_initcall(tegra_trimslice_pci_init);
+
+static void __init tegra_trimslice_init(void)
+{
+       tegra_common_init();
+
+       tegra_clk_init_from_table(trimslice_clk_init_table);
+
+       trimslice_pinmux_init();
+
+       platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
+}
+
+MACHINE_START(TRIMSLICE, "trimslice")
+       .boot_params    = 0x00000100,
+       .fixup          = tegra_trimslice_fixup,
+       .init_irq       = tegra_init_irq,
+       .init_machine   = tegra_trimslice_init,
+       .map_io         = tegra_map_common_io,
+       .timer          = &tegra_timer,
+MACHINE_END

arch/arm/mach-tegra/board-trimslice.h new file +19 -0

new file mode 100644
index 0000000..16ec0f0
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.h
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
+#define _MACH_TEGRA_BOARD_TRIMSLICE_H
+

Quoted 8 lines

Quoted 5 lines
arch/arm/mach-tegra/board-trimslice.h new file +3 -1
+void trimslice_pinmux_init(void);
+
+#endif
--
1.7.3.1
Ack, the machine type is merged so I'll put this in for-next. Do you want it enabled in tegra_defconfig?

If 'select TEGRA_PCI' does not trouble you, I'd be glad to have the TrimSlice in tegra_defconfig :)

Quoted 4 lines

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Signature · 2 lines

Sincerely yours,
Mike.

Colin Cross

2011-02-13 19:06 UTC #5 lore raw

PATCH 2/2 ARM: tegra: add TrimSlice board

Quoted 339 lines · Mike Rapoport

Quoted 329 lines · Colin Cross

Quoted 328 lines · Mike Rapoport

Add basic support for CompuLab TrimSlice platform

Signed-off-by Mike Rapoport <[email protected]>

---

?arch/arm/mach-tegra/Kconfig ? ? ? ? ? ? ? ? ?| ? ?6 +
?arch/arm/mach-tegra/Makefile ? ? ? ? ? ? ? ? | ? ?3 +
?arch/arm/mach-tegra/board-trimslice-pinmux.c | ?145 ++++++++++++++++++++++++++
?arch/arm/mach-tegra/board-trimslice.c ? ? ? ?| ?104 ++++++++++++++++++
?arch/arm/mach-tegra/board-trimslice.h ? ? ? ?| ? 22 ++++

arch/arm/mach-tegra/Kconfig +0 -0

index acd9552..f0fda77 100644
@@ -27,6 +27,12 @@ config MACH_HARMONY

? ? ? ?help
? ? ? ? ?Support for nVidia Harmony development platform

arch/arm/mach-tegra/Kconfig +6 -0

+config MACH_TRIMSLICE
+ ? ? ? bool "TrimSlice board"
+ ? ? ? select TEGRA_PCI
+ ? ? ? help
+ ? ? ? ? Support for CompuLab TrimSlice platform
+

?choice
? ? ? ? prompt "Low-level debug console UART"
? ? ? ? default TEGRA_DEBUG_UART_NONE

arch/arm/mach-tegra/Makefile +0 -0

index cdbc68e..0e1844b 100644
@@ -19,3 +19,6 @@ obj-$(CONFIG_TEGRA_PCI) ? ? ? ? ? ? ? ? ? ? ? += pcie.o

?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony.o ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony-pinmux.o ?obj-${CONFIG_MACH_HARMONY} ? ? ? ? ? ? ?+= board-harmony-pcie.o

arch/arm/mach-tegra/Makefile +3 -0

+
+obj-${CONFIG_MACH_TRIMSLICE} ? ? ? ? ? ?+= board-trimslice.o
+obj-${CONFIG_MACH_TRIMSLICE} ? ? ? ? ? ?+= board-trimslice-pinmux.o

arch/arm/mach-tegra/board-trimslice-pinmux.c new file +145 -0

new file mode 100644
index 0000000..6d4fc9f
@@ -0,0 +1,145 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice-pinmux.c
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <mach/pinmux.h>
+
+#include "board-trimslice.h"
+
+static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
+ ? ? ? {TEGRA_PINGROUP_ATA, ? TEGRA_MUX_IDE, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_ATB, ? TEGRA_MUX_SDIO4, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_ATC, ? TEGRA_MUX_NAND, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_ATD, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_ATE, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, ? ? TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CRTP, ?TEGRA_MUX_CRT, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CSUS, ?TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DAP1, ?TEGRA_MUX_DAP1, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DAP2, ?TEGRA_MUX_DAP2, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DAP3, ?TEGRA_MUX_DAP3, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DAP4, ?TEGRA_MUX_DAP4, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DDC, ? TEGRA_MUX_I2C2, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DTA, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTB, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTC, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTD, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTE, ? TEGRA_MUX_VI, ? ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_DTF, ? TEGRA_MUX_I2C3, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GMA, ? TEGRA_MUX_SDIO4, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GMB, ? TEGRA_MUX_NAND, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_GMC, ? TEGRA_MUX_SFLASH, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GMD, ? TEGRA_MUX_SFLASH, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GME, ? TEGRA_MUX_GMI, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_GPU, ? TEGRA_MUX_UARTA, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GPU7, ?TEGRA_MUX_RTCK, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_GPV, ? TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_I2CP, ?TEGRA_MUX_I2C, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_IRRX, ?TEGRA_MUX_UARTB, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_IRTX, ?TEGRA_MUX_UARTB, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCA, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCB, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCC, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCD, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCE, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_KBCF, ?TEGRA_MUX_KBC, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LCSN, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LD0, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD1, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD2, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD3, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD4, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD5, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD6, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD7, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD8, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD9, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD10, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD11, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD12, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD13, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD14, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD15, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD16, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LD17, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LDC, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LDI, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHP0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHP1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHP2, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LHS, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LM0, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LM1, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LPP, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LPW0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LPW1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LPW2, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LSC0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LSC1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSCK, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSDA, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSDI, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LSPI, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LVP0, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_LVP1, ?TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_LVS, ? TEGRA_MUX_DISPLAYA, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_OWC, ? TEGRA_MUX_RSVD2, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_PMC, ? TEGRA_MUX_PWR_ON, ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_PTA, ? TEGRA_MUX_RSVD3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_RM, ? ?TEGRA_MUX_I2C, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDB, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDC, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDD, ? TEGRA_MUX_PWM, ? ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SLXA, ?TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SLXC, ?TEGRA_MUX_SDIO3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SLXD, ?TEGRA_MUX_SDIO3, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SLXK, ?TEGRA_MUX_PCIE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_SPDI, ?TEGRA_MUX_SPDIF, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPDO, ?TEGRA_MUX_SPDIF, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIA, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIB, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIC, ?TEGRA_MUX_SPI2, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPID, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIE, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIF, ?TEGRA_MUX_SPI1, ? ? ? ? ?TEGRA_PUPD_PULL_DOWN, ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIG, ?TEGRA_MUX_SPI2_ALT, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_SPIH, ?TEGRA_MUX_SPI2_ALT, ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAA, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAB, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAC, ? TEGRA_MUX_RSVD2, ? ? ? ? TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UAD, ? TEGRA_MUX_IRDA, ? ? ? ? ?TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UCA, ? TEGRA_MUX_UARTC, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UCB, ? TEGRA_MUX_UARTC, ? ? ? ? TEGRA_PUPD_PULL_UP, ? ? TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_UDA, ? TEGRA_MUX_ULPI, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_TRISTATE},
+ ? ? ? {TEGRA_PINGROUP_CK32, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_DDRC, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCA, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCB, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCC, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCD, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_PMCE, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_XM2C, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+ ? ? ? {TEGRA_PINGROUP_XM2D, ?TEGRA_MUX_NONE, ? ? ? ? ?TEGRA_PUPD_NORMAL, ? ? ?TEGRA_TRI_NORMAL},
+};
+
+void __init trimslice_pinmux_init(void)
+{
+ ? ? ? tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
+}

arch/arm/mach-tegra/board-trimslice.c new file +104 -0

new file mode 100644
index 0000000..ef233b2
@@ -0,0 +1,104 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.c
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ * Author: Mike Rapoport <[email protected]>
+ *
+ * Based on board-harmony.c
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/io.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/setup.h>
+
+#include <mach/iomap.h>
+
+#include "board.h"
+#include "clock.h"
+
+#include "board-trimslice.h"
+
+static struct plat_serial8250_port debug_uart_platform_data[] = {
+ ? ? ? {
+ ? ? ? ? ? ? ? .membase ? ? ? ?= IO_ADDRESS(TEGRA_UARTA_BASE),
+ ? ? ? ? ? ? ? .mapbase ? ? ? ?= TEGRA_UARTA_BASE,
+ ? ? ? ? ? ? ? .irq ? ? ? ? ? ?= INT_UARTA,
+ ? ? ? ? ? ? ? .flags ? ? ? ? ?= UPF_BOOT_AUTOCONF,
+ ? ? ? ? ? ? ? .iotype ? ? ? ? = UPIO_MEM,
+ ? ? ? ? ? ? ? .regshift ? ? ? = 2,
+ ? ? ? ? ? ? ? .uartclk ? ? ? ?= 216000000,
+ ? ? ? }, {
+ ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0
+ ? ? ? }
+};
+
+static struct platform_device debug_uart = {
+ ? ? ? .name ? = "serial8250",
+ ? ? ? .id ? ? = PLAT8250_DEV_PLATFORM,
+ ? ? ? .dev ? ?= {
+ ? ? ? ? ? ? ? .platform_data ?= debug_uart_platform_data,
+ ? ? ? },
+};
+
+static struct platform_device *trimslice_devices[] __initdata = {
+ ? ? ? &debug_uart,
+};
+
+static void __init tegra_trimslice_fixup(struct machine_desc *desc,
+ ? ? ? struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+ ? ? ? mi->nr_banks = 2;
+ ? ? ? mi->bank[0].start = PHYS_OFFSET;
+ ? ? ? mi->bank[0].size = 448 * SZ_1M;
+ ? ? ? mi->bank[1].start = SZ_512M;
+ ? ? ? mi->bank[1].size = SZ_512M;
+}
+
+static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
+ ? ? ? /* name ? ? ? ? parent ? ? ? ? ?rate ? ? ? ? ? ?enabled */
+ ? ? ? { "uarta", ? ? ?"pll_p", ? ? ? ?216000000, ? ? ?true },
+ ? ? ? { NULL, ? ? ? ? NULL, ? ? ? ? ? 0, ? ? ? ? ? ? ?0},
+};
+
+static int __init tegra_trimslice_pci_init(void)
+{
+ ? ? ? return tegra_pcie_init(true, true);
+}
+subsys_initcall(tegra_trimslice_pci_init);
+
+static void __init tegra_trimslice_init(void)
+{
+ ? ? ? tegra_common_init();
+
+ ? ? ? tegra_clk_init_from_table(trimslice_clk_init_table);
+
+ ? ? ? trimslice_pinmux_init();
+
+ ? ? ? platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
+}
+
+MACHINE_START(TRIMSLICE, "trimslice")
+ ? ? ? .boot_params ? ?= 0x00000100,
+ ? ? ? .fixup ? ? ? ? ?= tegra_trimslice_fixup,
+ ? ? ? .init_irq ? ? ? = tegra_init_irq,
+ ? ? ? .init_machine ? = tegra_trimslice_init,
+ ? ? ? .map_io ? ? ? ? = tegra_map_common_io,
+ ? ? ? .timer ? ? ? ? ?= &tegra_timer,
+MACHINE_END

arch/arm/mach-tegra/board-trimslice.h new file +19 -0

new file mode 100644
index 0000000..16ec0f0
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-tegra/board-trimslice.h
+ *
+ * Copyright (C) 2011 CompuLab, Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H
+#define _MACH_TEGRA_BOARD_TRIMSLICE_H
+

Quoted 8 lines

Quoted 5 lines
arch/arm/mach-tegra/board-trimslice.h new file +3 -1
+void trimslice_pinmux_init(void);
+
+#endif
--
1.7.3.1
Ack, the machine type is merged so I'll put this in for-next. ?Do you want it enabled in tegra_defconfig?

Quoted 2 lines

If 'select TEGRA_PCI' does not trouble you, I'd be glad to have the TrimSlice in tegra_defconfig :)

My board without PCI doesn't boot if CONFIG_TEGRA_PCI is selected, so I guess it should stay off for now. Any idea why it wouldn't boot?

Mike Rapoport

author

2011-02-14 06:18 UTC #6 lore raw

PATCH 2/2 ARM: tegra: add TrimSlice board

Quoted 9 lines · Colin Cross

Quoted 6 lines
Quoted 3 lines
Ack, the machine type is merged so I'll put this in for-next. Do you want it enabled in tegra_defconfig?
If 'select TEGRA_PCI' does not trouble you, I'd be glad to have the TrimSlice in tegra_defconfig :)
My board without PCI doesn't boot if CONFIG_TEGRA_PCI is selected, so I guess it should stay off for now. Any idea why it wouldn't boot?

The PCI subsystem should be re-gated, otherwise any access to PCI hangs the system. Besides, on Harmony you need to enable two additional voltage supplies to provide PEX_CLK voltage.
I'll send the patches that handle it, hopefully in the next few days.

Signature · 2 lines

Sincerely yours,
Mike.

Mike Rapoport

author

2011-02-20 12:43 UTC #7 lore raw

PATCH 2/2 ARM: tegra: add TrimSlice board

Quoted 8 lines · Mike Rapoport

Quoted 7 lines · Colin Cross
Quoted 6 lines
Quoted 3 lines
Ack, the machine type is merged so I'll put this in for-next. Do you want it enabled in tegra_defconfig?
If 'select TEGRA_PCI' does not trouble you, I'd be glad to have the TrimSlice in tegra_defconfig :)

Quoted 7 lines

Quoted 2 lines
My board without PCI doesn't boot if CONFIG_TEGRA_PCI is selected, so I guess it should stay off for now. Any idea why it wouldn't boot?
The PCI subsystem should be re-gated, otherwise any access to PCI hangs the system. Besides, on Harmony you need to enable two additional voltage supplies to provide PEX_CLK voltage.
I'll send the patches that handle it, hopefully in the next few days.

I was little bit too enthusiastic about it :( To enable PCI on Harmony and probably on Ventana one need to have I2C and TPS up and running before setting up the PCI clocks...
I have working implementation on top of your linux-tegra-2.6.37 branch (1), but it's not quite ready to go upstream.

So, let's keep the TrimSlice out of common defconfig for now

[1]
http://git.kernel.org/?p=linux/kernel/git/rppt/linux-tegra.git;a=shortlog;h=refs/heads/tegra/devel

Signature · 2 lines

Sincerely yours,
Mike.