mmx: mxs-mmc: Some cleanups and fixes for the MXS MMC subsystem
v3 cover mmx: mxs-mmc: Some cleanups and fixes for the MXS MMC subsystem
Lothar Waßmann (4):
Fix grammatical error in comment
Some cleanups for the MMC driver
Check the return codes of clk_enable() and mxs_reset_block() Add an appropriate MODULE_ALIAS
Changes wrt v2:
- add missing Acked-by's
- changed subject-prefix
drivers/mmc/host/mxs-mmc.c | 87 +++++++++++++++++++++++++++------------------ 1 file changed, 54 insertions(+), 33 deletions(-)
PATCH v3 1/4 mmc: mxs-mmc: Fix grammatical error in comment
--- arch/arm/mach-mxs/clock-mx28.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mxs/clock-mx28.c +1 -1
@@ -554,7 +554,7 @@ static struct clk rtc_clk = { .parent = &ref_xtal_clk, }; -/* usb_clk gate is controlled in DIGCTRL other than CLKCTRL */ +/* usb_clk gate is controlled in DIGCTRL rather than CLKCTRL */ static struct clk usb0_clk = { .enable_reg =DIGCTRL_BASE_ADDR , .enable_shift =2 ,
Signature · 1 line
1.5.6.5
PATCH v3 2/4 mmc: mxs-mmc: Some cleanups for the MMC driver
- Remove bogus parens around numerical arguments in #define's
- When defining bit masks, use the #def for the shift count instead of repeating the numbers
- Remove 'break' at end of switch statement
--- drivers/mmc/host/mxs-mmc.c | 60 ++++++++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 28 deletions(-)
drivers/mmc/host/mxs-mmc.c +32 -28
@@ -47,7 +47,7 @@#define DRIVER_NAME "mxs-mmc"/* card detect polling timeout */ -#define MXS_MMC_DETECT_TIMEOUT (HZ/2) +#define MXS_MMC_DETECT_TIMEOUT (HZ / 2)#define SSP_VERSION_LATEST 4#define ssp_is_old () (host->version < SSP_VERSION_LATEST)
@@ -59,39 +59,43 @@#define BM_SSP_CTRL0_IGNORE_CRC (1 << 26)#define BM_SSP_CTRL0_READ (1 << 25)#define BM_SSP_CTRL0_DATA_XFER (1 << 24) -#define BP_SSP_CTRL0_BUS_WIDTH (22) -#define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22) +#define BP_SSP_CTRL0_BUS_WIDTH 22 +#define BM_SSP_CTRL0_BUS_WIDTH (0x3 << BP_SSP_CTRL0_BUS_WIDTH)#define BM_SSP_CTRL0_WAIT_FOR_IRQ (1 << 21)#define BM_SSP_CTRL0_LONG_RESP (1 << 19)#define BM_SSP_CTRL0_GET_RESP (1 << 17)#define BM_SSP_CTRL0_ENABLE (1 << 16) -#define BP_SSP_CTRL0_XFER_COUNT (0) -#define BM_SSP_CTRL0_XFER_COUNT (0xffff) +#define BP_SSP_CTRL0_XFER_COUNT 0 +#define BM_SSP_CTRL0_XFER_COUNT 0xffff#define HW_SSP_CMD0 0x010#define BM_SSP_CMD0_DBL_DATA_RATE_EN (1 << 25)#define BM_SSP_CMD0_SLOW_CLKING_EN (1 << 22)#define BM_SSP_CMD0_CONT_CLKING_EN (1 << 21)#define BM_SSP_CMD0_APPEND_8CYC (1 << 20) -#define BP_SSP_CMD0_BLOCK_SIZE (16) -#define BM_SSP_CMD0_BLOCK_SIZE (0xf << 16) -#define BP_SSP_CMD0_BLOCK_COUNT (8) -#define BM_SSP_CMD0_BLOCK_COUNT (0xff << 8) -#define BP_SSP_CMD0_CMD (0) -#define BM_SSP_CMD0_CMD (0xff) +#define BP_SSP_CMD0_BLOCK_SIZE 16 +#define BM_SSP_CMD0_BLOCK_SIZE (0xf << BP_SSP_CMD0_BLOCK_SIZE) +#define BP_SSP_CMD0_BLOCK_COUNT 8 +#define BM_SSP_CMD0_BLOCK_COUNT \ + (0xff << BP_SSP_CMD0_BLOCK_COUNT) +#define BP_SSP_CMD0_CMD 0 +#define BM_SSP_CMD0_CMD 0xff#define HW_SSP_CMD1 0x020#define HW_SSP_XFER_SIZE 0x030#define HW_SSP_BLOCK_SIZE 0x040 -#define BP_SSP_BLOCK_SIZE_BLOCK_COUNT (4) -#define BM_SSP_BLOCK_SIZE_BLOCK_COUNT (0xffffff << 4) -#define BP_SSP_BLOCK_SIZE_BLOCK_SIZE (0) -#define BM_SSP_BLOCK_SIZE_BLOCK_SIZE (0xf) +#define BP_SSP_BLOCK_SIZE_BLOCK_COUNT 4 +#define BM_SSP_BLOCK_SIZE_BLOCK_COUNT \ + (0xffffff << BP_SSP_BLOCK_SIZE_BLOCK_COUNT) +#define BP_SSP_BLOCK_SIZE_BLOCK_SIZE 0 +#define BM_SSP_BLOCK_SIZE_BLOCK_SIZE 0xf#define HW_SSP_TIMING (ssp_is_old() ? 0x050 : 0x070) -#define BP_SSP_TIMING_TIMEOUT (16) -#define BM_SSP_TIMING_TIMEOUT (0xffff << 16) -#define BP_SSP_TIMING_CLOCK_DIVIDE (8) -#define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8) -#define BP_SSP_TIMING_CLOCK_RATE (0) -#define BM_SSP_TIMING_CLOCK_RATE (0xff) +#define BP_SSP_TIMING_TIMEOUT 16 +#define BM_SSP_TIMING_TIMEOUT \ + (0xffff << BP_SSP_TIMING_TIMEOUT) +#define BP_SSP_TIMING_CLOCK_DIVIDE 8 +#define BM_SSP_TIMING_CLOCK_DIVIDE \ + (0xff << BP_SSP_TIMING_CLOCK_DIVIDE) +#define BP_SSP_TIMING_CLOCK_RATE 0 +#define BM_SSP_TIMING_CLOCK_RATE 0xff#define HW_SSP_CTRL1 (ssp_is_old() ? 0x060 : 0x080)#define BM_SSP_CTRL1_SDIO_IRQ (1 << 31)#define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30)
@@ -111,10 +115,11 @@#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN (1 << 14)#define BM_SSP_CTRL1_DMA_ENABLE (1 << 13)#define BM_SSP_CTRL1_POLARITY (1 << 9) -#define BP_SSP_CTRL1_WORD_LENGTH (4) -#define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4) -#define BP_SSP_CTRL1_SSP_MODE (0) -#define BM_SSP_CTRL1_SSP_MODE (0xf) +#define BP_SSP_CTRL1_WORD_LENGTH 4 +#define BM_SSP_CTRL1_WORD_LENGTH \ + (0xf << BP_SSP_CTRL1_WORD_LENGTH) +#define BP_SSP_CTRL1_SSP_MODE 0 +#define BM_SSP_CTRL1_SSP_MODE 0xf#define HW_SSP_SDRESP0 (ssp_is_old() ? 0x080 : 0x0a0)#define HW_SSP_SDRESP1 (ssp_is_old() ? 0x090 : 0x0b0)#define HW_SSP_SDRESP2 (ssp_is_old() ? 0x0a0 : 0x0c0)
@@ -123,7 +128,7 @@#define BM_SSP_STATUS_CARD_DETECT (1 << 28)#define BM_SSP_STATUS_SDIO_IRQ (1 << 17)#define HW_SSP_VERSION (cpu_is_mx23() ? 0x110 : 0x130) -#define BP_SSP_VERSION_MAJOR (24) +#define BP_SSP_VERSION_MAJOR 24#define BF_SSP (value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
@@ -151,7 +156,7 @@ struct mxs_mmc_host {struct clk *clk;unsigned int clk_rate; -struct dma_chan *dmach; +struct dma_chan *dmach;struct mxs_dma_data dma_data;unsigned int dma_dir;u32 ssp_pio_words[SSP_PIO_NUM ];
@@ -550,7 +555,6 @@ static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,default :dev_warn (mmc_dev (host->mmc),"%s: unknown MMC command\n" , __func__); -break ; } }
Signature · 1 line
1.5.6.5
PATCH v3 3/4 mmc: mxs-mmc: Check the return codes of clk_enable() and mxs_reset_block()
Add an int return value to mxs_mmc_reset(), so that the return code of mxs_reset_block() can be promoted to the caller.
Also check the return code of clk_enable() in the probe function.
--- drivers/mmc/host/mxs-mmc.c | 26 +++++++++++++++++++++----- 1 files changed, 21 insertions(+), 5 deletions(-)
drivers/mmc/host/mxs-mmc.c +21 -5
@@ -190,11 +190,14 @@ static int mxs_mmc_get_cd(struct mmc_host *mmc) BM_SSP_STATUS_CARD_DETECT); } -static void mxs_mmc_reset (struct mxs_mmc_host *host) +static int mxs_mmc_reset (struct mxs_mmc_host *host) { +int ret;u32 ctrl0, ctrl1; -mxs_reset_block (host->base); + ret =mxs_reset_block (host->base); +if (ret) +return ret; ctrl0 =BM_SSP_CTRL0_IGNORE_CRC ; ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
@@ -219,6 +222,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)writel (ctrl0, host->base +HW_SSP_CTRL0 );writel (ctrl1, host->base +HW_SSP_CTRL1 ); +return 0 ; } static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
@@ -717,9 +721,19 @@ static int mxs_mmc_probe(struct platform_device *pdev) ret =PTR_ERR (host->clk); goto out_iounmap; } -clk_enable (host->clk); + ret =clk_enable (host->clk); +if (ret) { +dev_err (mmc_dev (host->mmc), +"%s: failed to enable clock: %d\n" , __func__, ret); + goto out_clk_put; + } -mxs_mmc_reset (host); + ret =mxs_mmc_reset (host); +if (ret) { +dev_err (mmc_dev (host->mmc), +"%s: failed to reset controller: %d\n" , __func__, ret); + goto out_clk_put; + }dma_cap_zero (mask);dma_cap_set (DMA_SLAVE , mask);
@@ -834,7 +848,9 @@ static int mxs_mmc_resume(struct device *dev)struct mxs_mmc_host *host =mmc_priv (mmc);int ret =0 ; -clk_enable (host->clk); + ret =clk_enable (host->clk); +if (ret) +return ret; ret =mmc_resume_host (mmc);
Signature · 1 line
1.5.6.5
PATCH v3 4/4 mmc: mxs-mmc: Add an appropriate MODULE_ALIAS
--- drivers/mmc/host/mxs-mmc.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
drivers/mmc/host/mxs-mmc.c +1 -0
@@ -891,3 +891,4 @@ module_exit(mxs_mmc_exit);MODULE_DESCRIPTION ("FREESCALE MXS MMC peripheral" );MODULE_AUTHOR ("Freescale Semiconductor" );MODULE_LICENSE ("GPL" ); +MODULE_ALIAS ("platform:mxs-mmc" );
Signature · 1 line
1.5.6.5