igb: ptp hardware clock

This commit removes the legacy timecompare code from the igb driver and offers a tunable PHC instead.

Signed-off-by Richard Cochran <[email protected]>

---

drivers/net/ethernet/intel/igb/igb_ptp.c +22 -0

+void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
+			    struct skb_shared_hwtstamps *hwtstamps,
+			    u64 systim)
+{
+	u64 ns;
+	unsigned long flags;
+	unsigned int shift;
+	int msb_set;
+
+	switch (adapter->hw.mac.type) {
+	case e1000_i350:
+	case e1000_82580:
+		shift = OFL_SHIFT_82580;
+		msb_set = (systim >> 32) & SYSTIMH_MSB_82580;
+		break;
+	case e1000_82576:
+		shift = OFL_SHIFT_82576;
+		msb_set = (systim >> 32) & SYSTIMH_MSB_82576;
+		break;
+	default:
+		return;
+	}

Adding a (shared) spinlock on a multiqueue device is source of extra delay (because of extra cache line trafic), I guess.

It seems current code doesnt need a spinlock, maybe it was a bug ?

Quoted 5 lines · Eric Dumazet

Adding a (shared) spinlock on a multiqueue device is source of extra delay (because of extra cache line trafic), I guess.

It seems current code doesnt need a spinlock, maybe it was a bug ?

(I didn't think about the old code. I only deleted it. ;)

The spinlock is needed because reading the 64 bit time value involves reading two 32 registers. The first read latches the value. Ditto for writing.

In addition, here we have to watch the most significant bit for one-to-zero transistion, in order to keep count of the overflow.

It is too bad that we have to take the spinlock for every time stamped packet, but it is the hardware's fault for not providing a 64 bit wide nanosecond time register.

Quoted 4 lines

It is too bad that we have to take the spinlock for every time stamped packet, but it is the hardware's fault for not providing a 64 bit wide nanosecond time register.

Yes, probably. Are you sure a workaround is not possible, using a seqlock for synchronization of threads, and two hardware reads ?

Or maybe it doesnt matter at all :)

This commit removes the legacy timecompare code from the igb driver and offers a tunable PHC instead.

Signed-off-by Richard Cochran <[email protected]>

drivers/net/ethernet/intel/igb/igb_main.c +3 -146

-       if (hw->mac.type >= e1000_82580) {
-               stamp = rd32(E1000_SYSTIMR) >> 8;
-               shift = IGB_82580_TSYNC_SHIFT;
-       }
-
-       stamp |= (u64)rd32(E1000_SYSTIML) << shift;
-       stamp |= (u64)rd32(E1000_SYSTIMH) << (shift + 32);
-       return stamp;
-}
-
 /**
  * igb_get_hw_dev - return device
  * used by hardware layer to print debugging information

@@ -2080,7 +2052,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
 
 #endif
        /* do hw tstamp init after resetting */
-       igb_init_hw_timer(adapter);
+       igb_ptp_init(adapter);
 
        dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
        /* print bus type/speed/width info */

@@ -2150,6 +2122,8 @@ static void __devexit igb_remove(struct pci_dev *pdev)
        struct igb_adapter *adapter = netdev_priv(netdev);
        struct e1000_hw *hw = &adapter->hw;
 
+       igb_ptp_remove(adapter);
+
        /*
         * The watchdog timer may be rescheduled, so explicitly
         * disable watchdog from being rescheduled.

@@ -2269,112 +2243,6 @@ out:
 }
 
 /**
- * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp
- * @adapter: board private structure to initialize
- *
- * igb_init_hw_timer initializes the function pointer and values for the hw
- * timer found in hardware.
- **/
-static void igb_init_hw_timer(struct igb_adapter *adapter)
-{
-       struct e1000_hw *hw = &adapter->hw;
-
-       switch (hw->mac.type) {
-       case e1000_i350:
-       case e1000_82580:
-               memset(&adapter->cycles, 0, sizeof(adapter->cycles));
-               adapter->cycles.read = igb_read_clock;
-               adapter->cycles.mask = CLOCKSOURCE_MASK(64);
-               adapter->cycles.mult = 1;
-               /*
-                * The 82580 timesync updates the system timer every 8ns by 8ns
-                * and the value cannot be shifted.  Instead we need to shift
-                * the registers to generate a 64bit timer value.  As a result
-                * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by
-                * 24 in order to generate a larger value for synchronization.
-                */
-               adapter->cycles.shift = IGB_82580_TSYNC_SHIFT;
-               /* disable system timer temporarily by setting bit 31 */
-               wr32(E1000_TSAUXC, 0x80000000);
-               wrfl();
-
-               /* Set registers so that rollover occurs soon to test this. */
-               wr32(E1000_SYSTIMR, 0x00000000);
-               wr32(E1000_SYSTIML, 0x80000000);
-               wr32(E1000_SYSTIMH, 0x000000FF);
-               wrfl();
-
-               /* enable system timer by clearing bit 31 */
-               wr32(E1000_TSAUXC, 0x0);
-               wrfl();
-
-               timecounter_init(&adapter->clock,
-                                &adapter->cycles,
-                                ktime_to_ns(ktime_get_real()));
-               /*
-                * Synchronize our NIC clock against system wall clock. NIC
-                * time stamp reading requires ~3us per sample, each sample
-                * was pretty stable even under load => only require 10
-                * samples for each offset comparison.
-                */
-               memset(&adapter->compare, 0, sizeof(adapter->compare));
-               adapter->compare.source = &adapter->clock;
-               adapter->compare.target = ktime_get_real;
-               adapter->compare.num_samples = 10;
-               timecompare_update(&adapter->compare, 0);
-               break;
-       case e1000_82576:
-               /*
-                * Initialize hardware timer: we keep it running just in case
-                * that some program needs it later on.
-                */
-               memset(&adapter->cycles, 0, sizeof(adapter->cycles));
-               adapter->cycles.read = igb_read_clock;
-               adapter->cycles.mask = CLOCKSOURCE_MASK(64);
-               adapter->cycles.mult = 1;
-               /**
-                * Scale the NIC clock cycle by a large factor so that
-                * relatively small clock corrections can be added or
-                * subtracted at each clock tick. The drawbacks of a large
-                * factor are a) that the clock register overflows more quickly
-                * (not such a big deal) and b) that the increment per tick has
-                * to fit into 24 bits.  As a result we need to use a shift of
-                * 19 so we can fit a value of 16 into the TIMINCA register.
-                */
-               adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
-               wr32(E1000_TIMINCA,
-                               (1 << E1000_TIMINCA_16NS_SHIFT) |
-                               (16 << IGB_82576_TSYNC_SHIFT));
-
-               /* Set registers so that rollover occurs soon to test this. */
-               wr32(E1000_SYSTIML, 0x00000000);
-               wr32(E1000_SYSTIMH, 0xFF800000);
-               wrfl();
-
-               timecounter_init(&adapter->clock,
-                                &adapter->cycles,
-                                ktime_to_ns(ktime_get_real()));
-               /*
-                * Synchronize our NIC clock against system wall clock. NIC
-                * time stamp reading requires ~3us per sample, each sample
-                * was pretty stable even under load => only require 10
-                * samples for each offset comparison.
-                */
-               memset(&adapter->compare, 0, sizeof(adapter->compare));
-               adapter->compare.source = &adapter->clock;
-               adapter->compare.target = ktime_get_real;
-               adapter->compare.num_samples = 10;
-               timecompare_update(&adapter->compare, 0);
-               break;
-       case e1000_82575:
-               /* 82575 does not support timesync */
-       default:
-               break;
-       }
-
-}
-
-/**
  * igb_sw_init - Initialize general software structures (struct igb_adapter)
  * @adapter: board private structure to initialize
  *

@@ -5628,35 +5496,6 @@ static int igb_poll(struct napi_struct *napi, int budget)
 }
 
 /**
- * igb_systim_to_hwtstamp - convert system time value to hw timestamp
- * @adapter: board private structure
- * @shhwtstamps: timestamp structure to update
- * @regval: unsigned 64bit system time value.
- *
- * We need to convert the system time value stored in the RX/TXSTMP registers
- * into a hwtstamp which can be used by the upper level timestamping functions
- */
-static void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
-                                   struct skb_shared_hwtstamps *shhwtstamps,
-                                   u64 regval)
-{
-       u64 ns;
-
-       /*
-        * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to
-        * 24 to match clock shift we setup earlier.
-        */
-       if (adapter->hw.mac.type >= e1000_82580)
-               regval <<= IGB_82580_TSYNC_SHIFT;
-
-       ns = timecounter_cyc2time(&adapter->clock, regval);
-       timecompare_update(&adapter->compare, ns);
-       memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
-       shhwtstamps->hwtstamp = ns_to_ktime(ns);
-       shhwtstamps->syststamp = timecompare_transform(&adapter->compare, ns);
-}
-
-/**
  * igb_tx_hwtstamp - utility function which checks for TX time stamp
  * @q_vector: pointer to q_vector containing needed info
  * @buffer: pointer to igb_tx_buffer structure

drivers/net/ethernet/intel/igb/igb_ptp.c +0 -0

index 7a9f6bc..7a62980 100644

drivers/net/ethernet/intel/igb/igb_ptp.c +19 -0

+ * @systim: unsigned 64bit system time value.
+ *
+ * We need to convert the system time value stored in the RX/TXSTMP registers
+ * into a hwtstamp which can be used by the upper level timestamping functions
+ */
+void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
+                           struct skb_shared_hwtstamps *hwtstamps,
+                           u64 systim)
+{
+       u64 ns;
+       unsigned long flags;
+       unsigned int shift;
+       int msb_set;
+
+       switch (adapter->hw.mac.type) {
+       case e1000_i350:
+       case e1000_82580:
+               shift = OFL_SHIFT_82580;
+               msb_set = (systim >> 32) & SYSTIMH_MSB_82580;

drivers/net/ethernet/intel/igb/igb_ptp.c +8 -0

+
+       ns = igb_overflow_get(adapter, systim, msb_set, shift);
+
+       spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
+
+       memset(hwtstamps, 0, sizeof(*hwtstamps));
+       hwtstamps->hwtstamp = ns_to_ktime(ns);
+}

Quoted 4 lines · Richard Cochran

This commit removes the legacy timecompare code from the igb driver and offers a tunable PHC instead.

Signed-off-by Richard Cochran <[email protected]>

Richard, first, thanks for this work, I have some feedback and request you make a V2.

-----Original Message-----
From: Richard Cochran [mailto:[email protected]]
Sent: Thursday, December 15, 2011 8:13 AM
To: Brandeburg, Jesse
Cc: [email protected]; [email protected]; Keller, Jacob E; Kirsher, Jeffrey T; Ronciak, John; John Stultz; Thomas Gleixner; Wyborny, Carolyn
Subject: Re: [PATCH net-next 2/2] igb: offer a PTP Hardware Clock instead of the timecompare method

Quoted 2 lines · Jesse Brandeburg

Quoted 1 line · Richard Cochran

This commit removes the legacy timecompare code from the igb driver

and

Quoted 6 lines

Quoted 3 lines

offers a tunable PHC instead.

Signed-off-by Richard Cochran <[email protected]>

Richard, first, thanks for this work, I have some feedback and request you make a V2.

Thanks for your feedback, I'll will work your comments in.

Any chance of getting the driver tested on a 82576?

Thanks,

Richard

Quoted 2 lines

-----Original Message-----
From: Richard Cochran [mailto:[email protected]]

Quoted 5 lines

Any chance of getting the driver tested on a 82576?

Thanks,

Richard

I will request this testing and let you know.

drivers/net/ethernet/intel/igb/igb_ptp.c +8 -0

+void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
+			    struct skb_shared_hwtstamps *hwtstamps,
+			    u64 systim)
+{
+	u64 ns;
+	unsigned long flags;
+	unsigned int shift;
+	int msb_set;

drivers/net/ethernet/intel/igb/igb_ptp.c +14 -0

+		break;
+	default:
+		return;
+	}
+
+	spin_lock_irqsave(&adapter->tmreg_lock, flags);
+
+	ns = igb_overflow_get(adapter, systim, msb_set, shift);
+
+	spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
+
+	memset(hwtstamps, 0, sizeof(*hwtstamps));
+	hwtstamps->hwtstamp = ns_to_ktime(ns);
+}

Signature · 1 line

1.7.2.5