Backport fixes and add FRI2 support to pch_uart

PATCH In review Darren Hart 2 participants 7 messages Mar 2, 2012 TTY layer and serial drivers

lore

Share & tools

lore

Darren Hart

author

2012-03-02 00:00 UTC #0 lore raw

cover Backport fixes and add FRI2 support to pch_uart

Backport consle support and add the 4 new patches (from me) enabling the FRI2 serial port.

My patches have been sent to LKML and have received the approval one of the driver maintainers. They are currently pending review and a pull from Greg KH.

Please apply to standard/base and down.

The following changes since commit ee3b6f8f773c373ca2ef2e4a04d2fd58b748eaee:

Merge branch 'base' into standard/base (2012-02-28 13:31:59 -0500)

are available in the git repository at:

git://git.infradead.org/users/dvhart/linux-yocto-3.2.git dvhart/standard/pch_uart
http://git.infradead.org/users/dvhart/linux-yocto-3.2.git/shortlog/refs/heads/dvhart/standard/pch_uart

Alexander Stein (1):
drivers/tty/serial/pch_uart.c: add console support

Darren Hart (4):
pch_uart: Use uartclk instead of base_baud
pch_uart: Add Fish River Island II uart clock quirks
pch_uart: Add user_uartclk parameter
pch_uart: Use existing default_baud in setup_console

 drivers/tty/serial/Kconfig    |    9 ++
 drivers/tty/serial/pch_uart.c |  209 +++++++++++++++++++++++++++++++++++++---
 2 files changed, 202 insertions(+), 16 deletions(-)

Signature · 1 line

1.7.6.5

Darren Hart

author

2012-03-02 00:00 UTC #1 lore raw

PATCH 1/5 drivers/tty/serial/pch_uart.c: add console support

From: Alexander Stein <[email protected]>

commit e30f867d402d6dcc2d03d8dd5da3863f7c83572a upstream.

Add console support to pch_uart. To enable append e.g. console=ttyPCH0,115200 to your kernel command line.

This is not expected work on CM-iTC boards due to their having a different clock.

Signed-off-by Alexander Stein <[email protected]>

Cc Alan Cox <[email protected]>

Signed-off-by Andrew Morton <[email protected]>

Signed-off-by Greg Kroah-Hartman <[email protected]>

---
 drivers/tty/serial/Kconfig    |    9 +++
 drivers/tty/serial/pch_uart.c |  160 ++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 168 insertions(+), 1 deletions(-)

drivers/tty/serial/Kconfig +9 -0

index 925a1e5..13e5f51 100644
@@ -1575,6 +1575,15 @@ config SERIAL_PCH_UART
 	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
 	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
 
+config SERIAL_PCH_UART_CONSOLE
+	bool "Support for console on Intel EG20T PCH UART/OKI SEMICONDUCTOR ML7213 IOH"
+	depends on SERIAL_PCH_UART=y
+	select SERIAL_CORE_CONSOLE
+	help
+	  Say Y here if you wish to use the PCH UART as the system console
+	  (the system  console is the device which receives all kernel messages and
+	  warnings and which allows logins in single user mode).
+
 config SERIAL_MSM_SMD
 	bool "Enable tty device interface for some SMD ports"
 	default n

drivers/tty/serial/pch_uart.c +159 -1

214 lines not on this page · raw message

Signature · 1 line

1.7.6.5

Darren Hart

author

2012-03-02 00:00 UTC #2 lore raw

PATCH 2/5 pch_uart: Use uartclk instead of base_baud

In reply to Darren Hart

From: Darren Hart <[email protected]>

The term "base baud" refers to the fastest baud rate the device can communicate at. This is clock/16. pch_uart is using base_baud as the clock itself. Rename the variables to be semantically correct.

Signed-off-by Darren Hart <[email protected]>

CC Tomoya MORINAGA <[email protected]>

CC Feng Tang <[email protected]>

CC Greg Kroah-Hartman <[email protected]>

CC Alan Cox <[email protected]>

CC [email protected]

---
 drivers/tty/serial/pch_uart.c |   24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)

drivers/tty/serial/pch_uart.c +12 ~~-12~~

index de0f613..fd5d6df 100644
@@ -203,7 +203,7 @@ enum {
 
 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 
-#define DEFAULT_BAUD_RATE 1843200 /* 1.8432MHz */
+#define DEFAULT_UARTCLK 1843200 /* 1.8432MHz */
 
 struct pch_uart_buffer {
 	unsigned char *buf;

@@ -218,7 +218,7 @@ struct eg20t_port {
 	unsigned int iobase;
 	struct pci_dev *pdev;
 	int fifo_size;
-	int base_baud;
+	int uartclk;
 	int start_tx;
 	int start_rx;
 	int tx_empty;

@@ -293,7 +293,7 @@ static const int trigger_level_16[4] = { 1, 4, 8, 14 };
 static const int trigger_level_1[4] = { 1, 1, 1, 1 };
 
 static void pch_uart_hal_request(struct pci_dev *pdev, int fifosize,
-				 int base_baud)
+				 int uartclk)
 {
 	struct eg20t_port *priv = pci_get_drvdata(pdev);

@@ -332,7 +332,7 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud,
 	unsigned int dll, dlm, lcr;
 	int div;
 
-	div = DIV_ROUND_CLOSEST(priv->base_baud / 16, baud);
+	div = DIV_ROUND_CLOSEST(priv->uartclk / 16, baud);
 	if (div < 0 || USHRT_MAX <= div) {
 		dev_err(priv->port.dev, "Invalid Baud(div=0x%x)\n", div);
 		return -EINVAL;

@@ -1153,9 +1153,9 @@ static int pch_uart_startup(struct uart_port *port)
 	priv->tx_empty = 1;
 
 	if (port->uartclk)
-		priv->base_baud = port->uartclk;
+		priv->uartclk = port->uartclk;
 	else
-		port->uartclk = priv->base_baud;
+		port->uartclk = priv->uartclk;
 
 	pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT);
 	ret = pch_uart_hal_set_line(priv, default_baud,

@@ -1507,7 +1507,7 @@ static int __init pch_console_setup(struct console *co, char *options)
 		return -ENODEV;
 
 	/* setup uartclock */
-	port->uartclk = DEFAULT_BAUD_RATE;
+	port->uartclk = DEFAULT_UARTCLK;
 
 	if (options)
 		uart_parse_options(options, &baud, &parity, &bits, &flow);

@@ -1550,7 +1550,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	unsigned int iobase;
 	unsigned int mapbase;
 	unsigned char *rxbuf;
-	int fifosize, base_baud;
+	int fifosize, uartclk;
 	int port_type;
 	struct pch_uart_driver_data *board;
 	const char *board_name;

@@ -1566,12 +1566,12 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	if (!rxbuf)
 		goto init_port_free_txbuf;
 
-	base_baud = DEFAULT_BAUD_RATE;
+	uartclk = DEFAULT_UARTCLK;
 
 	/* quirk for CM-iTC board */
 	board_name = dmi_get_system_info(DMI_BOARD_NAME);
 	if (board_name && strstr(board_name, "CM-iTC"))
-		base_baud = 192000000; /* 192.0MHz */
+		uartclk = 192000000; /* 192.0MHz */
 
 	switch (port_type) {
 	case PORT_UNKNOWN:

@@ -1597,7 +1597,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	priv->rxbuf.size = PAGE_SIZE;
 
 	priv->fifo_size = fifosize;
-	priv->base_baud = base_baud;
+	priv->uartclk = uartclk;
 	priv->port_type = PORT_MAX_8250 + port_type + 1;
 	priv->port.dev = &pdev->dev;
 	priv->port.iobase = iobase;

@@ -1614,7 +1614,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	spin_lock_init(&priv->port.lock);
 
 	pci_set_drvdata(pdev, priv);
-	pch_uart_hal_request(pdev, fifosize, base_baud);
+	pch_uart_hal_request(pdev, fifosize, uartclk);
 
 #ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
 	pch_uart_ports[board->line_no] = priv;

Signature · 1 line

1.7.6.5

Darren Hart

author

2012-03-02 00:00 UTC #4 lore raw

PATCH 4/5 pch_uart: Add user_uartclk parameter

In reply to Darren Hart

From: Darren Hart <[email protected]>

For cases where boards with non-default clocks are not yet added to the kernel or when the clock varies across hardware revisions, it is useful to be able to specify the UART clock on the kernel command line.

Add the user_uartclk parameter and prefer it, if set, to the default and board specific UART clock settings. Specify user_uartclock on the command-line with "pch_uart.user_uartclk=48000000".

Signed-off-by Darren Hart <[email protected]>

CC Tomoya MORINAGA <[email protected]>

CC Feng Tang <[email protected]>

CC Greg Kroah-Hartman <[email protected]>

CC Alan Cox <[email protected]>

CC [email protected]

---
 drivers/tty/serial/pch_uart.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

drivers/tty/serial/pch_uart.c +5 -0

index 1706169..2233e31 100644
@@ -290,6 +290,7 @@ static struct pch_uart_driver_data drv_dat[] = {
 static struct eg20t_port *pch_uart_ports[PCH_UART_NR];
 #endif
 static unsigned int default_baud = 9600;
+static unsigned int user_uartclk = 0;
 static const int trigger_level_256[4] = { 1, 64, 128, 224 };
 static const int trigger_level_64[4] = { 1, 16, 32, 56 };
 static const int trigger_level_16[4] = { 1, 4, 8, 14 };

@@ -300,6 +301,9 @@ static int pch_uart_get_uartclk(void)
 {
 	const char *cmp;
 
+	if (user_uartclk)
+		return user_uartclk;
+
 	cmp = dmi_get_system_info(DMI_BOARD_NAME);
 	if (cmp && strstr(cmp, "CM-iTC"))
 		return CMITC_UARTCLK;

@@ -1799,3 +1803,4 @@ module_exit(pch_uart_module_exit);
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("Intel EG20T PCH UART PCI Driver");
 module_param(default_baud, uint, S_IRUGO);
+module_param(user_uartclk, uint, S_IRUGO);

Signature · 1 line

1.7.6.5

Darren Hart

author

2012-03-02 00:00 UTC #3 lore raw

PATCH 3/5 pch_uart: Add Fish River Island II uart clock quirks

In reply to Darren Hart

From: Darren Hart <[email protected]>

Add support for the Fish River Island II (FRI2) UART clock following the CM-iTC quirk handling mechanism. Depending on the firmware installed on the device, the FRI2 uses a 48MHz or a 64MHz UART clock. This is detected with DMI strings.

Add similar UART clock quirk handling to the pch_console_setup() function to enable kernel messages on boards with non-standard UART clocks.

Per Alan's suggestion, abstract out UART clock selection into pch_uart_get_uartclk() to avoid code duplication.

Signed-off-by Darren Hart <[email protected]>

CC Tomoya MORINAGA <[email protected]>

CC Feng Tang <[email protected]>

CC Greg Kroah-Hartman <[email protected]>

CC Alan Cox <[email protected]>

CC [email protected]

---
 drivers/tty/serial/pch_uart.c |   42 +++++++++++++++++++++++++++-------------
 1 files changed, 28 insertions(+), 14 deletions(-)

drivers/tty/serial/pch_uart.c +28 ~~-14~~

index fd5d6df..1706169 100644
@@ -203,7 +203,10 @@ enum {
 
 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 
-#define DEFAULT_UARTCLK 1843200 /* 1.8432MHz */
+#define DEFAULT_UARTCLK   1843200 /*   1.8432 MHz */
+#define CMITC_UARTCLK   192000000 /* 192.0000 MHz */
+#define FRI2_64_UARTCLK  64000000 /*  64.0000 MHz */
+#define FRI2_48_UARTCLK  48000000 /*  48.0000 MHz */
 
 struct pch_uart_buffer {
 	unsigned char *buf;

@@ -292,6 +295,26 @@ static const int trigger_level_64[4] = { 1, 16, 32, 56 };
 static const int trigger_level_16[4] = { 1, 4, 8, 14 };
 static const int trigger_level_1[4] = { 1, 1, 1, 1 };
 
+/* Return UART clock, checking for board specific clocks. */
+static int pch_uart_get_uartclk(void)
+{
+	const char *cmp;
+
+	cmp = dmi_get_system_info(DMI_BOARD_NAME);
+	if (cmp && strstr(cmp, "CM-iTC"))
+		return CMITC_UARTCLK;
+
+	cmp = dmi_get_system_info(DMI_BIOS_VERSION);
+	if (cmp && strnstr(cmp, "FRI2", 4))
+		return FRI2_64_UARTCLK;
+
+	cmp = dmi_get_system_info(DMI_PRODUCT_NAME);
+	if (cmp && strstr(cmp, "Fish River Island II"))
+		return FRI2_48_UARTCLK;
+
+	return DEFAULT_UARTCLK;
+}
+
 static void pch_uart_hal_request(struct pci_dev *pdev, int fifosize,
 				 int uartclk)
 {

@@ -1506,8 +1529,7 @@ static int __init pch_console_setup(struct console *co, char *options)
 	if (!port || (!port->iobase && !port->membase))
 		return -ENODEV;
 
-	/* setup uartclock */
-	port->uartclk = DEFAULT_UARTCLK;
+	port->uartclk = pch_uart_get_uartclk();
 
 	if (options)
 		uart_parse_options(options, &baud, &parity, &bits, &flow);

@@ -1550,10 +1572,9 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	unsigned int iobase;
 	unsigned int mapbase;
 	unsigned char *rxbuf;
-	int fifosize, uartclk;
+	int fifosize;
 	int port_type;
 	struct pch_uart_driver_data *board;
-	const char *board_name;
 
 	board = &drv_dat[id->driver_data];
 	port_type = board->port_type;

@@ -1566,13 +1587,6 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	if (!rxbuf)
 		goto init_port_free_txbuf;
 
-	uartclk = DEFAULT_UARTCLK;
-
-	/* quirk for CM-iTC board */
-	board_name = dmi_get_system_info(DMI_BOARD_NAME);
-	if (board_name && strstr(board_name, "CM-iTC"))
-		uartclk = 192000000; /* 192.0MHz */
-
 	switch (port_type) {
 	case PORT_UNKNOWN:
 		fifosize = 256; /* EG20T/ML7213: UART0 */

@@ -1597,7 +1611,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	priv->rxbuf.size = PAGE_SIZE;
 
 	priv->fifo_size = fifosize;
-	priv->uartclk = uartclk;
+	priv->uartclk = pch_uart_get_uartclk();
 	priv->port_type = PORT_MAX_8250 + port_type + 1;
 	priv->port.dev = &pdev->dev;
 	priv->port.iobase = iobase;

@@ -1614,7 +1628,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	spin_lock_init(&priv->port.lock);
 
 	pci_set_drvdata(pdev, priv);
-	pch_uart_hal_request(pdev, fifosize, uartclk);
+	pch_uart_hal_request(pdev, fifosize, priv->uartclk);
 
 #ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
 	pch_uart_ports[board->line_no] = priv;

Signature · 1 line

1.7.6.5

Darren Hart

author

2012-03-02 00:00 UTC #5 lore raw

PATCH 5/5 pch_uart: Use existing default_baud in setup_console

In reply to Darren Hart

From: Darren Hart <[email protected]>

Rather than hardcode 9600, use the existing default_baud parameter (which also defaults to 9600).

Signed-off-by Darren Hart <[email protected]>

CC Tomoya MORINAGA <[email protected]>

CC Feng Tang <[email protected]>

CC Greg Kroah-Hartman <[email protected]>

CC Alan Cox <[email protected]>

CC [email protected]

---
 drivers/tty/serial/pch_uart.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

drivers/tty/serial/pch_uart.c +1 -1

index 2233e31..4be4c90 100644
@@ -1516,7 +1516,7 @@ pch_console_write(struct console *co, const char *s, unsigned int count)
 static int __init pch_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port;
-	int baud = 9600;
+	int baud = default_baud;
 	int bits = 8;
 	int parity = 'n';
 	int flow = 'n';

Signature · 1 line

1.7.6.5

Bruce Ashfield

2012-03-02 21:12 UTC #6 lore raw

In reply to Darren Hart

Quoted 7 lines · Darren Hart

Backport consle support and add the 4 new patches (from me) enabling the FRI2 serial port.
My patches have been sent to LKML and have received the approval one of the driver maintainers. They are currently pending review and a pull from Greg KH.
Please apply to standard/base and down.

merged. I've grouped it with my 3.2.9 and -rt updates. Will have it pushed out after some build testing.

Bruce

Quoted 23 lines

The following changes since commit ee3b6f8f773c373ca2ef2e4a04d2fd58b748eaee:
   Merge branch 'base' into standard/base (2012-02-28 13:31:59 -0500)
are available in the git repository at:
git://git.infradead.org/users/dvhart/linux-yocto-3.2.git dvhart/standard/pch_uart
http://git.infradead.org/users/dvhart/linux-yocto-3.2.git/shortlog/refs/heads/dvhart/standard/pch_uart
Alexander Stein (1):
drivers/tty/serial/pch_uart.c: add console support
Darren Hart (4):
pch_uart: Use uartclk instead of base_baud
pch_uart: Add Fish River Island II uart clock quirks
pch_uart: Add user_uartclk parameter
pch_uart: Use existing default_baud in setup_console
  drivers/tty/serial/Kconfig    |    9 ++
  drivers/tty/serial/pch_uart.c |  209 +++++++++++++++++++++++++++++++++++++---
  2 files changed, 202 insertions(+), 16 deletions(-)