pch_uart: Cleanups, board quirks, and user uartclk parameter
v3 cover pch_uart: Cleanups, board quirks, and user uartclk parameter
This series does some minor clean-up to the pch_uart driver, adds support for the Fish River Island II UART clock quirks, and introduces a user_uartclk parameter to aid in developing for early and changing hardware.
In order to support an early serial console, we cannot rely on the pch_phub probe function to setup the CFGCLK register. This series relies on the board quirks and does not force the setting of the CLKREG in the pch_phub code. Instead, it aligns with what is the default configuration (defined by firmware) for a given board. The user_uartclk parameter provides a mechanism to force a specific uartclk if necessary.
V2: Incorporates Alan Cox's feedback into 2/4: Add Fish River Island II uart
clock quirks, refactoring the clock quirks into a new function and using a more appropriate name for a reused string variable.
Add support for the two firmware variants for the FRI2.
V3: Rebase on linux-next.git/master rather than linux-2.6.git.
Add module parameter descriptions.
The following changes since commit d5ba8c14a256799efb1048151fe3490f9cb989b9:
Add linux-next specific files for 20120309 (2012-03-09 19:04:19 +1100)
are available in the git repository at:
git://git.infradead.org/users/dvhart/linux-next.git pch_uart_v3
http://git.infradead.org/users/dvhart/linux-next.git/shortlog/refs/heads/pch_uart_v3
Darren Hart (5):
pch_uart: Use uartclk instead of base_baud
pch_uart: Add Fish River Island II uart clock quirks
pch_uart: Add user_uartclk parameter
pch_uart: Use existing default_baud in setup_console
pch_uart: Add module parameter descriptions
drivers/tty/serial/pch_uart.c | 59 ++++++++++++++++++++++++++++------------ 1 files changed, 41 insertions(+), 18 deletions(-)
Signature · 1 line
1.7.6.5
PATCH v3 1/5 pch_uart: Use uartclk instead of base_baud
The term "base baud" refers to the fastest baud rate the device can communicate at. This is clock/16. pch_uart is using base_baud as the clock itself. Rename the variables to be semantically correct.
--- drivers/tty/serial/pch_uart.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-)
drivers/tty/serial/pch_uart.c +10 -10
@@ -206,7 +206,7 @@ enum {#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) -#define DEFAULT_BAUD_RATE 1843200/* 1.8432MHz */ +#define DEFAULT_UARTCLK 1843200/* 1.8432MHz */ struct pch_uart_buffer {unsigned char *buf;
@@ -221,7 +221,7 @@ struct eg20t_port {unsigned int iobase;struct pci_dev *pdev;int fifo_size; -int base_baud; +int uartclk;int start_tx;int start_rx;int tx_empty;
@@ -387,7 +387,7 @@ static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud,unsigned int dll, dlm, lcr;int div; - div =DIV_ROUND_CLOSEST (priv->base_baud /16 , baud); + div =DIV_ROUND_CLOSEST (priv->uartclk /16 , baud);if (div <0 ||USHRT_MAX <= div) {dev_err (priv->port.dev,"Invalid Baud(div=0x%x)\n" , div);return -EINVAL ;
@@ -1205,9 +1205,9 @@ static int pch_uart_startup(struct uart_port *port) priv->tx_empty =1 ;if (port->uartclk) - priv->base_baud = port->uartclk; + priv->uartclk = port->uartclk;else - port->uartclk = priv->base_baud; + port->uartclk = priv->uartclk;pch_uart_hal_disable_interrupt (priv,PCH_UART_HAL_ALL_INT ); ret = pch_uart_hal_set_line(priv, default_baud,
@@ -1557,7 +1557,7 @@ static int __init pch_console_setup(struct console *co, char *options)return -ENODEV ;/* setup uartclock */ - port->uartclk =DEFAULT_BAUD_RATE ; + port->uartclk =DEFAULT_UARTCLK ;if (options)uart_parse_options (options, &baud, &parity, &bits, &flow);
@@ -1600,7 +1600,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,unsigned int iobase;unsigned int mapbase;unsigned char *rxbuf; -int fifosize, base_baud; +int fifosize, uartclk;int port_type;struct pch_uart_driver_data *board;const char *board_name;
@@ -1617,12 +1617,12 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,if (!rxbuf) goto init_port_free_txbuf; - base_baud =DEFAULT_BAUD_RATE ; + uartclk =DEFAULT_UARTCLK ;/* quirk for CM-iTC board */ board_name =dmi_get_system_info (DMI_BOARD_NAME );if (board_name &&strstr (board_name,"CM-iTC" )) - base_baud =192000000 ;/* 192.0MHz */ + uartclk =192000000 ;/* 192.0MHz */ switch (port_type) {case PORT_UNKNOWN :
@@ -1648,7 +1648,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, priv->rxbuf.size =PAGE_SIZE ; priv->fifo_size = fifosize; - priv->base_baud = base_baud; + priv->uartclk = uartclk; priv->port_type =PORT_MAX_8250 + port_type +1 ; priv->port.dev = &pdev->dev; priv->port.iobase = iobase;
Signature · 1 line
1.7.6.5
PATCH v3 2/5 pch_uart: Add Fish River Island II uart clock quirks
Add support for the Fish River Island II (FRI2) UART clock following the CM-iTC quirk handling mechanism. Depending on the firmware installed on the device, the FRI2 uses a 48MHz or a 64MHz UART clock. This is detected with DMI strings.
Add similar UART clock quirk handling to the pch_console_setup() function to enable kernel messages on boards with non-standard UART clocks.
Per Alan's suggestion, abstract out UART clock selection into pch_uart_get_uartclk() to avoid code duplication.
--- drivers/tty/serial/pch_uart.c | 40 +++++++++++++++++++++++++++------------- 1 files changed, 27 insertions(+), 13 deletions(-)
drivers/tty/serial/pch_uart.c +27 -13
@@ -206,7 +206,10 @@ enum {#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) -#define DEFAULT_UARTCLK 1843200/* 1.8432MHz */ +#define DEFAULT_UARTCLK 1843200/* 1.8432 MHz */ +#define CMITC_UARTCLK 192000000/* 192.0000 MHz */ +#define FRI2_64_UARTCLK 64000000/* 64.0000 MHz */ +#define FRI2_48_UARTCLK 48000000/* 48.0000 MHz */ struct pch_uart_buffer {unsigned char *buf;
@@ -364,6 +367,26 @@ static const struct file_operations port_regs_ops = { };#endif /* CONFIG_DEBUG_FS */ +/* Return UART clock, checking for board specific clocks. */ +static int pch_uart_get_uartclk (void ) +{ +const char *cmp; + + cmp =dmi_get_system_info (DMI_BOARD_NAME ); +if (cmp &&strstr (cmp,"CM-iTC" )) +return CMITC_UARTCLK ; + + cmp =dmi_get_system_info (DMI_BIOS_VERSION ); +if (cmp &&strnstr (cmp,"FRI2" ,4 )) +return FRI2_64_UARTCLK ; + + cmp =dmi_get_system_info (DMI_PRODUCT_NAME ); +if (cmp &&strstr (cmp,"Fish River Island II" )) +return FRI2_48_UARTCLK ; + +return DEFAULT_UARTCLK ; +} +static void pch_uart_hal_enable_interrupt (struct eg20t_port *priv,unsigned int flag) {
@@ -1556,8 +1579,7 @@ static int __init pch_console_setup(struct console *co, char *options)if (!port || (!port->iobase && !port->membase))return -ENODEV ; -/* setup uartclock */ - port->uartclk =DEFAULT_UARTCLK ; + port->uartclk =pch_uart_get_uartclk ();if (options)uart_parse_options (options, &baud, &parity, &bits, &flow);
@@ -1600,10 +1622,9 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,unsigned int iobase;unsigned int mapbase;unsigned char *rxbuf; -int fifosize, uartclk; +int fifosize;int port_type;struct pch_uart_driver_data *board; -const char *board_name;char name[32 ];/* for debugfs file name */ board = &drv_dat[id->driver_data];
@@ -1617,13 +1638,6 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,if (!rxbuf) goto init_port_free_txbuf; - uartclk =DEFAULT_UARTCLK ; - -/* quirk for CM-iTC board */ - board_name =dmi_get_system_info (DMI_BOARD_NAME ); -if (board_name &&strstr (board_name,"CM-iTC" )) - uartclk =192000000 ;/* 192.0MHz */ -switch (port_type) {case PORT_UNKNOWN : fifosize =256 ;/* EG20T/ML7213: UART0 */
@@ -1648,7 +1662,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, priv->rxbuf.size =PAGE_SIZE ; priv->fifo_size = fifosize; - priv->uartclk = uartclk; + priv->uartclk =pch_uart_get_uartclk (); priv->port_type =PORT_MAX_8250 + port_type +1 ; priv->port.dev = &pdev->dev; priv->port.iobase = iobase;
Signature · 1 line
1.7.6.5
PATCH v3 3/5 pch_uart: Add user_uartclk parameter
In reply to Darren HartFor cases where boards with non-default clocks are not yet added to the kernel or when the clock varies across hardware revisions, it is useful to be able to specify the UART clock on the kernel command line.
Add the user_uartclk parameter and prefer it, if set, to the default and board specific UART clock settings. Specify user_uartclock on the command-line with "pch_uart.user_uartclk=48000000".
--- drivers/tty/serial/pch_uart.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
drivers/tty/serial/pch_uart.c +5 -0
@@ -295,6 +295,7 @@ static struct pch_uart_driver_data drv_dat[] = {static struct eg20t_port *pch_uart_ports[PCH_UART_NR ];#endif static unsigned int default_baud =9600 ; +static unsigned int user_uartclk =0 ;static const int trigger_level_256[4 ] = {1 ,64 ,128 ,224 };static const int trigger_level_64[4 ] = {1 ,16 ,32 ,56 };static const int trigger_level_16[4 ] = {1 ,4 ,8 ,14 };
@@ -372,6 +373,9 @@ static int pch_uart_get_uartclk(void) {const char *cmp; +if (user_uartclk) +return user_uartclk; + cmp =dmi_get_system_info (DMI_BOARD_NAME );if (cmp &&strstr (cmp,"CM-iTC" ))return CMITC_UARTCLK ;
@@ -1860,3 +1864,4 @@ module_exit(pch_uart_module_exit);MODULE_LICENSE ("GPL v2" );MODULE_DESCRIPTION ("Intel EG20T PCH UART PCI Driver" );module_param (default_baud, uint,S_IRUGO ); +module_param (user_uartclk, uint,S_IRUGO );
Signature · 1 line
1.7.6.5
PATCH v3 4/5 pch_uart: Use existing default_baud in setup_console
In reply to Darren HartRather than hardcode 9600, use the existing default_baud parameter (which also defaults to 9600).
--- drivers/tty/serial/pch_uart.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/tty/serial/pch_uart.c +1 -1
@@ -1566,7 +1566,7 @@ pch_console_write(struct console *co, const char *s, unsigned int count)static int __init pch_console_setup (struct console *co,char *options) {struct uart_port *port; -int baud =9600 ; +int baud = default_baud;int bits =8 ;int parity ='n' ;int flow ='n' ;
Signature · 1 line
1.7.6.5
PATCH v3 5/5 pch_uart: Add module parameter descriptions
In reply to Darren HartDocument default_baud and user_uartclk module parameters.
--- drivers/tty/serial/pch_uart.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
drivers/tty/serial/pch_uart.c +4 -0
@@ -1864,4 +1864,8 @@ module_exit(pch_uart_module_exit);MODULE_LICENSE ("GPL v2" );MODULE_DESCRIPTION ("Intel EG20T PCH UART PCI Driver" );module_param (default_baud, uint,S_IRUGO ); +MODULE_PARM_DESC (default_baud, +"Default BAUD for initial driver state and console (default 9600)" );module_param (user_uartclk, uint,S_IRUGO ); +MODULE_PARM_DESC (user_uartclk, +"Override UART default or board specific UART clock" );
Signature · 1 line
1.7.6.5