video: da8xx-fb: runtime timing configuration
v3 cover video: da8xx-fb: runtime timing configuration
Hi,
This series makes da8xx-fb driver (device found on DaVinci and AM335x) capable of handling runtime timing configuration by adding fb_set_par.
The last change adds actual fb_set_par support. Other preceeding changes makes the way clear for it as well as does certain cleanup's on the way.
This has been tested on da850 evm as is. This was also tested on am335x-evm & am335x-evmsk with a series that adds DT support.
This is based on v3.8-rc3, this is the only change in this revision. The new version of this series is being posted so that this series can be applied easily (as __dev* are removed, there would be merge conflicts with v2, which was based on -rc2).
series
Regards
Afzal
v3: rebased over -rc3, no functional changes
v2: disable raster in fb_set_par properly
Afzal Mohammed (10):
video: da8xx-fb: fb_check_var enhancement
video: da8xx-fb: simplify lcd_reset
video: da8xx-fb: use modedb helper to update var
video: da8xx-fb: remove unneeded "var" initialization
video: da8xx-fb: store current display information
video: da8xx-fb: store clk rate even if !CPUFREQ
video: da8xx-fb: pix clk and clk div handling cleanup
video: da8xx-fb: store struct device *
video: da8xx-fb: report correct pixclock
video: da8xx-fb: fb_set_par support
drivers/video/da8xx-fb.c | 185 ++++++++++++++++++++++++++-------------------- 1 file changed, 105 insertions(+), 80 deletions(-)
Signature · 1 line
1.7.9.5
PATCH v3 2/10 video: da8xx-fb: simplify lcd_reset
lcd_reset function doesn't require any arguement, remove it.
--- drivers/video/da8xx-fb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/video/da8xx-fb.c +2 -2
@@ -681,7 +681,7 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green, }#undef CNVT_TOHW -static void lcd_reset (struct da8xx_fb_par *par) +static void da8xx_fb_lcd_reset (void ) {/* Disable the Raster if previously Enabled */ lcd_disable_raster (false);
@@ -721,7 +721,7 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,u32 bpp;int ret =0 ; -lcd_reset (par); +da8xx_fb_lcd_reset ();/* Calculate the divider */ lcd_calc_clk_divider (par);
Signature · 1 line
1.7.9.5
PATCH v3 3/10 video: da8xx-fb: use modedb helper to update var
In reply to Afzal Mohammedmodedb structure is now used to store panel information, run modedb helper over it for initial update of "var" information instead of equating each fields.
While at it, remove redundant update of bits_per_pixel.
Note: pixclock is overridden with proper value using an existing code as currently modedb is having it in Hz instead of ps, this would be fixed in a later change and this overide would be removed.
--- drivers/video/da8xx-fb.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-)
drivers/video/da8xx-fb.c +2 -16
@@ -1329,6 +1329,8 @@ static int fb_probe(struct platform_device *device) par->panel_power_ctrl (1 ); } +fb_videomode_to_var (&da8xx_fb_var, lcdc_info); +if (lcd_init (par, lcd_cfg, lcdc_info) <0 ) {dev_err (&device->dev,"lcd_init failed\n" ); ret = -EFAULT ;
@@ -1381,25 +1383,9 @@ static int fb_probe(struct platform_device *device) goto err_release_pl_mem; } -/* Initialize par */ - da8xx_fb_info->var.bits_per_pixel = lcd_cfg->bpp; - - da8xx_fb_var.xres = lcdc_info->xres; - da8xx_fb_var.xres_virtual = lcdc_info->xres; - - da8xx_fb_var.yres = lcdc_info->yres; - da8xx_fb_var.yres_virtual = lcdc_info->yres *LCD_NUM_BUFFERS ; - da8xx_fb_var.grayscale = lcd_cfg->panel_shade ==MONOCHROME ?1 :0 ; da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp; - - da8xx_fb_var.hsync_len = lcdc_info->hsync_len; - da8xx_fb_var.vsync_len = lcdc_info->vsync_len; - da8xx_fb_var.right_margin = lcdc_info->right_margin; - da8xx_fb_var.left_margin = lcdc_info->left_margin; - da8xx_fb_var.lower_margin = lcdc_info->lower_margin; - da8xx_fb_var.upper_margin = lcdc_info->upper_margin; da8xx_fb_var.pixclock =da8xxfb_pixel_clk_period (par);/* Initialize fbinfo */
Signature · 1 line
1.7.9.5
PATCH v3 1/10 video: da8xx-fb: fb_check_var enhancement
In reply to Afzal MohammedCheck whether "struct fb_var_screeninfo" fields are sane, if not update it to be within allowed limits.
If user sends down buggy "var" values, this will bring those within allowable limits. And fb_set_par is not supposed to change "var" values, fb_check_var has to ensure that values are proper.
--- drivers/video/da8xx-fb.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
drivers/video/da8xx-fb.c +18 -0
@@ -888,6 +888,9 @@ static int fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) {int err =0 ; +struct da8xx_fb_par *par = info->par; +int bpp = var->bits_per_pixel >>3 ; +unsigned long line_size = var->xres_virtual * bpp;if (var->bits_per_pixel >16 && lcd_revision ==LCD_VERSION_1 )return -EINVAL ;
@@ -955,6 +958,21 @@ static int fb_check_var(struct fb_var_screeninfo *var, var->green.msb_right =0 ; var->blue.msb_right =0 ; var->transp.msb_right =0 ; + +if (line_size * var->yres_virtual > par->vram_size) + var->yres_virtual = par->vram_size / line_size; + +if (var->yres > var->yres_virtual) + var->yres = var->yres_virtual; + +if (var->xres > var->xres_virtual) + var->xres = var->xres_virtual; + +if (var->xres + var->xoffset > var->xres_virtual) + var->xoffset = var->xres_virtual - var->xres; +if (var->yres + var->yoffset > var->yres_virtual) + var->yoffset = var->yres_virtual - var->yres; +return err; }
Signature · 1 line
1.7.9.5
PATCH v3 4/10 video: da8xx-fb: remove unneeded "var" initialization
In reply to Afzal Mohammedmodedb helper now updates "var" information based on the detected panel, remove the unnecessary initialization.
--- drivers/video/da8xx-fb.c | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-)
drivers/video/da8xx-fb.c +1 -21
@@ -131,10 +131,6 @@#define WSI_TIMEOUT 50#define PALETTE_SIZE 256 -#define LEFT_MARGIN 64 -#define RIGHT_MARGIN 64 -#define UPPER_MARGIN 32 -#define LOWER_MARGIN 32static void __iomem *da8xx_fb_reg_base;static struct resource *lcdc_regs;
@@ -184,23 +180,7 @@ struct da8xx_fb_par {u32 pseudo_palette[16 ]; }; -/* Variable Screen Information */ -static struct fb_var_screeninfo da8xx_fb_var = { - .xoffset =0 , - .yoffset =0 , - .transp = {0 ,0 ,0 }, - .nonstd =0 , - .activate =0 , - .height =-1 , - .width =-1 , - .accel_flags =0 , - .left_margin =LEFT_MARGIN , - .right_margin =RIGHT_MARGIN , - .upper_margin =UPPER_MARGIN , - .lower_margin =LOWER_MARGIN , - .sync =0 , - .vmode =FB_VMODE_NONINTERLACED -}; +static struct fb_var_screeninfo da8xx_fb_var;static struct fb_fix_screeninfo da8xx_fb_fix = { .id ="DA8xx FB Drv" ,
Signature · 1 line
1.7.9.5
PATCH v3 5/10 video: da8xx-fb: store current display information
In reply to Afzal Mohammedstore current videomode and controller data so that reconfiguring can be done easily. Reconfiguring would be required in fb_set_par, which is going to be added soon.
If these details are not stored, the work probe does to retrieve these information would have to repeated at the place of reconfiguring and modifying platform data would be necessary to handle controller data changes like bpp.
--- drivers/video/da8xx-fb.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/video/da8xx-fb.c +4 -0
@@ -178,6 +178,8 @@ struct da8xx_fb_par {#endif void (*panel_power_ctrl)(int );u32 pseudo_palette[16 ]; +struct fb_videomode mode; +struct lcd_ctrl_config cfg; };static struct fb_var_screeninfo da8xx_fb_var;
@@ -1310,6 +1312,8 @@ static int fb_probe(struct platform_device *device) }fb_videomode_to_var (&da8xx_fb_var, lcdc_info); +fb_var_to_videomode (&par->mode, &da8xx_fb_var); + par->cfg = *lcd_cfg;if (lcd_init (par, lcd_cfg, lcdc_info) <0 ) {dev_err (&device->dev,"lcd_init failed\n" );
Signature · 1 line
1.7.9.5
PATCH v3 7/10 video: da8xx-fb: pix clk and clk div handling cleanup
In reply to Afzal MohammedUse the new modedb field to store pix clk. Reorganize existing clock divider functions with names now corresponding to what they do, add common function prefix.
Fix existing panel modedb pixclock to be in ps instead of Hz. This needed a change in the way clock divider is calculated. As modedb pixclock information is now in ps, override on "var" pixclock over modedb to var conversion is removed.
--- drivers/video/da8xx-fb.c | 48 +++++++++++++++++----------------------------- 1 file changed, 18 insertions(+), 30 deletions(-)
drivers/video/da8xx-fb.c +18 -30
@@ -160,7 +160,6 @@ struct da8xx_fb_par {struct clk *lcdc_clk;int irq;unsigned int palette_sz; -unsigned int pxl_clk;int blank;wait_queue_head_t vsync_wait;int vsync_flag;
@@ -201,7 +200,7 @@ static struct fb_videomode known_lcd_panels[] = { .name = "Sharp_LCD035Q3DG01", .xres = 320, .yres = 240, - .pixclock = 4608000, + .pixclock = 217014, .left_margin = 6, .right_margin = 8, .upper_margin = 2,
@@ -216,7 +215,7 @@ static struct fb_videomode known_lcd_panels[] = { .name = "Sharp_LK043T1DG01", .xres = 480, .yres = 272, - .pixclock = 7833600, + .pixclock = 127655, .left_margin = 2, .right_margin = 2, .upper_margin = 2,
@@ -231,7 +230,7 @@ static struct fb_videomode known_lcd_panels[] = { .name = "SP10Q010", .xres = 320, .yres = 240, - .pixclock = 7833600, + .pixclock = 127655, .left_margin = 10, .right_margin = 10, .upper_margin = 10,
@@ -680,13 +679,14 @@ static void da8xx_fb_lcd_reset(void) } } -static void lcd_calc_clk_divider (struct da8xx_fb_par *par) +static inline unsigned da8xx_fb_calc_clk_divider (struct da8xx_fb_par *par, +unsigned pixclock) { -unsigned int lcd_clk, div; - - lcd_clk =clk_get_rate (par->lcdc_clk); - div = lcd_clk / par->pxl_clk; +return par->lcd_fck_rate / (PICOS2KHZ (pixclock) *1000 ); +} +static inline void da8xx_fb_config_clk_divider (unsigned div) +{/* Configure the LCD clock divisor. */ lcdc_write (LCD_CLK_DIVISOR (div) | (LCD_RASTER_MODE &0x1 ),LCD_CTRL_REG );
@@ -694,7 +694,14 @@ static void lcd_calc_clk_divider(struct da8xx_fb_par *par)if (lcd_revision ==LCD_VERSION_2 )lcdc_write (LCD_V2_DMA_CLK_EN |LCD_V2_LIDD_CLK_EN |LCD_V2_CORE_CLK_EN ,LCD_CLK_ENABLE_REG ); +} + +static inline void da8xx_fb_calc_config_clk_divider (struct da8xx_fb_par *par, +struct fb_videomode *mode) +{ +unsigned div =da8xx_fb_calc_clk_divider (par, mode->pixclock); +da8xx_fb_config_clk_divider (div); } static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
@@ -705,8 +712,7 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,da8xx_fb_lcd_reset (); -/* Calculate the divider */ -lcd_calc_clk_divider (par); +da8xx_fb_calc_config_clk_divider (par, panel);if (panel->sync &FB_SYNC_CLK_INVERT ) lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |
@@ -969,7 +975,7 @@ static int lcd_da8xx_cpufreq_transition(struct notifier_block *nb,if (par->lcd_fck_rate !=clk_get_rate (par->lcdc_clk)) { par->lcd_fck_rate =clk_get_rate (par->lcdc_clk);lcd_disable_raster (true); -lcd_calc_clk_divider (par); +da8xx_fb_calc_config_clk_divider (par, &par->mode);if (par->blank ==FB_BLANK_UNBLANK )lcd_enable_raster (); }
@@ -1195,22 +1201,6 @@ static struct fb_ops da8xx_fb_ops = { .fb_blank = cfb_blank, }; -/* Calculate and return pixel clock period in pico seconds */ -static unsigned int da8xxfb_pixel_clk_period (struct da8xx_fb_par *par) -{ -unsigned int lcd_clk, div; -unsigned int configured_pix_clk; -unsigned long long pix_clk_period_picosec =1000000000000ULL ; - - lcd_clk =clk_get_rate (par->lcdc_clk); - div = lcd_clk / par->pxl_clk; - configured_pix_clk = (lcd_clk / div); - -do_div (pix_clk_period_picosec, configured_pix_clk); - -return pix_clk_period_picosec; -} -static int fb_probe (struct platform_device *device) { struct da8xx_lcdc_platform_data *fb_pdata =
@@ -1303,7 +1293,6 @@ static int fb_probe(struct platform_device *device) par = da8xx_fb_info->par; par->lcdc_clk = fb_clk; par->lcd_fck_rate =clk_get_rate (fb_clk); - par->pxl_clk = lcdc_info->pixclock;if (fb_pdata->panel_power_ctrl) { par->panel_power_ctrl = fb_pdata->panel_power_ctrl; par->panel_power_ctrl (1 );
@@ -1368,7 +1357,6 @@ static int fb_probe(struct platform_device *device) da8xx_fb_var.grayscale = lcd_cfg->panel_shade ==MONOCHROME ?1 :0 ; da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp; - da8xx_fb_var.pixclock =da8xxfb_pixel_clk_period (par);/* Initialize fbinfo */ da8xx_fb_info->flags =FBINFO_FLAG_DEFAULT ;
Signature · 1 line
1.7.9.5
PATCH v3 8/10 video: da8xx-fb: store struct device *
In reply to Afzal Mohammedstore struct device pointer so that dev_dbg/err can be used outside of probe.
--- drivers/video/da8xx-fb.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/video/da8xx-fb.c +2 -0
@@ -150,6 +150,7 @@ static inline void lcdc_write(unsigned int val, unsigned int addr) }struct da8xx_fb_par { +struct device *dev;resource_size_t p_palette_base;unsigned char *v_palette_base;dma_addr_t vram_phys;
@@ -1291,6 +1292,7 @@ static int fb_probe(struct platform_device *device) } par = da8xx_fb_info->par; + par->dev = &device->dev; par->lcdc_clk = fb_clk; par->lcd_fck_rate =clk_get_rate (fb_clk);if (fb_pdata->panel_power_ctrl) {
Signature · 1 line
1.7.9.5
PATCH v3 9/10 video: da8xx-fb: report correct pixclock
In reply to Afzal MohammedUpdate "var" pixclock with the value that is configurable in hardware. This lets user know the actual pixclock.
--- drivers/video/da8xx-fb.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
drivers/video/da8xx-fb.c +11 -0
@@ -686,6 +686,15 @@ static inline unsigned da8xx_fb_calc_clk_divider(struct da8xx_fb_par *par,return par->lcd_fck_rate / (PICOS2KHZ (pixclock) *1000 ); } +static inline unsigned da8xx_fb_round_clk (struct da8xx_fb_par *par, +unsigned pixclock) +{ +unsigned div; + + div =da8xx_fb_calc_clk_divider (par, pixclock); +return KHZ2PICOS (par->lcd_fck_rate / (1000 * div)); +} +static inline void da8xx_fb_config_clk_divider (unsigned div) {/* Configure the LCD clock divisor. */
@@ -962,6 +971,8 @@ static int fb_check_var(struct fb_var_screeninfo *var,if (var->yres + var->yoffset > var->yres_virtual) var->yoffset = var->yres_virtual - var->yres; + var->pixclock =da8xx_fb_round_clk (par, var->pixclock); +return err; }
Signature · 1 line
1.7.9.5
PATCH v3 10/10 video: da8xx-fb: fb_set_par support
In reply to Afzal Mohammedfb_set_par helps in runtime configuration of lcd controller like changing resolution, pixel clock etc. (eg. using fbset utility)
Reconfigure lcd controller based on information passed by framework. Enable raster back if it was already enabled.
As fb_set_par would get invoked indirectly from probe via fb_set_var, remove existing lcdc initialization in probe and do lcdc reset in probe so that reset happens only at the begining.
---
v2: disable raster in fb_set_par properly as required, without this
there would be no issue on DA850, but it will cause problem on AM335X
drivers/video/da8xx-fb.c | 60 +++++++++++++++++++++++++++++++++++++--------- 1 file changed, 49 insertions(+), 11 deletions(-)
drivers/video/da8xx-fb.c +49 -11
@@ -243,6 +243,11 @@ static struct fb_videomode known_lcd_panels[] = { }, }; +static inline bool da8xx_fb_is_raster_enabled (void ) +{ +return !!(lcdc_read (LCD_RASTER_CTRL_REG ) &LCD_RASTER_ENABLE ); +} +/* Enable the Raster Engine of the LCD Controller */ static inline void lcd_enable_raster (void ) {
@@ -665,9 +670,6 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,static void da8xx_fb_lcd_reset (void ) { -/* Disable the Raster if previously Enabled */ -lcd_disable_raster (false); -/* DMA has to be disabled */ lcdc_write (0 ,LCD_DMA_CTRL_REG );lcdc_write (0 ,LCD_RASTER_CTRL_REG );
@@ -720,8 +722,6 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,u32 bpp;int ret =0 ; -da8xx_fb_lcd_reset (); -da8xx_fb_calc_config_clk_divider (par, panel);if (panel->sync &FB_SYNC_CLK_INVERT )
@@ -1201,9 +1201,52 @@ static int da8xx_pan_display(struct fb_var_screeninfo *var,return ret; } +static int da8xxfb_set_par (struct fb_info *info) +{ +struct da8xx_fb_par *par = info->par; +int ret; +bool raster =da8xx_fb_is_raster_enabled (); + +if (raster) +lcd_disable_raster (true); +else +lcd_disable_raster (false); + +fb_var_to_videomode (&par->mode, &info->var); + + par->cfg.bpp = info->var.bits_per_pixel; + + info->fix.visual = (par->cfg.bpp <=8 ) ? +FB_VISUAL_PSEUDOCOLOR :FB_VISUAL_TRUECOLOR ; + info->fix.line_length = (par->mode.xres * par->cfg.bpp) /8 ; + + ret =lcd_init (par, &par->cfg, &par->mode); +if (ret <0 ) { +dev_err (par->dev,"lcd init failed\n" ); +return ret; + } + + par->dma_start = info->fix.smem_start + + info->var.yoffset * info->fix.line_length + + info->var.xoffset * info->var.bits_per_pixel /8 ; + par->dma_end = par->dma_start + + info->var.yres * info->fix.line_length -1 ; + +lcdc_write (par->dma_start,LCD_DMA_FRM_BUF_BASE_ADDR_0_REG ); +lcdc_write (par->dma_end,LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG ); +lcdc_write (par->dma_start,LCD_DMA_FRM_BUF_BASE_ADDR_1_REG ); +lcdc_write (par->dma_end,LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG ); + +if (raster) +lcd_enable_raster (); + +return 0 ; +} +static struct fb_ops da8xx_fb_ops = { .owner =THIS_MODULE , .fb_check_var = fb_check_var, + .fb_set_par = da8xxfb_set_par, .fb_setcolreg = fb_setcolreg, .fb_pan_display = da8xx_pan_display, .fb_ioctl = fb_ioctl,
@@ -1312,14 +1355,9 @@ static int fb_probe(struct platform_device *device) }fb_videomode_to_var (&da8xx_fb_var, lcdc_info); -fb_var_to_videomode (&par->mode, &da8xx_fb_var); par->cfg = *lcd_cfg; -if (lcd_init (par, lcd_cfg, lcdc_info) <0 ) { -dev_err (&device->dev,"lcd_init failed\n" ); - ret = -EFAULT ; - goto err_release_fb; - } +da8xx_fb_lcd_reset ();/* allocate frame buffer */ par->vram_size = lcdc_info->xres * lcdc_info->yres * lcd_cfg->bpp;
Signature · 1 line
1.7.9.5
PATCH v3 6/10 video: da8xx-fb: store clk rate even if !CPUFREQ
In reply to Afzal Mohammedstore lcd clk rate always, i.e. irrespective of whether CPUFREQ is enabled or not. This can be used to get clk rate directly instead of enquiring with clock framework with clk handle every time.
--- drivers/video/da8xx-fb.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
drivers/video/da8xx-fb.c +1 -3
@@ -174,8 +174,8 @@ struct da8xx_fb_par {unsigned int which_dma_channel_done;#ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; -unsigned int lcd_fck_rate;#endif +unsigned int lcd_fck_rate;void (*panel_power_ctrl)(int );u32 pseudo_palette[16 ];struct fb_videomode mode;
@@ -1302,9 +1302,7 @@ static int fb_probe(struct platform_device *device) par = da8xx_fb_info->par; par->lcdc_clk = fb_clk; -#ifdef CONFIG_CPU_FREQ par->lcd_fck_rate =clk_get_rate (fb_clk); -#endif par->pxl_clk = lcdc_info->pixclock;if (fb_pdata->panel_power_ctrl) { par->panel_power_ctrl = fb_pdata->panel_power_ctrl;
Signature · 1 line
1.7.9.5
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Hi,
Quoted 20 lines · Afzal
Hi Tomi, Florian,
Quoted 7 lines · Afzal
This series makes da8xx-fb driver (device found on DaVinci and AM335x) capable of handling runtime timing configuration by adding
fb_set_par.The last change adds actual
fb_set_parsupport. Other preceeding changes makes the way clear for it as well as does certain cleanup's on the way.Quoted 8 lines
This has been tested on da850 evm as is. This was also tested on am335x-evm & am335x-evmsk with a series that adds DT support.
This is based on v3.8-rc3, this is the only change in this revision. The new version of this series is being posted so that this series can be applied easily (as __dev* are removed, there would be merge conflicts with v2, which was based on -rc2).
series
Quoted 3 lines
Can you please consider this series for inclusion. There are no pending comments or dependency for this series. If you need a pull request, let me know, I will sent it.
I handled only the pull request for 3.8 merge window to help Florian with it. I didn't mean to become a co-maintainer or such =).
Tomi