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Update imx6qdl dts/dtsi to support WM8962

PATCH New Nicolin Chen 2 participants 17 messages Jun 13, 2013 – Jun 14, 2013

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#0 lore raw

cover Update imx6qdl dts/dtsi to support WM8962

*** This branch of patches add WM8962 support in imx6q/dl-sabresd dts.

Nicolin Chen (9):
ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd
ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration
ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1
ARM: dtsi: imx6dl: Add a pinctrl for AUDMUX
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support
ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default

 arch/arm/boot/dts/imx6dl-sabresd.dts   |    1 +
 arch/arm/boot/dts/imx6dl.dtsi          |   20 ++++++++++
 arch/arm/boot/dts/imx6q-sabresd.dts    |    1 +
 arch/arm/boot/dts/imx6q.dtsi           |    7 +++
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |   66 ++++++++++++++++++++++++++++++++
 arch/arm/configs/imx_v6_v7_defconfig   |    2 +
 arch/arm/mach-imx/clk-imx6q.c          |    2 +
 arch/arm/mach-imx/mach-imx6q.c         |   42 ++++++++++++++++++++
 8 files changed, 141 insertions(+), 0 deletions(-)
#1 lore raw

PATCH 1/9 ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd

WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1.

---
 arch/arm/mach-imx/clk-imx6q.c  |    2 +
 arch/arm/mach-imx/mach-imx6q.c |   42 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+), 0 deletions(-)
arch/arm/mach-imx/clk-imx6q.c +2 -0
index 0a4a658..07fdb8c 100644
@@ -550,6 +550,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	clk_register_clkdev(clk[ahb], "ahb", NULL);
 	clk_register_clkdev(clk[cko1], "cko1", NULL);
 	clk_register_clkdev(clk[arm], NULL, "cpu0");
+	clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL);
+	clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL);
 
 	if (imx6q_revision() != IMX_CHIP_REVISION_1_0) {
 		clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
arch/arm/mach-imx/mach-imx6q.c +42 -0

54 lines not on this page · raw message

Signature · 1 line
1.7.1
#2 lore raw

PATCH 2/9 ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration

In reply to Nicolin Chen

Setting GPIO_0 pad as clko1 clock output to provide MCLK for WM8962.

---
 arch/arm/boot/dts/imx6dl-sabresd.dts |    1 +
 arch/arm/boot/dts/imx6q-sabresd.dts  |    1 +
 2 files changed, 2 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6dl-sabresd.dts +1 -0
index 7efb05d..8989df2 100644
@@ -29,6 +29,7 @@
 				MX6DL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 				MX6DL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 				MX6DL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
+				MX6DL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 			>;
 		};
 	};
arch/arm/boot/dts/imx6q-sabresd.dts +1 -0
index 4420513..0038228 100644
@@ -33,6 +33,7 @@
 				MX6Q_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 				MX6Q_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 				MX6Q_PAD_NANDF_D3__GPIO2_IO03 0x80000000
+				MX6Q_PAD_GPIO_0__CCM_CLKO1    0x130b0
 			>;
 		};
 	};
Signature · 1 line
1.7.1
#3 lore raw

PATCH 3/9 ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1

In reply to Nicolin Chen

Add a pinctrl for I2C1 used on imx6q/dl-sabresd.

---
 arch/arm/boot/dts/imx6dl.dtsi |    9 +++++++++
 arch/arm/boot/dts/imx6q.dtsi  |    7 +++++++
 2 files changed, 16 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6dl.dtsi +9 -0
index 2ecbcbc..06bd544 100644
@@ -112,6 +112,15 @@
 					};
 				};
 
+				i2c1 {
+					pinctrl_i2c1_2: i2c1grp-2 {
+						fsl,pins = <
+							MX6DL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+							MX6DL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+						>;
+					};
+				};
+
 				uart1 {
 					pinctrl_uart1_1: uart1grp-1 {
 						fsl,pins = <
arch/arm/boot/dts/imx6q.dtsi +7 -0
index d79455d..734cb4c 100644
@@ -190,6 +190,13 @@
 							MX6Q_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
 						>;
 					};
+
+					pinctrl_i2c1_2: i2c1grp-2 {
+						fsl,pins = <
+							MX6Q_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+							MX6Q_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+						>;
+					};
 				};
 
 				i2c2 {
Signature · 1 line
1.7.1
#4 lore raw

PATCH 4/9 ARM: dtsi: imx6dl: Add a pinctrl for AUDMUX

In reply to Nicolin Chen

Add a pinctrl for AUDMUX used on imx6dl-sabresd.

---
 arch/arm/boot/dts/imx6dl.dtsi |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6dl.dtsi +11 -0
index 06bd544..023ac83 100644
@@ -35,6 +35,17 @@
 				compatible = "fsl,imx6dl-iomuxc";
 				reg = <0x020e0000 0x4000>;
 
+				audmux {
+					pinctrl_audmux_2: audmux-2 {
+						fsl,pins = <
+							MX6DL_PAD_CSI0_DAT7__AUD3_RXD  0x80000000
+							MX6DL_PAD_CSI0_DAT4__AUD3_TXC  0x80000000
+							MX6DL_PAD_CSI0_DAT5__AUD3_TXD  0x80000000
+							MX6DL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
+						>;
+					};
+				};
+
 				ecspi1 {
 					pinctrl_ecspi1_1: ecspi1grp-1 {
 						fsl,pins = <
Signature · 1 line
1.7.1
#5 lore raw

PATCH 5/9 ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962

In reply to Nicolin Chen

On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +7 -0
index e21f6a8..13af158 100644
@@ -26,6 +26,13 @@
 			gpio = <&gpio3 22 0>;
 			enable-active-high;
 		};
+
+		reg_audio: 8962_supply {
+			compatible = "regulator-fixed";
+			regulator-name = "8962-SUPPLY";
+			gpio = <&gpio4 10 0>;
+			enable-active-high;
+		};
 	};
 
 	gpio-keys {
Signature · 1 line
1.7.1
#7 lore raw

PATCH 6/9 ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support

In reply to Nicolin Chen

Add WM8962 CODEC support and enable its parent I2C bus.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +29 -0
index 13af158..4ee2413 100644
@@ -92,3 +92,32 @@
 	wp-gpios = <&gpio2 1 0>;
 	status = "okay";
 };
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_2>;
+
+	codec: wm8962 at 1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clks 169>;
+		DCVDD-supply = <&reg_audio>;	/* 1.8v */
+		DBVDD-supply = <&reg_audio>;	/* 1.8v */
+		AVDD-supply = <&reg_audio>;	/* 1.8v */
+		CPVDD-supply = <&reg_audio>;	/* 1.8v */
+		MICVDD-supply = <&reg_audio>;	/* 3.3v */
+		PLLVDD-supply = <&reg_audio>;	/* 1.8v */
+		SPKVDD1-supply = <&reg_audio>;	/* 4.2v */
+		SPKVDD2-supply = <&reg_audio>;	/* 4.2v */
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0013 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x8014 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+       };
+};
Signature · 1 line
1.7.1
#12 lore raw

PATCH 7/9 ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX

In reply to Nicolin Chen

Enable SSI2 and its pin configuration in AUDMUX.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +11 -0
index 4ee2413..a76e37a 100644
@@ -93,6 +93,17 @@
 	status = "okay";
 };
 
+&ssi2 {
+	status = "okay";
+	fsl,mode = "i2s-slave";
+};
+
+&audmux {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux_2>;
+};
+
 &i2c1 {
 	status = "okay";
 	clock-frequency = <100000>;
Signature · 1 line
1.7.1
#14 lore raw

PATCH 8/9 ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support

In reply to Nicolin Chen

Enable WM8962 ALSA machine driver via devicetree.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +19 -0
index a76e37a..dc755c4 100644
@@ -50,6 +50,25 @@
 			linux,code = <114>; /* KEY_VOLUMEDOWN */
 		};
 	};
+
+	sound {
+		compatible = "fsl,imx6q-sabresd-wm8962",
+			   "fsl,imx-audio-wm8962";
+		model = "wm8962-audio";
+		ssi-controller = <&ssi2>;
+		audio-codec = <&codec>;
+		audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"Ext Spk", "SPKOUTL",
+			"Ext Spk", "SPKOUTR",
+			"MICBIAS", "AMIC",
+			"IN3R", "MICBIAS",
+			"DMIC", "MICBIAS",
+			"DMICDAT", "DMIC";
+		mux-int-port = <2>;
+		mux-ext-port = <3>;
+	};
 };
 
 &fec {
Signature · 1 line
1.7.1
#15 lore raw

PATCH 9/9 ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default

In reply to Nicolin Chen

Enable imx-wm8962 and PM_RUNTIME, essential for WM8962 CODEC driver.

---
 arch/arm/configs/imx_v6_v7_defconfig |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
arch/arm/configs/imx_v6_v7_defconfig +2 -0
index ac3470c..b977314 100644
@@ -48,6 +48,7 @@ CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_BINFMT_MISC=m
+CONFIG_PM_RUNTIME=y
 CONFIG_PM_DEBUG=y
 CONFIG_PM_TEST_SUSPEND=y
 CONFIG_NET=y
@@ -183,6 +184,7 @@ CONFIG_SND_SOC=y
 CONFIG_SND_IMX_SOC=y
 CONFIG_SND_SOC_PHYCORE_AC97=y
 CONFIG_SND_SOC_EUKREA_TLV320=y
+CONFIG_SND_SOC_IMX_WM8962=y
 CONFIG_SND_SOC_IMX_SGTL5000=y
 CONFIG_SND_SOC_IMX_MC13783=y
 CONFIG_USB=y
Signature · 1 line
1.7.1
#16 lore raw

cover Update imx6qdl dts/dtsi to support WM8962

In reply to Nicolin Chen
Quoted 10 lines · Nicolin Chen

Nicolin Chen (9):
ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd
ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration
ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1
ARM: dtsi: imx6dl: Add a pinctrl for AUDMUX
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support
ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default

All applied. I made some small fix-ups and have a few comments, but nothing so important. Please see my replies to individual patches.

Shawn

#6 lore raw

PATCH 5/9 ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962

In reply to Nicolin Chen
Quoted 13 lines · Nicolin Chen

On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +0 -0
index e21f6a8..13af158 100644

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 30

Quoted 5 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +2 -0
@@ -26,6 +26,13 @@
 			gpio = <&gpio3 22 0>;
 			enable-active-high;
 		};
+
+		reg_audio: 8962_supply {

8962 does not looks like a good name. I changed it to wm8962.

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 32

Quoted 2 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +2 -0
+			compatible = "regulator-fixed";
+			regulator-name = "8962-SUPPLY";

We generally use lowercases in device tree, so I changed it to "wm8962-supply".

Shawn

Quoted 10 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +3 -0
+			gpio = <&gpio4 10 0>;
+			enable-active-high;
+		};
 	};
 
 	gpio-keys {
Signature · 1 line
1.7.1
#8 lore raw

PATCH 6/9 ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support

In reply to Nicolin Chen
Quoted 12 lines · Nicolin Chen

Add WM8962 CODEC support and enable its parent I2C bus.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +0 -0
index 13af158..4ee2413 100644

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 96

Quoted 5 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +2 -0
@@ -92,3 +92,32 @@
 	wp-gpios = <&gpio2 1 0>;
 	status = "okay";
 };
+
+&i2c1 {

The node should be sorted in label name, so I moved it to right after "&fec".

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 97

Quoted 1 line
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +1 -0
+	status = "okay";

We generally have it as the last property of a node, so I moved it to ...

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 100

Quoted 3 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +3 -0
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_2>;

... here.

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 113

Quoted 13 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +13 -0
+
+	codec: wm8962 at 1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clks 169>;
+		DCVDD-supply = <&reg_audio>;	/* 1.8v */
+		DBVDD-supply = <&reg_audio>;	/* 1.8v */
+		AVDD-supply = <&reg_audio>;	/* 1.8v */
+		CPVDD-supply = <&reg_audio>;	/* 1.8v */
+		MICVDD-supply = <&reg_audio>;	/* 3.3v */
+		PLLVDD-supply = <&reg_audio>;	/* 1.8v */
+		SPKVDD1-supply = <&reg_audio>;	/* 4.2v */
+		SPKVDD2-supply = <&reg_audio>;	/* 4.2v */

You comment these supplies with different voltages but they are actually pointing to the same fixed regulator.

Shawn

Quoted 14 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +10 -0
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0013 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x8014 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+       };
+};
Signature · 1 line
1.7.1
#9 lore raw

PATCH 6/9 ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support

Quoted 8 lines · Shawn Guo
Quoted 8 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +8 -0
+
+	codec: wm8962 at 1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clks 169>;
+		DCVDD-supply = <&reg_audio>;	/* 1.8v */
+		DBVDD-supply = <&reg_audio>;	/* 1.8v */
+		AVDD-supply = <&reg_audio>;	/* 1.8v */
Quoted 8 lines

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 113

Quoted 5 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +5 -0
+		CPVDD-supply = <&reg_audio>;	/* 1.8v */
+		MICVDD-supply = <&reg_audio>;	/* 3.3v */
+		PLLVDD-supply = <&reg_audio>;	/* 1.8v */
+		SPKVDD1-supply = <&reg_audio>;	/* 4.2v */
+		SPKVDD2-supply = <&reg_audio>;	/* 4.2v */

You comment these supplies with different voltages but they are actually pointing to the same fixed regulator.

That's because they are all controlled by one GPIO pin. But you are right these comments might be confusing.

And I think I don't need to send a V2 any more right? Since I saw you said you did the fix-up for me.

Thank You
Nicolin Chen

#13 lore raw

PATCH 7/9 ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX

In reply to Nicolin Chen
Quoted 16 lines · Nicolin Chen

Enable SSI2 and its pin configuration in AUDMUX.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +1 -0
index 4ee2413..a76e37a 100644
@@ -93,6 +93,17 @@
 	status = "okay";
 };
 
+&ssi2 {

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 106

Quoted 10 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +10 -0
+	status = "okay";
+	fsl,mode = "i2s-slave";
+};
+
+&audmux {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux_2>;
+};
+

I moved these two nodes around to have them properly sorted, and also move "status" to be the last property.

Shawn

Quoted 7 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +0 -0
 &i2c1 {
 	status = "okay";
 	clock-frequency = <100000>;
Signature · 1 line
1.7.1
#11 lore raw

PATCH 6/9 ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support

In reply to Shawn Guo
Quoted 9 lines · Shawn Guo
Quoted 5 lines

That's because they are all controlled by one GPIO pin. But you are right these comments might be confusing.

And I think I don't need to send a V2 any more right? Since I saw you said you did the fix-up for me.

I just removed the comments.

Shawn

Thank you :)

#10 lore raw

PATCH 6/9 ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support

In reply to Nicolin Chen
Quoted 18 lines · Nicolin Chen
Quoted 8 lines · Shawn Guo
Quoted 8 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +8 -0
+
+	codec: wm8962 at 1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clks 169>;
+		DCVDD-supply = <&reg_audio>;	/* 1.8v */
+		DBVDD-supply = <&reg_audio>;	/* 1.8v */
+		AVDD-supply = <&reg_audio>;	/* 1.8v */
Quoted 8 lines

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 113

Quoted 5 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +5 -0
+		CPVDD-supply = <&reg_audio>;	/* 1.8v */
+		MICVDD-supply = <&reg_audio>;	/* 3.3v */
+		PLLVDD-supply = <&reg_audio>;	/* 1.8v */
+		SPKVDD1-supply = <&reg_audio>;	/* 4.2v */
+		SPKVDD2-supply = <&reg_audio>;	/* 4.2v */

You comment these supplies with different voltages but they are actually pointing to the same fixed regulator.

Quoted 5 lines

That's because they are all controlled by one GPIO pin. But you are right these comments might be confusing.

And I think I don't need to send a V2 any more right? Since I saw you said you did the fix-up for me.

I just removed the comments.

Shawn