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Add support for Colibri Vybrid Modules

PATCH Superseded Sanchayan Maity 4 participants 22 messages Apr 8, 2015 – Apr 15, 2015

Subsystems (4)

v2 of 3 Superseded Latest is v3 →

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#0 lore raw

v2 cover Add support for Colibri Vybrid Modules

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

First patch in the series refactors the DDR related code for use by both the tower board and colibri modules. It also introduces a DDR3 based JEDEC timing structure.

Second third and fourth patch in this series are improvement patches related to RTC, SoC/CPU detection and caches.

Fifth patch introduces USB support for Vybrid modules. Much of the code is similar to the ehci-mx6 driver. One open question here would be is there a better way to take care of this similarity and perhaps share the code base among the two drivers? Both host and client modes are working and DFU has also been tested. Currently, we restrict the ports to be in one of host and client mode.

Sixth patch adds the actual support for the Colibri modules.

Comments and feedback are most welcome.

The patchset is based and tested on the latest master branch as of this writing.

Discussion on the version 1 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168136.html

Changes since v1:
- Rework the USB driver to use register offsets using the regular struct {} method
- Some cleanups and fixes in the sixth patch for the colibri_vf.h file which takes care of environment variables in uboot
- Purge some useless defines in the fifth and sixth patch which were related to USB.

- Sanchayan.

Sanchayan Maity (4):
ARM: vf610: Move DDR3 initialization to imx-common
ARM: vf610: Add SoC and CPU type detection
usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
ARM: vf610: Initial integration for Colibri VF50/VF61

Stefan Agner (2):
ARM: vf610: Enable external 32KHz oscillator
ARM: vf610: Enable caches

 arch/arm/Kconfig                              |   5 +
 arch/arm/cpu/armv7/vf610/generic.c            |  45 ++-
 arch/arm/imx-common/Makefile                  |   3 +
 arch/arm/imx-common/ddrmc-vf610.c             | 278 ++++++++++++++++++
 arch/arm/include/asm/arch-vf610/crm_regs.h    |  11 +
 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h |  72 +++++
 arch/arm/include/asm/arch-vf610/imx-regs.h    |  36 ++-
 arch/arm/include/asm/arch-vf610/regs-usbphy.h |  31 +++
 board/freescale/vf610twr/vf610twr.c           | 295 +++++---------------
 board/toradex/colibri_vf/Kconfig              |  18 ++
 board/toradex/colibri_vf/MAINTAINERS          |   6 +
 board/toradex/colibri_vf/Makefile             |   7 +
 board/toradex/colibri_vf/colibri_vf.c         | 387 ++++++++++++++++++++++++++
 board/toradex/colibri_vf/imximage.cfg         |  17 ++
 configs/colibri_vf_defconfig                  |   3 +
 drivers/usb/host/Makefile                     |   1 +
 drivers/usb/host/ehci-vf.c                    | 196 +++++++++++++
 include/configs/colibri_vf.h                  | 271 ++++++++++++++++++
 18 files changed, 1447 insertions(+), 235 deletions(-)
 create mode 100644 arch/arm/imx-common/ddrmc-vf610.c
 create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h
 create mode 100644 arch/arm/include/asm/arch-vf610/regs-usbphy.h
 create mode 100644 board/toradex/colibri_vf/Kconfig
 create mode 100644 board/toradex/colibri_vf/MAINTAINERS
 create mode 100644 board/toradex/colibri_vf/Makefile
 create mode 100644 board/toradex/colibri_vf/colibri_vf.c
 create mode 100644 board/toradex/colibri_vf/imximage.cfg
 create mode 100644 configs/colibri_vf_defconfig
 create mode 100644 drivers/usb/host/ehci-vf.c
 create mode 100644 include/configs/colibri_vf.h
Signature · 1 line
2.3.5
#1 lore raw

PATCH v2 1/6 ARM: vf610: Move DDR3 initialization to imx-common

In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chosen from the board file. The JEDEC timings are specified using a common ddr3_jedec_timings structure.

---
 arch/arm/imx-common/Makefile                  |   3 +
 arch/arm/imx-common/ddrmc-vf610.c             | 278 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h |  72 +++++++
 arch/arm/include/asm/arch-vf610/imx-regs.h    |   4 +-
 board/freescale/vf610twr/vf610twr.c           | 282 +++++---------------------
 5 files changed, 408 insertions(+), 231 deletions(-)
 create mode 100644 arch/arm/imx-common/ddrmc-vf610.c
 create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h
arch/arm/imx-common/Makefile +3 -0
index 606482f..b9f1ca4 100644
@@ -22,6 +22,9 @@ ifeq ($(SOC),$(filter $(SOC),mx6))
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o
 endif
+ifeq ($(SOC),$(filter $(SOC),vf610))
+obj-y += ddrmc-vf610.o
+endif
 obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
 obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
 obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
arch/arm/imx-common/ddrmc-vf610.c new file +278 -0

278 lines not on this page · raw message

arch/arm/include/asm/arch-vf610/ddrmc-vf610.h new file +72 -0

72 lines not on this page · raw message

arch/arm/include/asm/arch-vf610/imx-regs.h +2 -2
index 6b10bdf..866b303 100644
@@ -196,8 +196,8 @@
 #define DDRMC_CR96_WLMRD(v)				(((v) & 0x3f) << 8)
 #define DDRMC_CR96_WLDQSEN(v)				((v) & 0x3f)
 #define DDRMC_CR97_WRLVL_EN				(1 << 24)
-#define DDRMC_CR98_WRLVL_DL_0				(0)
-#define DDRMC_CR99_WRLVL_DL_1				(0)
+#define DDRMC_CR98_WRLVL_DL_0(v)			((v) & 0xffff)
+#define DDRMC_CR99_WRLVL_DL_1(v)			((v) & 0xffff)
 #define DDRMC_CR102_RDLVL_GT_REGEN			(1 << 16)
 #define DDRMC_CR102_RDLVL_REG_EN			(1 << 8)
 #define DDRMC_CR105_RDLVL_DL_0(v)			(((v) & 0xff) << 8)
board/freescale/vf610twr/vf610twr.c +53 -229

299 lines not on this page · raw message

Signature · 1 line
2.3.5
#2 lore raw

PATCH v2 2/6 ARM: vf610: Enable external 32KHz oscillator

In reply to Sanchayan Maity

From: Stefan Agner <[email protected]>

Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC.

---
 arch/arm/include/asm/arch-vf610/crm_regs.h |  1 +
 arch/arm/include/asm/arch-vf610/imx-regs.h | 11 ++++++++++-
 board/freescale/vf610twr/vf610twr.c        | 13 ++++++++++++-
 3 files changed, 23 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-vf610/crm_regs.h +1 -0
index 724682c..78708e2 100644
@@ -199,6 +199,7 @@ struct anadig_reg {
 #define CCM_CCGR2_PORTD_CTRL_MASK		(0x3 << 24)
 #define CCM_CCGR2_PORTE_CTRL_MASK		(0x3 << 26)
 #define CCM_CCGR3_ANADIG_CTRL_MASK		0x3
+#define CCM_CCGR3_SCSC_CTRL_MASK        (0x3 << 4)
 #define CCM_CCGR4_WKUP_CTRL_MASK		(0x3 << 20)
 #define CCM_CCGR4_CCM_CTRL_MASK			(0x3 << 22)
 #define CCM_CCGR4_GPC_CTRL_MASK			(0x3 << 24)
arch/arm/include/asm/arch-vf610/imx-regs.h +10 -1
index 866b303..aa60031 100644
@@ -65,7 +65,7 @@
 #define QSPI0_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00044000)
 #define IOMUXC_BASE_ADDR	(AIPS0_BASE_ADDR + 0x00048000)
 #define ANADIG_BASE_ADDR	(AIPS0_BASE_ADDR + 0x00050000)
-#define SCSCM_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00052000)
+#define SCSC_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00052000)
 #define ASRC_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00060000)
 #define SPDIF_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00061000)
 #define ESAI_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00062000)
@@ -264,6 +264,9 @@
 #define SRC_SRSR_WDOG_A5				(0x1 << 3)
 #define SRC_SRSR_POR_RST				(0x1 << 0)
 
+/* Slow Clock Source Controller Module (SCSC) */
+#define SCSC_SOSC_CTR_SOSC_EN            0x1
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
 
@@ -448,6 +451,12 @@ struct mscm_ir {
 	u16 rsvd3[848];
 };
 
+/* SCSC */
+struct scsc_reg {
+	u32 sirc_ctr;
+	u32 sosc_ctr;
+};
+
 #endif	/* __ASSEMBLER__*/
 
 #endif	/* __ASM_ARCH_IMX_REGS_H__ */
board/freescale/vf610twr/vf610twr.c +12 -1
index eb27542..4160acd 100644
@@ -227,7 +227,7 @@ static void clock_init(void)
 		CCM_CCGR2_PORTD_CTRL_MASK | CCM_CCGR2_PORTE_CTRL_MASK |
 		CCM_CCGR2_QSPI0_CTRL_MASK);
 	clrsetbits_le32(&ccm->ccgr3, CCM_REG_CTRL_MASK,
-		CCM_CCGR3_ANADIG_CTRL_MASK);
+		CCM_CCGR3_ANADIG_CTRL_MASK | CCM_CCGR3_SCSC_CTRL_MASK);
 	clrsetbits_le32(&ccm->ccgr4, CCM_REG_CTRL_MASK,
 		CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK |
 		CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK);
@@ -308,9 +308,20 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
+	struct scsc_reg *scsc = (struct scsc_reg *)SCSC_BASE_ADDR;
+
 	/* address of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+	/*
+	 * Enable external 32K Oscillator
+	 *
+	 * The internal clock experiences significant drift
+	 * so we must use the external oscillator in order
+	 * to maintain correct time in the hwclock
+	 */
+	setbits_le32(&scsc->sosc_ctr, SCSC_SOSC_CTR_SOSC_EN);
+
 	return 0;
 }
 
Signature · 1 line
2.3.5
#3 lore raw

PATCH v2 3/6 ARM: vf610: Add SoC and CPU type detection

In reply to Sanchayan Maity

Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache.

---
 arch/arm/cpu/armv7/vf610/generic.c         | 29 +++++++++++++++++++++++++++--
 arch/arm/include/asm/arch-vf610/imx-regs.h | 12 ++++++++++++
 2 files changed, 39 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/vf610/generic.c +27 -2
index 92aaad9..3bdc221 100644
@@ -18,6 +18,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+static char soc_type[] = "xx0";
+
 #ifdef CONFIG_MXC_OCOTP
 void enable_ocotp_clk(unsigned char enable)
 {
@@ -284,14 +286,37 @@ static char *get_reset_cause(void)
 
 int print_cpuinfo(void)
 {
-	printf("CPU:   Freescale Vybrid VF610 at %d MHz\n",
-		mxc_get_clock(MXC_ARM_CLK) / 1000000);
+	printf("CPU: Freescale Vybrid VF%s at %d MHz\n",
+	       soc_type, mxc_get_clock(MXC_ARM_CLK) / 1000000);
 	printf("Reset cause: %s\n", get_reset_cause());
 
 	return 0;
 }
 #endif
 
+int arch_cpu_init(void)
+{
+	struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR;
+
+	soc_type[0] = mscm->cpxcount ? '6' : '5'; /*Dual Core => VF6x0 */
+	soc_type[1] = mscm->cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */
+
+	return 0;
+}
+
+#ifdef CONFIG_ARCH_MISC_INIT
+int arch_misc_init(void)
+{
+	char soc[6];
+
+	strcat(soc, "vf");
+	strcat(soc, soc_type);
+	setenv("soc", soc);
+
+	return 0;
+}
+#endif
+
 int cpu_eth_init(bd_t *bis)
 {
 	int rc = -ENODEV;
arch/arm/include/asm/arch-vf610/imx-regs.h +12 -0
index aa60031..a5908ca 100644
@@ -457,6 +457,18 @@ struct scsc_reg {
 	u32 sosc_ctr;
 };
 
+/* MSCM */
+struct mscm {
+	u32 cpxtype;
+	u32 cpxnum;
+	u32 cpxmaster;
+	u32 cpxcount;
+	u32 cpxcfg0;
+	u32 cpxcfg1;
+	u32 cpxcfg2;
+	u32 cpxcfg3;
+};
+
 #endif	/* __ASSEMBLER__*/
 
 #endif	/* __ASM_ARCH_IMX_REGS_H__ */
Signature · 1 line
2.3.5
#4 lore raw

PATCH v2 4/6 ARM: vf610: Enable caches

In reply to Sanchayan Maity

From: Stefan Agner <[email protected]>

Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from.

---
 arch/arm/cpu/armv7/vf610/generic.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/cpu/armv7/vf610/generic.c +16 -0
index 3bdc221..1bb9b8e 100644
@@ -342,3 +342,19 @@ int get_clocks(void)
 #endif
 	return 0;
 }
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+	enum dcache_option option = DCACHE_WRITETHROUGH;
+#else
+	enum dcache_option option = DCACHE_WRITEBACK;
+#endif
+	dcache_enable();
+	icache_enable();
+
+    /* Enable caching on OCRAM */
+	mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option);
+}
+#endif
Signature · 1 line
2.3.5
#5 lore raw

PATCH v2 5/6 usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's

In reply to Sanchayan Maity

This driver adds support for the USB peripheral on Freescale Vybrid SoC's.

---
 arch/arm/include/asm/arch-vf610/crm_regs.h    |  10 ++
 arch/arm/include/asm/arch-vf610/imx-regs.h    |   4 +
 arch/arm/include/asm/arch-vf610/regs-usbphy.h |  31 ++++
 drivers/usb/host/Makefile                     |   1 +
 drivers/usb/host/ehci-vf.c                    | 196 ++++++++++++++++++++++++++
 5 files changed, 242 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-vf610/regs-usbphy.h
 create mode 100644 drivers/usb/host/ehci-vf.c
arch/arm/include/asm/arch-vf610/crm_regs.h +10 -0
index 78708e2..bc6db2a 100644
@@ -189,6 +189,7 @@ struct anadig_reg {
 #define CCM_REG_CTRL_MASK			0xffffffff
 #define CCM_CCGR0_UART0_CTRL_MASK               (0x3 << 14)
 #define CCM_CCGR0_UART1_CTRL_MASK		(0x3 << 16)
+#define CCM_CCGR1_USBC0_CTRL_MASK       (0x3 << 8)
 #define CCM_CCGR1_PIT_CTRL_MASK			(0x3 << 14)
 #define CCM_CCGR1_WDOGA5_CTRL_MASK		(0x3 << 28)
 #define CCM_CCGR2_QSPI0_CTRL_MASK		(0x3 << 8)
@@ -207,14 +208,23 @@ struct anadig_reg {
 #define CCM_CCGR6_OCOTP_CTRL_MASK		(0x3 << 10)
 #define CCM_CCGR6_DDRMC_CTRL_MASK		(0x3 << 28)
 #define CCM_CCGR7_SDHC1_CTRL_MASK		(0x3 << 4)
+#define CCM_CCGR7_USBC1_CTRL_MASK       (0x3 << 8)
 #define CCM_CCGR9_FEC0_CTRL_MASK		0x3
 #define CCM_CCGR9_FEC1_CTRL_MASK		(0x3 << 2)
 #define CCM_CCGR10_NFC_CTRL_MASK		0x3
 
+#define ANADIG_PLL7_CTRL_BYPASS         (1 << 16)
+#define ANADIG_PLL7_CTRL_ENABLE         (1 << 13)
+#define ANADIG_PLL7_CTRL_POWERDOWN      (1 << 12)
+#define ANADIG_PLL7_CTRL_DIV_SELECT     (1 << 1)
 #define ANADIG_PLL5_CTRL_BYPASS                 (1 << 16)
 #define ANADIG_PLL5_CTRL_ENABLE                 (1 << 13)
 #define ANADIG_PLL5_CTRL_POWERDOWN              (1 << 12)
 #define ANADIG_PLL5_CTRL_DIV_SELECT		1
+#define ANADIG_PLL3_CTRL_BYPASS         (1 << 16)
+#define ANADIG_PLL3_CTRL_ENABLE         (1 << 13)
+#define ANADIG_PLL3_CTRL_POWERDOWN      (1 << 12)
+#define ANADIG_PLL3_CTRL_DIV_SELECT     (1 << 1)
 #define ANADIG_PLL2_CTRL_ENABLE			(1 << 13)
 #define ANADIG_PLL2_CTRL_POWERDOWN		(1 << 12)
 #define ANADIG_PLL2_CTRL_DIV_SELECT		1
arch/arm/include/asm/arch-vf610/imx-regs.h +4 -0
index a5908ca..26057fe 100644
@@ -52,6 +52,7 @@
 #define SAI2_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00031000)
 #define SAI3_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00032000)
 #define CRC_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00033000)
+#define USBC0_BASE_ADDR     (AIPS0_BASE_ADDR + 0x00034000)
 #define PDB_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00036000)
 #define PIT_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00037000)
 #define FTM0_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00038000)
@@ -65,6 +66,8 @@
 #define QSPI0_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00044000)
 #define IOMUXC_BASE_ADDR	(AIPS0_BASE_ADDR + 0x00048000)
 #define ANADIG_BASE_ADDR	(AIPS0_BASE_ADDR + 0x00050000)
+#define USB_PHY0_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00050800)
+#define USB_PHY1_BASE_ADDR  (AIPS0_BASE_ADDR + 0x00050C00)
 #define SCSC_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00052000)
 #define ASRC_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00060000)
 #define SPDIF_BASE_ADDR		(AIPS0_BASE_ADDR + 0x00061000)
@@ -84,6 +87,7 @@
 #define DDR_BASE_ADDR		(AIPS1_BASE_ADDR + 0x0002E000)
 #define ESDHC0_BASE_ADDR	(AIPS1_BASE_ADDR + 0x00031000)
 #define ESDHC1_BASE_ADDR	(AIPS1_BASE_ADDR + 0x00032000)
+#define USBC1_BASE_ADDR     (AIPS1_BASE_ADDR + 0x00034000)
 #define ENET_BASE_ADDR		(AIPS1_BASE_ADDR + 0x00050000)
 #define ENET1_BASE_ADDR		(AIPS1_BASE_ADDR + 0x00051000)
 #define NFC_BASE_ADDR		(AIPS1_BASE_ADDR + 0x00060000)
arch/arm/include/asm/arch-vf610/regs-usbphy.h new file +31 -0
new file mode 100644
index 0000000..b1b8876
@@ -0,0 +1,31 @@
+/*
+ * Freescale Vybrid USB PHY Register Definitions
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __REGS_USBPHY_H__
+#define __REGS_USBPHY_H__
+
+#include <asm/imx-common/regs-common.h>
+
+struct vf_usbphy_regs {
+	mxs_reg_32(hw_usbphy_pwd)
+	mxs_reg_32(hw_usbphy_tx)
+	mxs_reg_32(hw_usbphy_rx)
+	mxs_reg_32(hw_usbphy_ctrl)
+	mxs_reg_32(hw_usbphy_status)
+	mxs_reg_32(hw_usbphy_debug)
+	mxs_reg_32(hw_usbphy_debug0_status)
+	mxs_reg_32(hw_usbphy_debug1)
+	mxs_reg_32(hw_usbphy_version)
+	mxs_reg_32(hw_usbphy_ip)
+};
+
+#define USBPHY_CTRL_ENUTMILEVEL2		(1 << 14)
+#define USBPHY_CTRL_ENUTMILEVEL3		(1 << 15)
+#define USBPHY_CTRL_OTG_ID              (1 << 27)
+#define USBPHY_CTRL_CLKGATE				(1 << 30)
+#define USBPHY_CTRL_SFTRST				(1 << 31)
+
+#endif	/* __REGS_USBPHY_H__ */
drivers/usb/host/Makefile +1 -0
index eb6f34b..4bd9321 100644
@@ -39,6 +39,7 @@ obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_UNIPHIER) += ehci-uniphier.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
+obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o
 obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
 obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 
drivers/usb/host/ehci-vf.c new file +196 -0

196 lines not on this page · raw message

Signature · 1 line
2.3.5
#9 lore raw

PATCH v2 6/6 ARM: vf610: Initial integration for Colibri VF50/VF61

In reply to Sanchayan Maity

This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC.

- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
- USB host and client support

Tested on Colibri VF50/VF61 booting using serial loader over UART.

---
 arch/arm/Kconfig                           |   5 +
 arch/arm/include/asm/arch-vf610/imx-regs.h |   5 +
 board/toradex/colibri_vf/Kconfig           |  18 ++
 board/toradex/colibri_vf/MAINTAINERS       |   6 +
 board/toradex/colibri_vf/Makefile          |   7 +
 board/toradex/colibri_vf/colibri_vf.c      | 387 +++++++++++++++++++++++++++++
 board/toradex/colibri_vf/imximage.cfg      |  17 ++
 configs/colibri_vf_defconfig               |   3 +
 include/configs/colibri_vf.h               | 271 ++++++++++++++++++++
 9 files changed, 719 insertions(+)
 create mode 100644 board/toradex/colibri_vf/Kconfig
 create mode 100644 board/toradex/colibri_vf/MAINTAINERS
 create mode 100644 board/toradex/colibri_vf/Makefile
 create mode 100644 board/toradex/colibri_vf/colibri_vf.c
 create mode 100644 board/toradex/colibri_vf/imximage.cfg
 create mode 100644 configs/colibri_vf_defconfig
 create mode 100644 include/configs/colibri_vf.h
arch/arm/Kconfig +5 -0
index 80b0d34..e32a942 100644
@@ -608,6 +608,10 @@ config TARGET_VF610TWR
 	bool "Support vf610twr"
 	select CPU_V7
 
+config TARGET_COLIBRI_VF
+	bool "Support Colibri VF50/61"
+	select CPU_V7
+
 config ZYNQ
 	bool "Xilinx Zynq Platform"
 	select CPU_V7
@@ -864,6 +868,7 @@ source "board/ti/ti814x/Kconfig"
 source "board/ti/ti816x/Kconfig"
 source "board/timll/devkit3250/Kconfig"
 source "board/toradex/colibri_pxa270/Kconfig"
+source "board/toradex/colibri_vf/Kconfig"
 source "board/tqc/tqma6/Kconfig"
 source "board/trizepsiv/Kconfig"
 source "board/ttcontrol/vision2/Kconfig"
arch/arm/include/asm/arch-vf610/imx-regs.h +5 -0
index 26057fe..a7d765a 100644
@@ -267,6 +267,11 @@
 #define SRC_SRSR_WDOG_M4				(0x1 << 4)
 #define SRC_SRSR_WDOG_A5				(0x1 << 3)
 #define SRC_SRSR_POR_RST				(0x1 << 0)
+#define SRC_SBMR2_BMOD_MASK             (0x3 << 24)
+#define SRC_SBMR2_BMOD_SHIFT            24
+#define SRC_SBMR2_BMOD_FUSES            0x0
+#define SRC_SBMR2_BMOD_SERIAL           0x1
+#define SRC_SBMR2_BMOD_RCON             0x2
 
 /* Slow Clock Source Controller Module (SCSC) */
 #define SCSC_SOSC_CTR_SOSC_EN            0x1
board/toradex/colibri_vf/Kconfig new file +18 -0
new file mode 100644
index 0000000..2c3cb30
@@ -0,0 +1,18 @@
+if TARGET_COLIBRI_VF
+
+config SYS_CPU
+	default "armv7"
+
+config SYS_BOARD
+	default "colibri_vf"
+
+config SYS_VENDOR
+	default "toradex"
+
+config SYS_SOC
+	default "vf610"
+
+config SYS_CONFIG_NAME
+	default "colibri_vf"
+
+endif
board/toradex/colibri_vf/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..551c575
@@ -0,0 +1,6 @@
+Colibri VFxx
+M:	Stefan Agner <[email protected]>
+S:	Maintained
+F:	board/toradex/colibri_vf/
+F:	include/configs/colibri_vf.h
+F:	configs/colibri_vf_defconfig
board/toradex/colibri_vf/Makefile new file +7 -0
new file mode 100644
index 0000000..c7e5134
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= colibri_vf.o
board/toradex/colibri_vf/colibri_vf.c new file +387 -0

387 lines not on this page · raw message

board/toradex/colibri_vf/imximage.cfg new file +17 -0
new file mode 100644
index 0000000..8c52886
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2014 Toradex, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+#include <asm/imx-common/imximage.cfg>
+
+/* image version */
+IMAGE_VERSION	2
+
+/* Boot Offset 0x400, valid for both SD and NAND boot */
+BOOT_OFFSET	FLASH_OFFSET_STANDARD
configs/colibri_vf_defconfig new file +3 -0
new file mode 100644
index 0000000..cef5a9e
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND"
+CONFIG_ARM=y
+CONFIG_TARGET_COLIBRI_VF=y
include/configs/colibri_vf.h new file +271 -0

271 lines not on this page · raw message

Signature · 1 line
2.3.5
#10 lore raw

v2 cover Add support for Colibri Vybrid Modules

In reply to Sanchayan Maity
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Best regards,
Marek Vasut

#11 lore raw

v2 cover Add support for Colibri Vybrid Modules

Hi,

Quoted 7 lines · Marek Vasut
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Quoted 5 lines

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

By the way, where the fifth patch is concerned, is it related to the discussion Fabio pointed out in the discussion on first version of the patch? uboot trying to get rid of the 'no register access via offset' rule? Anything required I can rework accordingly.

Thanks & Regards,
Sanchayan Maity.

Quoted 3 lines

Best regards,
Marek Vasut

#12 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 16 lines · maitysanchayan at gmail.com

Hi,

Quoted 7 lines · Marek Vasut
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Quoted 5 lines

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Quoted 4 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific thing, but I might be wrong.

Quoted 4 lines

By the way, where the fifth patch is concerned, is it related to the discussion Fabio pointed out in the discussion on first version of the patch? uboot trying to get rid of the 'no register access via offset' rule? Anything required I can rework accordingly.

I was concerned about the placement of the PHY reg definition. I didn't hear from Fabio on the result of this decision and I don't really mind that either way.

Best regards,
Marek Vasut

#6 lore raw

PATCH v2 5/6 usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's

In reply to Sanchayan Maity
Quoted 4 lines · Sanchayan Maity

This driver adds support for the USB peripheral on Freescale Vybrid SoC's.

Quoted 9 lines
---
 arch/arm/include/asm/arch-vf610/crm_regs.h    |  10 ++
 arch/arm/include/asm/arch-vf610/imx-regs.h    |   4 +
 arch/arm/include/asm/arch-vf610/regs-usbphy.h |  31 ++++
 drivers/usb/host/Makefile                     |   1 +
 drivers/usb/host/ehci-vf.c                    | 196
++++++++++++++++++++++++++ 5 files changed, 242 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-vf610/regs-usbphy.h
 create mode 100644 drivers/usb/host/ehci-vf.c

A general hint, you can replace sequences of code like this:

var = readl(foo);
var |= BIT_BAR;
writel(var, addr);

with

setbits_le32(var, BIT_BAR);

Same applies for clearing -- clrbits_le32() and both setting and clearing -- clrsetbits_le32().

Thanks!

Best regards,
Marek Vasut

reviewer
#13 lore raw

v2 cover Add support for Colibri Vybrid Modules

In reply to Marek Vasut

Hi Marek,

Quoted 3 lines · Marek Vasut

I was concerned about the placement of the PHY reg definition. I didn't hear from Fabio on the result of this decision and I don't really mind that either way.

I thought that maybe we should relax about the 'register access via offset is forbidden' rule for new code submission, as according to Tom he would like to see this going away in the future:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2

Regards,

Fabio Estevam

#14 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 11 lines · Fabio Estevam

Hi Marek,

Quoted 3 lines · Marek Vasut

I was concerned about the placement of the PHY reg definition. I didn't hear from Fabio on the result of this decision and I don't really mind that either way.

I thought that maybe we should relax about the 'register access via offset is forbidden' rule for new code submission, as according to Tom he would like to see this going away in the future:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2

Hi,

OK, I'm fine with that. But this discussion is not about the register access, but about placing register definition which is common to three different SoC families into the correct place. Did I miss something please ?

Best regards,
Marek Vasut

#7 lore raw

PATCH v2 5/6 usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's

In reply to Marek Vasut

Hello,

Quoted 21 lines · Marek Vasut
Quoted 4 lines · Sanchayan Maity

This driver adds support for the USB peripheral on Freescale Vybrid SoC's.

Quoted 9 lines
---
 arch/arm/include/asm/arch-vf610/crm_regs.h    |  10 ++
 arch/arm/include/asm/arch-vf610/imx-regs.h    |   4 +
 arch/arm/include/asm/arch-vf610/regs-usbphy.h |  31 ++++
 drivers/usb/host/Makefile                     |   1 +
 drivers/usb/host/ehci-vf.c                    | 196
++++++++++++++++++++++++++ 5 files changed, 242 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-vf610/regs-usbphy.h
 create mode 100644 drivers/usb/host/ehci-vf.c

A general hint, you can replace sequences of code like this:

var = readl(foo);
var |= BIT_BAR;
writel(var, addr);

Quoted 6 lines

with

setbits_le32(var, BIT_BAR);

Same applies for clearing -- clrbits_le32() and both setting and clearing -- clrsetbits_le32().

Sorry about that. It is something which I use in the sixth patch as well in the board files but it skipped my mind while doing this driver. Will take care of it in v3 which seems imminent.

Noted, thanks :).

- Sanchayan.

Quoted 5 lines

Thanks!

Best regards,
Marek Vasut

#8 lore raw

PATCH v2 5/6 usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's

Quoted 31 lines · maitysanchayan at gmail.com

Hello,

Quoted 28 lines · Marek Vasut
Quoted 12 lines · Sanchayan Maity

This driver adds support for the USB peripheral on Freescale Vybrid SoC's.

---

 arch/arm/include/asm/arch-vf610/crm_regs.h    |  10 ++
 arch/arm/include/asm/arch-vf610/imx-regs.h    |   4 +
 arch/arm/include/asm/arch-vf610/regs-usbphy.h |  31 ++++
 drivers/usb/host/Makefile                     |   1 +
 drivers/usb/host/ehci-vf.c                    | 196
Quoted 4 lines

++++++++++++++++++++++++++ 5 files changed, 242 insertions(+)

 create mode 100644 arch/arm/include/asm/arch-vf610/regs-usbphy.h
 create mode 100644 drivers/usb/host/ehci-vf.c

A general hint, you can replace sequences of code like this:

var = readl(foo);
var |= BIT_BAR;
writel(var, addr);

with

setbits_le32(var, BIT_BAR);

Quoted 8 lines
Quoted 2 lines

Same applies for clearing -- clrbits_le32() and both setting and clearing -- clrsetbits_le32().

Sorry about that. It is something which I use in the sixth patch as well in the board files but it skipped my mind while doing this driver. Will take care of it in v3 which seems imminent.

Noted, thanks :).

Thank you :)

Best regards,
Marek Vasut

#15 lore raw

v2 cover Add support for Colibri Vybrid Modules

In reply to Marek Vasut

Hello,

Quoted 17 lines · Marek Vasut
Quoted 16 lines · maitysanchayan at gmail.com

Hi,

Quoted 12 lines · Marek Vasut
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 8 lines
Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Yes sure. Will put the USB support in the end or not, the first patches can go in atleast since there seem to be no complaints on them so far.

Quoted 10 lines
Quoted 5 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific thing, but I might be wrong.

I would say it looks like chipidea specific but I have not looked at IPs other than Freescale controllers to be sure.

Quoted 9 lines
Quoted 5 lines

By the way, where the fifth patch is concerned, is it related to the discussion Fabio pointed out in the discussion on first version of the patch? uboot trying to get rid of the 'no register access via offset' rule? Anything required I can rework accordingly.

I was concerned about the placement of the PHY reg definition. I didn't hear from Fabio on the result of this decision and I don't really mind that either way.

Ok. So I assume the driver can resort to the way it was in the first version while being changed with regards to three points 1. Use of clrsetbits_ related functions 2. Register phy definitions going in either of imx-common/ or include/usb/ with chipidea name. 3. No need to use offset accesses with the struct{} in light of the discussion Fabio pointed out.

Quoted 3 lines

Best regards,
Marek Vasut

Thanks & Regards,
Sanchayan.

#16 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 38 lines · maitysanchayan at gmail.com

Hello,

Quoted 18 lines · Marek Vasut
Quoted 17 lines · maitysanchayan at gmail.com

Hi,

Quoted 13 lines · Marek Vasut
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 8 lines
Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Yes sure. Will put the USB support in the end or not, the first patches can go in atleast since there seem to be no complaints on them so far.

Quoted 5 lines
Quoted 4 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

Quoted 7 lines
Quoted 4 lines

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific thing, but I might be wrong.

I would say it looks like chipidea specific but I have not looked at IPs other than Freescale controllers to be sure.

I think it's CI-specific indeed, thus include/usb/ . +CC Peter, who might chime in whether the PHY is CI-specific or IMX-specific.

Quoted 9 lines
Quoted 8 lines
Quoted 4 lines

By the way, where the fifth patch is concerned, is it related to the discussion Fabio pointed out in the discussion on first version of the patch? uboot trying to get rid of the 'no register access via offset' rule? Anything required I can rework accordingly.

I was concerned about the placement of the PHY reg definition. I didn't hear from Fabio on the result of this decision and I don't really mind that either way.

Quoted 6 lines

Ok. So I assume the driver can resort to the way it was in the first version while being changed with regards to three points 1. Use of clrsetbits_ related functions 2. Register phy definitions going in either of imx-common/ or include/usb/ with chipidea name. 3. No need to use offset accesses with the struct{} in light of the discussion Fabio pointed out.

Yup, that'd be nice. Thanks!

Best regards,
Marek Vasut

#17 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 46 lines
Quoted 5 lines · Marek Vasut
Quoted 1 line

On Sunday, April 12, 2015 at 07:33:41 AM, maitysanchayan at gmail.com

Quoted 40 lines · wrote:
Quoted 24 lines
Quoted 17 lines

Hi,

Quoted 7 lines · Marek Vasut
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Quoted 6 lines

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Quoted 2 lines

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Yes sure. Will put the USB support in the end or not, the first patches can go in atleast since there seem to be no complaints on them so far.

Quoted 9 lines
Quoted 4 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific thing, but I might be wrong.

Quoted 6 lines
Quoted 2 lines

I would say it looks like chipidea specific but I have not looked at IPs other than Freescale controllers to be sure.

I think it's CI-specific indeed, thus include/usb/ . +CC Peter, who might chime in whether the PHY is CI-specific or IMX-specific.

Which PHY? Vybrid? In Linux kernel, it belongs to mxs PHY. The same controller can integrate different PHYs.

Peter

#18 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 45 lines · Peter Chen
Quoted 45 lines
Quoted 2 lines · Marek Vasut
Quoted 1 line

On Sunday, April 12, 2015 at 07:33:41 AM, maitysanchayan at gmail.com

Quoted 41 lines · wrote:
Quoted 24 lines
Quoted 17 lines

Hi,

Quoted 7 lines · Marek Vasut
Quoted 5 lines · Sanchayan Maity

Hello,

This is the second version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART.

Quoted 6 lines

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Quoted 2 lines

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Yes sure. Will put the USB support in the end or not, the first patches can go in atleast since there seem to be no complaints on them so far.

Quoted 9 lines
Quoted 4 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific thing, but I might be wrong.

Quoted 8 lines
Quoted 5 lines
Quoted 2 lines

I would say it looks like chipidea specific but I have not looked at IPs other than Freescale controllers to be sure.

I think it's CI-specific indeed, thus include/usb/ . +CC Peter, who might chime in whether the PHY is CI-specific or IMX-specific.

Which PHY? Vybrid? In Linux kernel, it belongs to mxs PHY. The same controller can integrate different PHYs.

Yeah. Is the PHY MXS/IMX/VF specific or can that PHY be found even on other SoCs not manufactured by Freescale ?

Best regards,
Marek Vasut

#19 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 38 lines
Quoted 29 lines
Quoted 29 lines
Quoted 29 lines
Quoted 17 lines
Quoted 10 lines
Quoted 9 lines

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Quoted 2 lines

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Yes sure. Will put the USB support in the end or not, the first patches can go in atleast since there seem to be no complaints on them so far.

Quoted 5 lines
Quoted 4 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific

thing, but I might be wrong.

Quoted 4 lines
Quoted 4 lines
Quoted 3 lines

I would say it looks like chipidea specific but I have not looked at IPs other than Freescale controllers to be sure.

Quoted 9 lines
Quoted 5 lines
Quoted 2 lines

I think it's CI-specific indeed, thus include/usb/ . +CC Peter, who might chime in whether the PHY is CI-specific or IMX-specific.

Which PHY? Vybrid? In Linux kernel, it belongs to mxs PHY. The same controller can integrate different PHYs.

Yeah. Is the PHY MXS/IMX/VF specific or can that PHY be found even on other SoCs not manufactured by Freescale ?

This mxs PHY is from SigmaTel, I only see this PHY is used at FSL SoCs, but not sure if others use it.

Peter

#20 lore raw

v2 cover Add support for Colibri Vybrid Modules

Hello,

Quoted 44 lines · Peter Chen
Quoted 44 lines
Quoted 29 lines
Quoted 29 lines
Quoted 29 lines
Quoted 17 lines
Quoted 10 lines
Quoted 9 lines

Hi!

Stefano, maybe you can pick 1,2,3,4,6 right away for next? This way, we can solve 5/6 separately, since it might need some further dicussion. I don't want that patch to block the rest of the series though.

Quoted 6 lines

The sixth patch has some minor dependencies on the fifth patch like some #defines and configuration we enable for Colibri. In case the fifth patch will require some more discussion and time, then I guess I will need to rework the sixth patch and then everything related to USB can go in a later patch. The rework will be minor. So the v3 will be without USB support

Quoted 2 lines

Well, if you want to rework the 6th patch, that'd be very nice of you :)

Yes sure. Will put the USB support in the end or not, the first patches can go in atleast since there seem to be no complaints on them so far.

Quoted 5 lines
Quoted 4 lines

and USB will go in later once this gets applied. Perhaps we will send the USB along with some more other featureset addition like gpio support for Vybrid which my colleague did recently along with some driver model/dt stuff.

Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines

My impression is that the USB is just a matter of figuring out where the PHY registers go -- whether in arch/arm/include/imx-common or into include/usb/ . I'd be more inclined for the later, since the PHY regs looks like chipidea IP specific

thing, but I might be wrong.

Quoted 9 lines
Quoted 6 lines
Quoted 3 lines

I would say it looks like chipidea specific but I have not looked at IPs other than Freescale controllers to be sure.

I think it's CI-specific indeed, thus include/usb/ . +CC Peter, who might chime in whether the PHY is CI-specific or IMX-specific.

Which PHY? Vybrid? In Linux kernel, it belongs to mxs PHY. The same controller can integrate different PHYs.

Quoted 6 lines
Quoted 3 lines

Yeah. Is the PHY MXS/IMX/VF specific or can that PHY be found even on other SoCs not manufactured by Freescale ?

This mxs PHY is from SigmaTel, I only see this PHY is used at FSL SoCs, but not sure if others use it.

So Chipidea IP with the SigmaTel phy. It might be better to have the regs-usbphy.h viz. register phy definitions in imx-common then since it is not clear if SoC's other than Freescale's use the same phy.

Marek, what do you think?

- Sanchayan.

Quoted 2 lines

Peter

#21 lore raw

v2 cover Add support for Colibri Vybrid Modules

Quoted 1 line · maitysanchayan at gmail.com

Hello,

Hi!

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Yeah. Is the PHY MXS/IMX/VF specific or can that PHY be found even on other SoCs not manufactured by Freescale ?

This mxs PHY is from SigmaTel, I only see this PHY is used at FSL SoCs, but not sure if others use it.

So Chipidea IP with the SigmaTel phy. It might be better to have the regs-usbphy.h viz. register phy definitions in imx-common then since it is not clear if SoC's other than Freescale's use the same phy.

Marek, what do you think?

I agree, let's do it.

Thanks!

Best regards,
Marek Vasut