Implement SoC bus support for Vybrid

Hello,

Currently this patchset is based of on our local branch but would like some comments before I push this to mainline through Shawn's tree.

This patchset implements the following
https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-soc

Currently the required information is more or less read across the whole SoC, but I guess we cannot change that since these are the locations with the required information.

There seem to be three options for the revision field:
- ROM revision (see https://community.freescale.com/docs/DOC-94802)
- ANADIG revision (ANADIG_DIGIPROC, as used for the i.MX SoC's)
- OCOTP revision

Some numbers:

Colibri VF61 1.1A (2N02G)
- 0x00000013
- 0x00610000
- 0x01000000
- 0x410000c8

Colibri VF61 V1.0B (1N02G)
- 0x00000011
- 0x00610000
- 0x01000000
- 0x410000c8

Colibri VF61 V1.0A (which is actually a VF600 SoC, no L2 cache, since that was the only one we could buy back then, 1N02G printed on it)
- 0x00000011
- 0x00610000
- 0x01000000
- none...

Colibri VF50 V1.0A (1N02G)
- 0x00000011
- 0x00610000
- 0x01000000
- none...

Vybrid Tower Rev J (1N02G)
- 0x00000011
- 0x00610000
- 0x01000000
- 0x410000c8

Read from u-boot
md.l 0x80 1
md.l 0x40050260 1
md.l 0x400A5090 1

The ROM revision seems to differ most. So we would like to go with the revision from the ROM register 0x80.

Now coming to the primary question. This ROM revision register is not really within any of the peripheral maps and I would like to access it for the versioning information. Currently, I used ioremap like below

ioremap(ROM_REVISION_REGISTER, SZ_1);

which I guess probably is not the right way to do it. What would be the correct or better way to do this?

Also comments or feedback or any of the other parts of the patch are also welcome.

Some Sample outputs are below:
On Colibri VF61 V1.1A:
root at colibri-vf:/sys/devices/soc0# ls

backlight      fxosc          regulators     sound          uevent
bl_on          gpio-keys      revision       subsystem
clk16m         machine        soc            sxosc
family         power          soc_id         syscon-reboot

root at colibri-vf:/sys/devices/soc0# cat revision 00000013
root at colibri-vf:/sys/devices/soc0# cat soc_id dbc8435c211629d4
root at colibri-vf:/sys/devices/soc0# cat family Freescale Vybrid VF610

On Colibri VF50 V1.1A:
root at colibri-vf:/sys/devices/soc0# ls

backlight               machine                 subsystem
bl_on                   power                   sxosc
clk16m                  regulators              syscon-reboot
family                  revision                toradex,vf50_touchctrl
fxosc                   soc                     uevent
gpio-keys               soc_id

root at colibri-vf:/sys/devices/soc0# cat revision 00000013
root at colibri-vf:/sys/devices/soc0# cat soc_id df63c12a2e2161d4
root at colibri-vf:/sys/devices/soc0# cat family Freescale Vybrid VF500
root at colibri-vf:/sys/devices/soc0# cat machine Freescale Vybrid

Thanks & Regards,
Sanchayan Maity.

Sanchayan Maity (2):
ARM: dts: vfxxx: Add OCOTP node
ARM: vf610: Add SoC bus support for Vybrid

 arch/arm/boot/dts/vfxxx.dtsi   |  5 +++
 arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 80 insertions(+), 1 deletion(-)

Signature · 1 line

2.4.0

Implements SoC bus support to export SoC specific information. Read the unique SoC ID from the Vybrid On Chip One Time Programmable (OCOTP) controller, SoC specific information from the Miscellaneous System Control Module (MSCM), revision from the ROM revision register and expose it via the SoC bus infrastructure.

Signed-off-by Sanchayan Maity <[email protected]>

---
 arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 75 insertions(+), 1 deletion(-)

arch/arm/mach-imx/mach-vf610.c +39 -1

index 1ba7738..74681f1 100644
@@ -9,13 +9,87 @@
 
 #include <linux/of_platform.h>
 #include <linux/irqchip.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/random.h>
+#include <linux/io.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/cache-l2x0.h>
 #include "common.h"
 
+#define OCOTP_CFG0_OFFSET      0x00000410
+#define OCOTP_CFG1_OFFSET      0x00000420
+#define MSCM_CPxCOUNT_OFFSET   0x0000002C
+#define MSCM_CPxCFG1_OFFSET    0x00000014
+#define ROM_REVISION_REGISTER  0x00000080
+
 static void __init vf610_init_machine(void)
 {
-	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+	struct regmap *ocotp_regmap, *mscm_regmap;
+	struct soc_device_attribute *soc_dev_attr;
+	struct device *parent = NULL;
+	struct soc_device *soc_dev;
+	char soc_type[] = "xx0";
+	void __iomem *rom_rev;
+	u32 cpxcount, cpxcfg1;
+	u32 soc_id1, soc_id2;
+	u64 soc_id;
+
+	ocotp_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocotp");
+	if (IS_ERR(ocotp_regmap)) {
+		pr_err("regmap lookup for octop failed\n");
+		goto out;
+	}
+
+	mscm_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-mscm-cpucfg");
+	if (IS_ERR(mscm_regmap)) {
+		pr_err("regmap lookup for mscm failed");
+		goto out;
+	}
+
+	regmap_read(ocotp_regmap, OCOTP_CFG0_OFFSET, &soc_id1);
+	regmap_read(ocotp_regmap, OCOTP_CFG1_OFFSET, &soc_id2);
+
+	soc_id = (u64) soc_id1 << 32 | soc_id2;
+	add_device_randomness(&soc_id, sizeof(soc_id));

arch/arm/mach-imx/mach-vf610.c +16 -0

+
+	soc_dev = soc_device_register(soc_dev_attr);
+	if (IS_ERR(soc_dev)) {
+		if (!rom_rev)
+			kfree(soc_dev_attr->revision);
+		kfree(soc_dev_attr->family);
+		kfree(soc_dev_attr->soc_id);
+		kfree(soc_dev_attr->machine);
+		kfree(soc_dev_attr);
+		goto out;
+	}
+
+	parent = soc_device_to_device(soc_dev);
+
+out:
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
 	vf610_pm_init();
 }