MIPS: BMIPS: dts: add NAND device nodes for bcm7xxx platforms
Subsystems (3)
cover MIPS: BMIPS: dts: add NAND device nodes for bcm7xxx platforms
Hi all,
This patch series contain changing device nodes of the bcm7xxx platforms.
Jaedon Shin (4):
MIPS: BMIPS: bcm7346: add nodes for NAND
MIPS: BMIPS: bcm7358: add nodes for NAND
MIPS: BMIPS: bcm7360: add nodes for NAND
MIPS: BMIPS: bcm7362: add nodes for NAND
arch/mips/boot/dts/brcm/bcm7346.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm7358.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm7360.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm7362.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 23 +++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97358svmb.dts | 23 +++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97360svmb.dts | 23 +++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97362svmb.dts | 23 +++++++++++++++++++++++ 8 files changed, 180 insertions(+)
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PATCH 1/4 MIPS: BMIPS: bcm7346: add nodes for NAND
In reply to a message not in the archiveAdd NAND device nodes to BMIPS based BCM7346 platform.
--- arch/mips/boot/dts/brcm/bcm7346.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 23 +++++++++++++++++++++++ 2 files changed, 45 insertions(+)
arch/mips/boot/dts/brcm/bcm7346.dtsi +22 -0
@@ -220,5 +220,27 @@ interrupts = <76>; status = "disabled"; }; + + hif_intr2_intc: interrupt-controller@411000 { + compatible = "brcm,l2-intc"; + reg = <0x411000 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <30>; + interrupt-names = "hif"; + }; + + nand0: nand@412800 { + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "nand"; + reg = <0x412800 0x400>; + interrupt-parent = <&hif_intr2_intc>; + interrupt-names = "nand_ctlrdy"; + interrupts = <24>; + status = "disabled"; + }; }; };
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +23 -0
@@ -56,3 +56,26 @@ &ohci3 { status = "okay"; }; + +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; + + flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};
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PATCH 2/4 MIPS: BMIPS: bcm7358: add nodes for NAND
In reply to a message not in the archiveAdd NAND device nodes to BMIPS based BCM7358 platform.
--- arch/mips/boot/dts/brcm/bcm7358.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97358svmb.dts | 23 +++++++++++++++++++++++ 2 files changed, 45 insertions(+)
arch/mips/boot/dts/brcm/bcm7358.dtsi +22 -0
@@ -157,5 +157,27 @@ interrupts = <66>; status = "disabled"; }; + + hif_intr2_intc: interrupt-controller@411000 { + compatible = "brcm,l2-intc"; + reg = <0x411000 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <30>; + interrupt-names = "hif"; + }; + + nand0: nand@412800 { + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "nand"; + reg = <0x412800 0x400>; + interrupt-parent = <&hif_intr2_intc>; + interrupt-names = "nand_ctlrdy"; + interrupts = <24>; + status = "disabled"; + }; }; };
arch/mips/boot/dts/brcm/bcm97358svmb.dts +23 -0
@@ -32,3 +32,26 @@ &ohci0 { status = "okay"; }; + +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; + + flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};
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PATCH 3/4 MIPS: BMIPS: bcm7360: add nodes for NAND
In reply to a message not in the archiveAdd NAND device nodes to BMIPS based BCM7360 platform.
--- arch/mips/boot/dts/brcm/bcm7360.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97360svmb.dts | 23 +++++++++++++++++++++++ 2 files changed, 45 insertions(+)
arch/mips/boot/dts/brcm/bcm7360.dtsi +22 -0
@@ -157,5 +157,27 @@ interrupts = <66>; status = "disabled"; }; + + hif_intr2_intc: interrupt-controller@411000 { + compatible = "brcm,l2-intc"; + reg = <0x411000 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <30>; + interrupt-names = "hif"; + }; + + nand0: nand@412800 { + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "nand"; + reg = <0x412800 0x400>; + interrupt-parent = <&hif_intr2_intc>; + interrupt-names = "nand_ctlrdy"; + interrupts = <24>; + status = "disabled"; + }; }; };
arch/mips/boot/dts/brcm/bcm97360svmb.dts +23 -0
@@ -32,3 +32,26 @@ &ohci0 { status = "okay"; }; + +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; + + flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};
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PATCH 4/4 MIPS: BMIPS: bcm7362: add nodes for NAND
In reply to a message not in the archiveAdd NAND device nodes to BMIPS based BCM7362 platform.
--- arch/mips/boot/dts/brcm/bcm7362.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/brcm/bcm97362svmb.dts | 23 +++++++++++++++++++++++ 2 files changed, 45 insertions(+)
arch/mips/boot/dts/brcm/bcm7362.dtsi +22 -0
@@ -163,5 +163,27 @@ interrupts = <66>; status = "disabled"; }; + + hif_intr2_intc: interrupt-controller@411000 { + compatible = "brcm,l2-intc"; + reg = <0x411000 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&periph_intc>; + interrupts = <30>; + interrupt-names = "hif"; + }; + + nand0: nand@412800 { + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "nand"; + reg = <0x412800 0x400>; + interrupt-parent = <&hif_intr2_intc>; + interrupt-names = "nand_ctlrdy"; + interrupts = <24>; + status = "disabled"; + }; }; };
arch/mips/boot/dts/brcm/bcm97362svmb.dts +23 -0
@@ -32,3 +32,26 @@ &ohci0 { status = "okay"; }; + +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; + + flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};
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Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND
In reply to a message not in the archive+Brian,
Quoted 4 lines · Jaedon Shin
Add NAND device nodes to BMIPS based BCM7346 platform.
Signed-off-by Jaedon Shin <[email protected]>---
[snip]
Quoted 13 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +13
-0+ +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>;
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts line 81
Quoted 10 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +10
-0+ + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; + + flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};
Should we create something like brcmnand-cs1-512-8 to reduce the amount of duplication between DTS files?
Signature · 5 lines
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Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND
In reply to a message not in the archiveQuoted 31 lines · Florian Fainelli
+Brian,
Quoted 4 lines · Jaedon Shin
Add NAND device nodes to BMIPS based BCM7346 platform.
Signed-off-by Jaedon Shin <[email protected]>---
[snip]
Quoted 18 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +18
-0+ +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; +
Quoted 10 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts line 81
Quoted 5 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +5
-0+ flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};Should we create something like brcmnand-cs1-512-8 to reduce the amount of duplication between DTS files?
Signature · 1 line
Florian
I Think that is not duplication.
I have no reference boards, but this node is maybe explaining for hardware description of the BCM97346DBSMB reference board. The nodes are changed by EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and brcmnand-cs1-512-4 for others.
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Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND
In reply to a message not in the archiveQuoted 42 lines · Jaedon Shin
Quoted 31 lines · Florian Fainelli
+Brian,
Quoted 4 lines · Jaedon Shin
Add NAND device nodes to BMIPS based BCM7346 platform.
Signed-off-by Jaedon Shin <[email protected]>---
[snip]
Quoted 18 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +18
-0+ +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; +Quoted 10 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts line 81
Quoted 5 lines
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts +5
-0+ flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};Should we create something like brcmnand-cs1-512-8 to reduce the amount of duplication between DTS files?
Signature · 1 line
Florian
Quoted 6 lines
I Think that is not duplication.
I have no reference boards, but this node is maybe explaining for hardware description of the BCM97346DBSMB reference board. The nodes are changed by EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and brcmnand-cs1-512-4 for others.
Then I am confused, your 4 patches add identical NAND flash chip properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step size and 8 bits of ECC strength, am I missing something?
Signature · 5 lines
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Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND
In reply to a message not in the archiveQuoted 46 lines · Florian Fainelli
Quoted 42 lines · Jaedon Shin
Quoted 41 lines · Florian Fainelli
+Brian,
Quoted 4 lines · Jaedon Shin
Add NAND device nodes to BMIPS based BCM7346 platform.
Signed-off-by Jaedon Shin <[email protected]>---
[snip]
Quoted 13 lines
(quoted diff) +13
-0+ +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>;Review
Quoted 10 lines
(quoted diff) +10
-0+ + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; + + flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};Should we create something like brcmnand-cs1-512-8 to reduce the amount of duplication between DTS files?
Signature · 1 line
Florian
Quoted 7 lines
Quoted 6 lines
I Think that is not duplication.
I have no reference boards, but this node is maybe explaining for hardware description of the BCM97346DBSMB reference board. The nodes are changed by EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and brcmnand-cs1-512-4 for others.
The *others* means BCM7346 based set-top box of manufacturer. they are not bcm973XX{dbsmb,svmb} boards.
Quoted 5 lines
Then I am confused, your 4 patches add identical NAND flash chip properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step size and 8 bits of ECC strength, am I missing something?
Signature · 1 line
Florian
The mips based reference boards have postfix of DBSMB, SVMB, SFF and others. they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write the DT of bcm97346sff.dts, therefore it has different fields.
Then I expected that mips 40nm based SVMB type reference boards have the same properties. but, I don't have confidence. AISE I have no reference boards unfortunately. if you can contact with people who have reference board, would tell me information of #CS and NAND. --
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Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND
In reply to a message not in the archiveQuoted 48 lines · Jaedon Shin
Quoted 48 lines · Florian Fainelli
Quoted 44 lines · Jaedon Shin
Quoted 31 lines · Florian Fainelli
+Brian,
Quoted 4 lines · Jaedon Shin
Add NAND device nodes to BMIPS based BCM7346 platform.
Signed-off-by Jaedon Shin <[email protected]>---
[snip]
Quoted 18 lines
(quoted diff) +18
-0+ +&nand0 { + status = "okay"; + + nandcs@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-on-flash-bbt; + + #size-cells = <2>; + #address-cells = <2>; + + flash1.rootfs0@0 { + reg = <0x0 0x0 0x0 0x80000000>; + }; +Quoted 10 lines
Review
Quoted 5 lines
(quoted diff) +5
-0+ flash1.rootfs1@80000000 { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + }; +};Should we create something like brcmnand-cs1-512-8 to reduce the amount of duplication between DTS files?
Signature · 1 line
FlorianI Think that is not duplication.
Quoted 8 lines
Quoted 5 lines
Quoted 4 lines
I have no reference boards, but this node is maybe explaining for hardware description of the BCM97346DBSMB reference board. The nodes are changed by EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and brcmnand-cs1-512-4 for others.
The *others* means BCM7346 based set-top box of manufacturer. they are not bcm973XX{dbsmb,svmb} boards.
Understood.
Quoted 7 lines
Quoted 6 lines
Then I am confused, your 4 patches add identical NAND flash chip properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step size and 8 bits of ECC strength, am I missing something?
Signature · 1 line
Florian
Quoted 8 lines
The mips based reference boards have postfix of DBSMB, SVMB, SFF and others. they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write the DT of
bcm97346sff.dts, therefore it has different fields.Then I expected that mips 40nm based SVMB type reference boards have the same properties. but, I don't have confidence. AISE I have no reference boards unfortunately. if you can contact with people who have reference board, would tell me information of #CS and NAND.
I agree with you that outside of reference boards, these flash settings will vary, however, Broadcom reference boards tend to follow the same design from one chip/board to another, so instead of replicating 4 times the same DT snippet in Device Tree, we could come up with differerent sets of include files which abstract commonly found NAND flash types and properties. Code might talk better, so I will try to submit something that illustrates what I have in mind.
Thanks!
Signature · 5 lines
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