New SPI NOR chip IDs

PATCH In review Michal Suchanek 3 participants 12 messages Jul 28, 2015

Subsystems (2)

Memory technology devices (MTD) SPI NOR

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Michal Suchanek

author

2015-07-28 09:08 UTC #0 lore raw

cover New SPI NOR chip IDs

Hello,

these are flash chips I used when testing spi nor drivers.

GD25Q41B is thoroughly tested, Pm25LD020 is tested but the chip is probably bad and GD25LQ32C is tested readonly.

Thanks

Michal

Michal Suchanek (2):
mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
MTD: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

 drivers/mtd/spi-nor/spi-nor.c | 3 +++
 1 file changed, 3 insertions(+)

Signature · 1 line

2.1.4

Michal Suchanek

author

2015-07-28 09:08 UTC #1 lore raw

PATCH 1/2 mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.

Signed-off-by Michal Suchanek <[email protected]>

---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)

drivers/mtd/spi-nor/spi-nor.c +1 -0

index d78831b..cba3bd0 100644
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
 	/* GigaDevice */
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
+	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
 	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },

Signature · 1 line

2.1.4

Marek Vasut

2015-07-28 14:33 UTC #2 lore raw

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

Quoted 13 lines · Michal Suchanek

This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)
drivers/mtd/spi-nor/spi-nor.c +0 -0
index d78831b..cba3bd0 100644

drivers/mtd/spi-nor/spi-nor.c static const struct spi_device_id spi_nor_ids[] = { · line 564

Quoted 6 lines

drivers/mtd/spi-nor/spi-nor.c +1 -0

@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
 	/* GigaDevice */
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
+	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
 	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },

Don't we have DT bindings, so we can use jedec,spi-nor prop for all new SPI NORs without growing this table ?

Best regards,
Marek Vasut

Michal Suchanek

author

2015-07-28 14:37 UTC #3 lore raw

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

Quoted 15 lines · Marek Vasut

Quoted 14 lines · Michal Suchanek
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)
drivers/mtd/spi-nor/spi-nor.c +0 -0
index d78831b..cba3bd0 100644
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 

Quoted 8 lines

drivers/mtd/spi-nor/spi-nor.c static const struct spi_device_id spi_nor_ids[] = { · line 564
Quoted 5 lines
drivers/mtd/spi-nor/spi-nor.c +1 -0
      /* GigaDevice */
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
+     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
      { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all new SPI NORs without growing this table ?

When jedec,spi-nor compatible is used an attempt is made to identify the chip using this table.

When the ID is not in the table (or is misread due to transfer error) spi-nor probe fails.

Thanks

Michal

Marek Vasut

2015-07-28 14:38 UTC #4 lore raw

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

Quoted 28 lines · Michal Suchanek

Quoted 19 lines · Marek Vasut
Quoted 18 lines · Michal Suchanek
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0
b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
drivers/mtd/spi-nor/spi-nor.c +0 -0
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
      /* GigaDevice */
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 
Quoted 7 lines
Quoted 4 lines
drivers/mtd/spi-nor/spi-nor.c +1 -0
+     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
      { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all new SPI NORs without growing this table ?

Quoted 5 lines

When jedec,spi-nor compatible is used an attempt is made to identify the chip using this table.
When the ID is not in the table (or is misread due to transfer error) spi-nor probe fails.

Dang, I was under the impression we want to avoid growing this table :(

Best regards,
Marek Vasut

Michal Suchanek

author

2015-07-28 14:52 UTC #5 lore raw

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

Quoted 29 lines · Marek Vasut

Quoted 28 lines · Michal Suchanek
Quoted 26 lines · Marek Vasut
Quoted 21 lines · Michal Suchanek
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0
b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
drivers/mtd/spi-nor/spi-nor.c +1 -0
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
      /* GigaDevice */
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 
+     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
Quoted 1 line
      { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all new SPI NORs without growing this table ?

Quoted 8 lines

Quoted 5 lines
When jedec,spi-nor compatible is used an attempt is made to identify the chip using this table.
When the ID is not in the table (or is misread due to transfer error) spi-nor probe fails.
Dang, I was under the impression we want to avoid growing this table :(

The table not to be grown is the devicetree compatibles table. jedec,spi-nor should be enough for chips that respond to the ID command.

BTW jedec is not a registered vendor and adding flash chips to devicetree causes checkpatch warnings.

Theoretically you could use the ID data to infer block and whole flash size but code for that is not in the driver. Not sure how many vendor-specific encodings and exceptions are out there.

Thanks

Michal

Rafał Miłecki

2015-07-28 15:19 UTC #6 lore raw

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

In reply to Marek Vasut

Quoted 15 lines · Marek Vasut

Quoted 14 lines · Michal Suchanek
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)
drivers/mtd/spi-nor/spi-nor.c +0 -0
index d78831b..cba3bd0 100644
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 

Quoted 8 lines

drivers/mtd/spi-nor/spi-nor.c static const struct spi_device_id spi_nor_ids[] = { · line 564
Quoted 5 lines
drivers/mtd/spi-nor/spi-nor.c +1 -0
      /* GigaDevice */
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
+     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
      { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all new SPI NORs without growing this table ?

You confused this table with the one in m25p80.c.

Signature · 1 line

Rafał

Marek Vasut

2015-07-28 15:48 UTC #7 lore raw

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

Quoted 22 lines · Rafał Miłecki

Quoted 21 lines · Marek Vasut
Quoted 20 lines · Michal Suchanek
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads something like 25LQ32VIG in the middle.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0
b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
drivers/mtd/spi-nor/spi-nor.c +1 -0
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
      /* GigaDevice */
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 
+     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 

Quoted 7 lines

Quoted 5 lines
Quoted 2 lines
drivers/mtd/spi-nor/spi-nor.c +0 -0
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
      { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all new SPI NORs without growing this table ?
You confused this table with the one in m25p80.c.

Uh oh, sorry.

Best regards,
Marek Vasut

Michal Suchanek

author

2015-07-28 09:08 UTC #8 lore raw

PATCH 2/2 mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

In reply to Michal Suchanek

First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB. Identified as PMC Pm25LD020.
Flash read does not return consistent data which explains why the disk died.

Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based ESP-01 board. Identified as Giga Devices GD25Q41B.

Signed-off-by Michal Suchanek <[email protected]>

---
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 1 file changed, 2 insertions(+)

drivers/mtd/spi-nor/spi-nor.c +2 -0

index cba3bd0..e55689d 100644
@@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
 
 	/* GigaDevice */
+	{ "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },

@@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
 	{ "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
+	{ "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
 	{ "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
 
 	/* Spansion -- single (large) sector size only, at least

Signature · 1 line

2.1.4

Marek Vasut

2015-07-28 14:33 UTC #9 lore raw

Re: [PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

Quoted 26 lines · Michal Suchanek

First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB. Identified as PMC Pm25LD020.
Flash read does not return consistent data which explains why the disk died.
Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based ESP-01 board. Identified as Giga Devices GD25Q41B.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/mtd/spi-nor/spi-nor.c +1 -0
index cba3bd0..e55689d 100644
@@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
 
 	/* GigaDevice */
+	{ "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },

drivers/mtd/spi-nor/spi-nor.c static const struct spi_device_id spi_nor_ids[] = { · line 608

Quoted 7 lines

drivers/mtd/spi-nor/spi-nor.c +1 -0

@@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
 	{ "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
+	{ "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
 	{ "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
 
 	/* Spansion -- single (large) sector size only, at least

You might want to split this into two patches, but see my comment on 1/2 and please wait for Brian's confirmation there before you do anything.

Thanks!

Best regards,
Marek Vasut

Rafał Miłecki

2015-07-28 15:22 UTC #10 lore raw

Re: [PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

Quoted 33 lines · Marek Vasut

Quoted 32 lines · Michal Suchanek

First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB. Identified as PMC Pm25LD020.
Flash read does not return consistent data which explains why the disk died.

Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based ESP-01 board. Identified as Giga Devices GD25Q41B.

Signed-off-by Michal Suchanek <[email protected]>

---
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 1 file changed, 2 insertions(+)

drivers/mtd/spi-nor/spi-nor.c +2 -0

index cba3bd0..e55689d 100644
@@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
      { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
 
      /* GigaDevice */
+     { "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
      { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },

@@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
      /* PMC */
      { "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
      { "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
+     { "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
      { "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },

Quoted 4 lines

drivers/mtd/spi-nor/spi-nor.c static const struct spi_device_id spi_nor_ids[] = { · line 608
Quoted 1 line
drivers/mtd/spi-nor/spi-nor.c +0 -0
      /* Spansion -- single (large) sector size only, at least
You might want to split this into two patches, but see my comment on 1/2 and please wait for Brian's confirmation there before you do anything.

Since these flashes are from 2 different vendors, it may make sense to use 2 separated patches. I don't care too much however.

Adding these entries is OK in general.

Signature · 1 line

Rafał

Marek Vasut

2015-07-28 15:49 UTC #11 lore raw

Re: [PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

Quoted 49 lines · Rafał Miłecki

Quoted 39 lines · Marek Vasut
Quoted 38 lines · Michal Suchanek
First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB. Identified as PMC Pm25LD020.
Flash read does not return consistent data which explains why the disk died.
Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based ESP-01 board. Identified as Giga Devices GD25Q41B.
Signed-off-by Michal Suchanek <[email protected]>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 1 file changed, 2 insertions(+)
(quoted diff) +0 -0
b/drivers/mtd/spi-nor/spi-nor.c index cba3bd0..e55689d 100644
drivers/mtd/spi-nor/spi-nor.c +1 -0
@@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
      { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE)
      },
 
      /* GigaDevice */
 
+     { "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
      { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
drivers/mtd/spi-nor/spi-nor.c +0 -0
@@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
      /* PMC */
      { "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC)
      }, { "pm25lv010",   INFO(0,        0, 32 * 1024,    4,
      SECT_4K_PMC) },
 
Quoted 8 lines
Quoted 5 lines
drivers/mtd/spi-nor/spi-nor.c +1 -0
+     { "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
      { "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
      
      /* Spansion -- single (large) sector size only, at least
You might want to split this into two patches, but see my comment on 1/2 and please wait for Brian's confirmation there before you do anything.

Quoted 4 lines

Since these flashes are from 2 different vendors, it may make sense to use 2 separated patches. I don't care too much however.
Adding these entries is OK in general.

Thanks for clarifying, I'll make sure to remember this :)

Best regards,
Marek Vasut