Implement OCOTP driver for Vybrid using NVMEM

Hello,

Tested on Greg's tree char-misc-next branch along with Stefan's NAND driver patchset.

Sample output on Colibri VF50

root at colibri-vf:/sys/bus/nvmem/devices/ocotp0# uname -a
Linux colibri-vf 4.2.0-rc6-00009-g1cec223 #5 SMP Mon Sep 7 12:34:37 IST 2015 armv7l GNU/Linux

root at colibri-vf:/sys/bus/nvmem/devices/ocotp0# hexdump nvmem 0000000 0000 0000 0000 0000 0000 0000 0000 0000
*
0000410 72a6 df64 0000 0000 0000 0000 0000 0000 0000420 11d4 2006 0000 0000 0000 0000 0000 0000 0000430 0000 0000 0000 0000 0000 0000 0000 0000
*
0000450 0280 0000 0000 0000 0000 0000 0000 0000 0000460 0000 0000 0000 0000 0000 0000 0000 0000
*
0000880 8f01 0000 0000 0000 0000 0000 0000 0000 0000890 0000 0000 0000 0000 0000 0000 0000 0000
*
00008c0 0000 1300 0000 0000 0000 0000 0000 0000 00008d0 320a 0800 0000 0000 0000 0000 0000 0000 00008e0 0000 e200 0000 0000 0000 0000 0000 0000 00008f0 0000 0000 0000 0000 0000 0000 0000 0000
*
0000c80 bada bada 0000 0000 0000 0000 0000 0000
*
0000cc0 0000 0000 0000 0000 0000 0000 0000 0000
*
0000cf0

Changes since v9:
1. Drop clock-names property from DT
2. Rebase on top of latest char-misc-next

Changes since v8:
1. Fix three lines over 80 characters
2. Rebase on top of Greg's char-misc-next branch

Changes since v7:
1. Add COMPILE_TEST to Kconfig
2. Use GENMASK and BIT macros where applicable
3. Fix a code alignment issue
4. Get the max_register value for regmap config using resource_size()
5. Also add copyright info as the driver logic is based off on ocotp code in barebox
6. Add missing info related to clock in DT binding doc

Changes since v6:
1. Use the v9 of NVMEM framework patchset
2. Add a few comments
3. Initialise buffer address not part of the fuse map to 0 instead of only handling buffer locations with valid fuse addresses.

Changes since v5:
Use NVMEM framework by Srinivas and Maxime

Changes since v4:
1. Use devm_* family of functions and use a struct to get rid of global variables (suggested by Joachim Eastwood)
2. Make Kconfig govern the compilation with tristate, instead of earlier bool. Paul Bolle raised a valid point that perhaps this should have been built in with the bool, however I had not taken into consideration generic distro kernels and it makes sense to have this tristated. (comments from Paul Bolle and Andreas Farber)

Changes since v3:
Instead of using the syscon_regmap_lookup_by_compatible function use a phandle in the device tree along with offsets specified in this phandle node and then read the offset along with the device node in the driver for reading from the required region.

Changes since v2:
Implement the SoC bus code as a driver in drivers/soc by registering with fsl,mscm-cpucfg as per Arnd's feedback

Changes since v1:
Sort the headers in alphabetical order

Changes since RFC:
Use a DT entry for the ROM area while specifying it as syscon.

Version 9 patches can be found here
https://lkml.org/lkml/2015/8/12/530

Version 8 patches can be found here
https://lkml.org/lkml/2015/8/10/566

Version 7 patches can be found here
https://lkml.org/lkml/2015/8/6/440

Version 6 RFC patches can be found here
http://lkml.iu.edu/hypermail/linux/kernel/1506.2/05123.html

Version 5 of the patchset can be found here
http://lkml.iu.edu/hypermail/linux/kernel/1506.0/03787.html

Version 4 of the patchset can be found here
https://lkml.org/lkml/2015/5/26/199

Version 3 of the patchset can be found here
http://www.spinics.net/lists/arm-kernel/msg420847.html

Version 2 of the patchset can be found here
http://www.spinics.net/lists/devicetree/msg80654.html

Version 1 of the patchset can be found here
http://www.spinics.net/lists/devicetree/msg80257.html

The RFC version can be found here
https://lkml.org/lkml/2015/5/11/13

Thanks & Regards,
Sanchayan Maity.

Sanchayan Maity (4):
clk: clk-vf610: Add clock for Vybrid OCOTP controller
ARM: dts: vfxxx: Add OCOTP node
drivers: nvmem: Add Vybrid OCOTP support
nvmem: Add DT binding documentation for Vybrid OCOTP driver

 .../devicetree/bindings/nvmem/vf610-ocotp.txt      |  19 ++
 arch/arm/boot/dts/vfxxx.dtsi                       |   8 +
 drivers/clk/imx/clk-vf610.c                        |   1 +
 drivers/nvmem/Kconfig                              |  10 +
 drivers/nvmem/Makefile                             |   2 +
 drivers/nvmem/vf610-ocotp.c                        | 302 +++++++++++++++++++++
 include/dt-bindings/clock/vf610-clock.h            |   3 +-
 7 files changed, 344 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt
 create mode 100644 drivers/nvmem/vf610-ocotp.c

2.5.1

Add clock support for Vybrid On-Chip One Time Programmable (OCOTP) controller.

While the OCOTP block does not require explicit clock gating, for programming the OCOTP timing register the clock rate of ipg clock is required for timing calculations related to fuse and shadow register read sequence. We explicitly specify the ipg clock for OCOTP as a result.

---
 drivers/clk/imx/clk-vf610.c             | 1 +
 include/dt-bindings/clock/vf610-clock.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

index bff45ea..d1b1c95 100644
@@ -387,6 +387,7 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
 
 	clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7));
 	clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24);
+	clk[VF610_CLK_OCOTP] = imx_clk_gate("ocotp", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(5));
 
 	imx_check_clocks(clk, ARRAY_SIZE(clk));
 

index d197634..56c16aa 100644
@@ -194,6 +194,7 @@
 #define VF610_PLL7_BYPASS		181
 #define VF610_CLK_SNVS			182
 #define VF610_CLK_DAP			183
-#define VF610_CLK_END			184
+#define VF610_CLK_OCOTP         184
+#define VF610_CLK_END			185
 
 #endif /* __DT_BINDINGS_CLOCK_VF610_H */

2.5.1

Add device tree node for the On-Chip One Time Programmable controller (OCOTP) on the Vybrid platform.

---
 arch/arm/boot/dts/vfxxx.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

index 2f4b04d..140d81e 100644
@@ -403,6 +403,14 @@
 				status = "disabled";
 			};
 
+			ocotp: ocotp at 400a5000 {
+				compatible = "fsl,vf610-ocotp";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x400a5000 0xCF0>;
+				clocks = <&clks VF610_CLK_OCOTP>;
+			};
+
 			snvs0: snvs at 400a7000 {
 			    compatible = "fsl,sec-v4.0-mon", "simple-bus";
 				#address-cells = <1>;

2.5.1

The patch adds support for the On Chip One Time Programmable Peripheral (OCOTP) on the Vybrid platform.

---
 drivers/nvmem/Kconfig       |  10 ++
 drivers/nvmem/Makefile      |   2 +
 drivers/nvmem/vf610-ocotp.c | 302 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 314 insertions(+)
 create mode 100644 drivers/nvmem/vf610-ocotp.c

index 8db2978..1d4f2b4 100644
@@ -36,4 +36,14 @@ config NVMEM_SUNXI_SID
 	  This driver can also be built as a module. If so, the module
 	  will be called nvmem_sunxi_sid.
 
+config NVMEM_VF610_OCOTP
+	tristate "VF610 SoC OCOTP support"
+	depends on SOC_VF610 || COMPILE_TEST
+	help
+	  This is a driver for the 'OCOTP' peripheral available on Vybrid
+	  devices like VF5xx and VF6xx.
+
+	  This driver can also be build as a module. If so, the module will
+	  be called nvmem-vf610-ocotp.
+
 endif

index 4328b93..3bdcfd4 100644
@@ -10,3 +10,5 @@ obj-$(CONFIG_QCOM_QFPROM)	+= nvmem_qfprom.o
 nvmem_qfprom-y			:= qfprom.o
 obj-$(CONFIG_NVMEM_SUNXI_SID)	+= nvmem_sunxi_sid.o
 nvmem_sunxi_sid-y		:= sunxi_sid.o
+obj-$(CONFIG_NVMEM_VF610_OCOTP)	+= nvmem-vf610-ocotp.o
+nvmem-vf610-ocotp-y		:= vf610-ocotp.o

2.5.1

Add the devicetree bindings for the Freescale Vybrid On-Chip OTP driver.

---
 .../devicetree/bindings/nvmem/vf610-ocotp.txt         | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt

new file mode 100644
index 0000000..56ed481
@@ -0,0 +1,19 @@
+On-Chip OTP Memory for Freescale Vybrid
+
+Required Properties:
+  compatible:
+  - "fsl,vf610-ocotp" for VF5xx/VF6xx
+  #address-cells : Should be 1
+  #size-cells : Should be 1
+  reg : Address and length of OTP controller and fuse map registers
+  clocks : ipg clock we associate with the OCOTP peripheral
+
+Example for Vybrid VF5xx/VF6xx:
+
+	ocotp: ocotp at 400a5000 {
+		compatible = "fsl,vf610-ocotp";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x400a5000 0xCF0>;
+		clocks = <&clks VF610_CLK_OCOTP>;
+	};

2.5.1

Hello,

Ping?

- Sanchayan.

Applied this one, thanks.