Two issue fixes of Xenon SDHCI

sdhci_remove_host() might execute SOFT_RESET_ALL. Inside xenon_remove(), Xenon SDHC should be enabled during sdhci_remove_host().

Move xenon_sdhc_unprepare after sdhci_remove_host() such that Xenon SDHC is disabled after sdhci_remove_host() completes.

Signed-off-by Hu Ziji <[email protected]>

Reported-by Jisheng Zhang <[email protected]>

Tested-by Jisheng Zhang <[email protected]>

---
 drivers/mmc/host/sdhci-xenon.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

drivers/mmc/host/sdhci-xenon.c +2 -2

index 3b82a0b..786c3ed 100644
@@ -514,10 +514,10 @@ static int xenon_remove(struct platform_device *pdev)
 
 	xenon_clean_phy(host);
 
-	xenon_sdhc_unprepare(host);
-
 	sdhci_remove_host(host, 0);
 
+	xenon_sdhc_unprepare(host);
+
 	clk_disable_unprepare(pltfm_host->clk);
 
 	sdhci_pltfm_free(pdev);

The default value of LOGIC_TIMING_ADJUST register in eMMC 5.0 PHY is different from that in eMMC 5.1 PHY.
Set the specific value for that register in eMMC 5.0 PHY.

Signed-off-by Hu Ziji <[email protected]>

Reported-by Jisheng Zhang <[email protected]>

Tested-by Jisheng Zhang <[email protected]>

---
 drivers/mmc/host/sdhci-xenon-phy.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

drivers/mmc/host/sdhci-xenon-phy.c +6 -1

index 4bdbcd3..31d08cf 100644
@@ -108,6 +108,7 @@
 
 #define XENON_EMMC_5_0_PHY_LOGIC_TIMING_ADJUST	\
 	(XENON_EMMC_5_0_PHY_REG_BASE + 0x14)
+#define XENON_EMMC_5_0_PHY_LOGIC_TIMING_VALUE	0x5A54
 #define XENON_EMMC_PHY_LOGIC_TIMING_ADJUST	(XENON_EMMC_PHY_REG_BASE + 0x18)
 #define XENON_LOGIC_TIMING_VALUE		0x00AA8977
 

@@ -130,6 +131,8 @@ struct xenon_emmc_phy_regs {
 	u16 logic_timing_adj;
 	/* DLL Update Enable bit */
 	u32 dll_update;
+	/* value in Logic Timing Adjustment register */
+	u32 logic_timing_val;
 };
 
 static const char * const phy_types[] = {

@@ -166,6 +169,7 @@ static struct xenon_emmc_phy_regs xenon_emmc_5_0_phy_regs = {
 	.dll_ctrl	= XENON_EMMC_5_0_PHY_DLL_CONTROL,
 	.logic_timing_adj = XENON_EMMC_5_0_PHY_LOGIC_TIMING_ADJUST,
 	.dll_update	= XENON_DLL_UPDATE_STROBE_5_0,
+	.logic_timing_val = XENON_EMMC_5_0_PHY_LOGIC_TIMING_VALUE,
 };
 
 static struct xenon_emmc_phy_regs xenon_emmc_5_1_phy_regs = {

@@ -176,6 +180,7 @@ static struct xenon_emmc_phy_regs xenon_emmc_5_1_phy_regs = {
 	.dll_ctrl	= XENON_EMMC_PHY_DLL_CONTROL,
 	.logic_timing_adj = XENON_EMMC_PHY_LOGIC_TIMING_ADJUST,
 	.dll_update	= XENON_DLL_UPDATE,
+	.logic_timing_val = XENON_LOGIC_TIMING_VALUE,
 };
 
 /*

@@ -607,7 +612,7 @@ static void xenon_emmc_phy_set(struct sdhci_host *host,
 
 	if (timing == MMC_TIMING_MMC_HS400)
 		/* Hardware team recommend a value for HS400 */
-		sdhci_writel(host, XENON_LOGIC_TIMING_VALUE,
+		sdhci_writel(host, phy_regs->logic_timing_val,
 			     phy_regs->logic_timing_adj);
 	else
 		xenon_emmc_phy_disable_data_strobe(host);

Hi Ulf,

Could you please help review the two fixes of Xenon SDHCI? Patch 1 fixes the remove flow of Xenon SDHCI. Patch 2 fixes a default value in PHY register.

Thank you.

Best regards,
Hu Ziji

Hu Ziji (2):
mmc: sdhci-xenon: Fix the work flow in xenon_remove().
mmc: sdhci-xenon: Fix the default value of LOGIC_TIMING_ADJUST
register in eMMC 5.0 PHY

 drivers/mmc/host/sdhci-xenon-phy.c | 7 ++++++-
 drivers/mmc/host/sdhci-xenon.c     | 4 ++--
 2 files changed, 8 insertions(+), 3 deletions(-)

--
2.7.4