Add a property to set the ARM CPU core count
cover Add a property to set the ARM CPU core count
Add an ARM CPU property which allows us to set the ARM CPU core count.
Alistair Francis (2):
target/arm: Add a cluster size property
hw/arm: Set the core count for Xilinx's ZynqMP
target/arm/cpu.h | 5 +++++ hw/arm/xlnx-zynqmp.c | 2 ++ target/arm/cpu.c | 1 + target/arm/cpu64.c | 11 +++++++++-- 4 files changed, 17 insertions(+), 2 deletions(-)
Signature · 1 line
2.14.1
PATCH 1/2 target/arm: Add a cluster size property
The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register specify the number of cores present and not the number of processors. To report this correctly on machines with multiple CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow the machine to overwrite this value. To do this let's add an optional property.
---
target/arm/cpu.h | 5 +++++ target/arm/cpu.c | 1 + target/arm/cpu64.c | 11 +++++++++-- 3 files changed, 15 insertions(+), 2 deletions(-)
target/arm/cpu.h +5 -0
@@ -745,6 +745,11 @@ struct ARMCPU {/* Uniprocessor system with MP extensions */ bool mp_is_up; +/* Specify the number of cores in this CPU cluster. Used for the L2CTLR +* register. +*/ +int32_t core_count; +/* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant
target/arm/cpu.c +1 -0
@@ -1765,6 +1765,7 @@ static Property arm_cpu_properties[] = {DEFINE_PROP_UINT64 ("mp-affinity" ,ARMCPU , mp_affinity,ARM64_AFFINITY_INVALID ),DEFINE_PROP_INT32 ("node-id" ,ARMCPU , node_id,CPU_UNSET_NUMA_NODE_ID ), +DEFINE_PROP_INT32 ("core-count" ,ARMCPU , core_count,-1 ), DEFINE_PROP_END_OF_LIST() };
target/arm/cpu64.c +9 -2
@@ -42,8 +42,15 @@ static inline void unset_feature(CPUARMState *env, int feature)#ifndef CONFIG_USER_ONLY static uint64_t a57_a53_l2ctlr_read (CPUARMState *env,const ARMCPRegInfo *ri) { -/* Number of processors is in [25:24]; otherwise we RAZ */ -return (smp_cpus -1 ) <<24 ; +ARMCPU *cpu =arm_env_get_cpu (env); + +/* Number of cores is in [25:24]; otherwise we RAZ */ +if (cpu->core_count ==-1 ) { +/* No core_count specified, default to smp_cpus. */ +return (smp_cpus -1 ) <<24 ; + }else { +return (cpu->core_count -1 ) <<24 ; + } }#endif
Signature · 1 line
2.14.1
Re: [Qemu-devel] [PATCH v1 1/2] target/arm: Add a cluster size property
On 2 March 2018 at 17:06, Alistair Francis <[email protected]> wrote:
Subject should say "core count" rather than "cluster size" ?
Quoted 1 line
The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register
"specifies"
Quoted 1 line
specify the number of cores present and not the number of processors. To
"the number of cores in the processor, not the total number of cores in the system".
Quoted 51 lines
report this correctly on machines with multiple CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow the machine to overwrite this value. To do this let's add an optional property.
Signed-off-by Alistair Francis <[email protected]>---
target/arm/cpu.h | 5 +++++ target/arm/cpu.c | 1 + target/arm/cpu64.c | 11 +++++++++-- 3 files changed, 15 insertions(+), 2 deletions(-)target/arm/cpu.h +5
-0@@ -745,6 +745,11 @@ struct ARMCPU {/* Uniprocessor system with MP extensions */ bool mp_is_up; +/* Specify the number of cores in this CPU cluster. Used for the L2CTLR +* register. +*/ +int32_t core_count; +/* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant target/arm/cpu.c +1
-0@@ -1765,6 +1765,7 @@ static Property arm_cpu_properties[] = {DEFINE_PROP_UINT64 ("mp-affinity" ,ARMCPU , mp_affinity,ARM64_AFFINITY_INVALID ),DEFINE_PROP_INT32 ("node-id" ,ARMCPU , node_id,CPU_UNSET_NUMA_NODE_ID ), +DEFINE_PROP_INT32 ("core-count" ,ARMCPU , core_count,-1 ), DEFINE_PROP_END_OF_LIST() };target/arm/cpu64.c +1
-2@@ -42,8 +42,15 @@ static inline void unset_feature(CPUARMState *env, int feature)#ifndef CONFIG_USER_ONLY static uint64_t a57_a53_l2ctlr_read (CPUARMState *env,const ARMCPRegInfo *ri) { -/* Number of processors is in [25:24]; otherwise we RAZ */ -return (smp_cpus -1 ) <<24 ; +ARMCPU *cpu =arm_env_get_cpu (env);
target/arm/cpu64.c static inline void unset_feature(CPUARMState *env, int feature) · line 55
Quoted 10 lines
target/arm/cpu64.c +8
-0+ +/* Number of cores is in [25:24]; otherwise we RAZ */ +if (cpu->core_count ==-1 ) { +/* No core_count specified, default to smp_cpus. */ +return (smp_cpus -1 ) <<24 ; + }else { +return (cpu->core_count -1 ) <<24 ; + } }#endif
I think having arm_cpu_realizefn do
if (cpu->core_count == -1) {
cpu->core_count = smp_cpus;
}would be neater than doing that check when the register is read.
thanks
-- PMM
Re: [Qemu-devel] [PATCH v1 1/2] target/arm: Add a cluster size property
Quoted 3 lines · Peter Maydell
On 2 March 2018 at 17:06, Alistair Francis <[email protected]> wrote:
Subject should say "core count" rather than "cluster size" ?
Yes, that was left over. I'll fix.
Quoted 9 lines
Quoted 2 lines
The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register
"specifies"
Quoted 1 line
specify the number of cores present and not the number of processors. To
"the number of cores in the processor, not the total number of cores in the system".
Fixed these.
Quoted 64 lines
Quoted 52 lines
report this correctly on machines with multiple CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow the machine to overwrite this value. To do this let's add an optional property.
Signed-off-by Alistair Francis <[email protected]>---
target/arm/cpu.h | 5 +++++ target/arm/cpu.c | 1 + target/arm/cpu64.c | 11 +++++++++-- 3 files changed, 15 insertions(+), 2 deletions(-)target/arm/cpu.h +5
-0@@ -745,6 +745,11 @@ struct ARMCPU {/* Uniprocessor system with MP extensions */ bool mp_is_up; +/* Specify the number of cores in this CPU cluster. Used for the L2CTLR +* register. +*/ +int32_t core_count; +/* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant target/arm/cpu.c +1
-0@@ -1765,6 +1765,7 @@ static Property arm_cpu_properties[] = {DEFINE_PROP_UINT64 ("mp-affinity" ,ARMCPU , mp_affinity,ARM64_AFFINITY_INVALID ),DEFINE_PROP_INT32 ("node-id" ,ARMCPU , node_id,CPU_UNSET_NUMA_NODE_ID ), +DEFINE_PROP_INT32 ("core-count" ,ARMCPU , core_count,-1 ), DEFINE_PROP_END_OF_LIST() };target/arm/cpu64.c +1
-2@@ -42,8 +42,15 @@ static inline void unset_feature(CPUARMState *env, int feature)#ifndef CONFIG_USER_ONLY static uint64_t a57_a53_l2ctlr_read (CPUARMState *env,const ARMCPRegInfo *ri) { -/* Number of processors is in [25:24]; otherwise we RAZ */ -return (smp_cpus -1 ) <<24 ; +ARMCPU *cpu =arm_env_get_cpu (env);target/arm/cpu64.c static inline void unset_feature(CPUARMState *env, int feature) · line 55
Quoted 10 lines
target/arm/cpu64.c +8
-0+ +/* Number of cores is in [25:24]; otherwise we RAZ */ +if (cpu->core_count ==-1 ) { +/* No core_count specified, default to smp_cpus. */ +return (smp_cpus -1 ) <<24 ; + }else { +return (cpu->core_count -1 ) <<24 ; + } }#endif I think having
arm_cpu_realizefndo
Quoted 5 lines
if (cpu->core_count == -1) { cpu->core_count = smp_cpus; }would be neater than doing that check when the register is read.
Ok will fix. I'll send a V2 out straight away, as today is my last day and it'd be great if I could get this done.
Alistair
Quoted 3 lines
thanks
-- PMM
Re: [Qemu-devel] [PATCH v1 1/2] target/arm: Add a cluster size property
Quoted 2 lines · Alistair Francis
Ok will fix. I'll send a V2 out straight away, as today is my last day and it'd be great if I could get this done.
Sure -- if there are any further nits in v2 I'll just fix them up when I put it into target-arm.next.
-- PMM
PATCH 2/2 hw/arm: Set the core count for Xilinx's ZynqMP
In reply to Alistair FrancisSet the ARM CPU core count property for the A53's attached to the Xilnx ZynqMP machine.
---
hw/arm/xlnx-zynqmp.c | 2 ++ 1 file changed, 2 insertions(+)
hw/arm/xlnx-zynqmp.c +2 -0
@@ -282,6 +282,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) s->virt, "has_el2", NULL);object_property_set_int (OBJECT (&s->apu_cpu[i]),GIC_BASE_ADDR ,"reset-cbar" , &error_abort); +object_property_set_int (OBJECT (&s->apu_cpu[i]), num_apus, +"core-count" , &error_abort);object_property_set_bool (OBJECT (&s->apu_cpu[i]), true,"realized" , &err);if (err) {
Signature · 1 line
2.14.1
Re: [Qemu-devel] [PATCH v1 2/2] hw/arm: Set the core count for Xilinx's ZynqMP
Quoted 14 lines · Alistair Francis
Set the ARM CPU core count property for the A53's attached to the Xilnx ZynqMP machine.
Signed-off-by Alistair Francis <[email protected]>---
hw/arm/xlnx-zynqmp.c | 2 ++ 1 file changed, 2 insertions(+)hw/arm/xlnx-zynqmp.c +0
-0
hw/arm/xlnx-zynqmp.c static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) · line 289
Quoted 8 lines
hw/arm/xlnx-zynqmp.c +2
-0@@ -282,6 +282,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) s->virt, "has_el2", NULL);object_property_set_int (OBJECT (&s->apu_cpu[i]),GIC_BASE_ADDR ,"reset-cbar" , &error_abort); +object_property_set_int (OBJECT (&s->apu_cpu[i]), num_apus, +"core-count" , &error_abort);object_property_set_bool (OBJECT (&s->apu_cpu[i]), true,"realized" , &err);if (err) {
thanks
-- PMM