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RISC-V: Resolve the issue of loadable module on 64-bit

PATCH Superseded Zong Li 5 participants 31 messages Mar 13, 2018 – Mar 15, 2018

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Zong Li

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#0 lore raw

cover RISC-V: Resolve the issue of loadable module on 64-bit

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds
Signature · 1 line
2.16.1
author
#1 lore raw

PATCH 1/11 RISC-V: Add sections of PLT and GOT for kernel module

The address of external symbols will locate more than 32-bit offset in 64-bit kernel with sv39 or sv48 virtual addressing.

Module loader emits the GOT and PLT entries for data symbols and function symbols respectively.

The PLT entry is a trampoline code for jumping to the 64-bit real address. The GOT entry is just the data symbol address.

---
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/include/asm/module.h     | 102 ++++++++++++++++++++++++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 139 ++++++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.lds        |   7 ++
 6 files changed, 257 insertions(+)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds
arch/riscv/Kconfig +5 -0
index 310b9a5d6737..e2ff7c23dfe0 100644
@@ -135,6 +135,9 @@ choice
 		bool "medium any code model"
 endchoice
 
+config MODULE_SECTIONS
+	bool "Support GOT and PLT sections"
+
 choice
 	prompt "Maximum Physical Memory"
 	default MAXPHYSMEM_2GB if 32BIT
@@ -145,6 +148,8 @@ choice
 		bool "2GiB"
 	config MAXPHYSMEM_128GB
 		depends on 64BIT && CMODEL_MEDANY
+		select MODULE_SECTIONS if MODULES
+		select HAVE_MOD_ARCH_SPECIFIC
 		bool "128GiB"
 endchoice
 
arch/riscv/Makefile +3 -0
index 26892daefa05..d8b4e5c9277f 100644
@@ -56,6 +56,9 @@ endif
 ifeq ($(CONFIG_CMODEL_MEDANY),y)
 	KBUILD_CFLAGS += -mcmodel=medany
 endif
+ifeq ($(CONFIG_MODULE_SECTIONS),y)
+	KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/riscv/kernel/module.lds
+endif
 
 # GCC versions that support the "-mstrict-align" option default to allowing
 # unaligned accesses.  While unaligned accesses are explicitly allowed in the
arch/riscv/include/asm/module.h new file +102 -0

102 lines not on this page · raw message

arch/riscv/kernel/Makefile +1 -0
index 196f62ffc428..d355e3c18278 100644
@@ -34,6 +34,7 @@ CFLAGS_setup.o := -mcmodel=medany
 obj-$(CONFIG_SMP)		+= smpboot.o
 obj-$(CONFIG_SMP)		+= smp.o
 obj-$(CONFIG_MODULES)		+= module.o
+obj-$(CONFIG_MODULE_SECTIONS)	+= module-sections.o
 obj-$(CONFIG_FUNCTION_TRACER)	+= mcount.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)	+= ftrace.o
 
arch/riscv/kernel/module-sections.c new file +139 -0

139 lines not on this page · raw message

arch/riscv/kernel/module.lds new file +7 -0
new file mode 100644
index 000000000000..7ef580e62883
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (C) 2017 Andes Technology Corporation */
+
+SECTIONS {
+	.plt (NOLOAD) : { BYTE(0) }
+	.got (NOLOAD) : { BYTE(0) }
+}
Signature · 1 line
2.16.1
author
#3 lore raw

PATCH 2/11 RISC-V: Add section of GOT.PLT for kernel module

In reply to Zong Li

Separate the function symbol address from .plt to .got.plt section.

The original plt entry has trampoline code with symbol address, there is a 32-bit padding bwtween jar instruction and symbol address.

Extract the symbol address to .got.plt to reduce the module size.

---
 arch/riscv/include/asm/module.h     | 40 +++++++++++++++++++++++--------------
 arch/riscv/kernel/module-sections.c | 21 +++++++++++++++++--
 arch/riscv/kernel/module.lds        |  1 +
 3 files changed, 45 insertions(+), 17 deletions(-)
arch/riscv/include/asm/module.h +25 -15
index bcc48d113deb..016e6a618e83 100644
@@ -18,6 +18,7 @@ struct mod_section {
 struct mod_arch_specific {
 	struct mod_section got;
 	struct mod_section plt;
+	struct mod_section got_plt;
 };
 #endif
 
@@ -49,13 +50,10 @@ struct plt_entry {
 	/*
 	 * Trampoline code to real target address. The return address
 	 * should be the original (pc+4) before entring plt entry.
-	 * For 8 byte alignment of symbol_addr,
-	 * don't pack structure to remove the padding.
 	 */
 	u32 insn_auipc;		/* auipc t0, 0x0                       */
 	u32 insn_ld;		/* ld    t1, 0x10(t0)                  */
 	u32 insn_jr;		/* jr    t1                            */
-	u64 symbol_addr;	/* the real jump target address        */
 };
 
 #define OPC_AUIPC  0x0017
@@ -63,9 +61,8 @@ struct plt_entry {
 #define OPC_JALR   0x0067
 #define REG_T0     0x5
 #define REG_T1     0x6
-#define IMM_OFFSET 0x10
 
-static inline struct plt_entry emit_plt_entry(u64 val)
+static inline struct plt_entry emit_plt_entry(u64 val, u64 plt, u64 got_plt)
 {
 	/*
 	 * U-Type encoding:
@@ -79,24 +76,37 @@ static inline struct plt_entry emit_plt_entry(u64 val)
 	 * +------------+------------+--------+----------+----------+
 	 *
 	 */
+	u64 offset = got_plt - plt;
+	u32 hi20 = (offset + 0x800) & 0xfffff000;
+	u32 lo12 = (offset - hi20);
 	return (struct plt_entry) {
-		OPC_AUIPC | (REG_T0 << 7),
-		OPC_LD | (IMM_OFFSET << 20) | (REG_T0 << 15) | (REG_T1 << 7),
-		OPC_JALR | (REG_T1 << 15),
-		val
+		OPC_AUIPC | (REG_T0 << 7) | hi20,
+		OPC_LD | (lo12 << 20) | (REG_T0 << 15) | (REG_T1 << 7),
+		OPC_JALR | (REG_T1 << 15)
 	};
 }
 
-static inline struct plt_entry *get_plt_entry(u64 val,
-					      const struct mod_section *sec)
+static inline int get_got_plt_idx(u64 val, const struct mod_section *sec)
 {
-	struct plt_entry *plt = (struct plt_entry *)sec->shdr->sh_addr;
+	struct got_entry *got_plt = (struct got_entry *)sec->shdr->sh_addr;
 	int i;
 	for (i = 0; i < sec->num_entries; i++) {
-		if (plt[i].symbol_addr == val)
-			return &plt[i];
+		if (got_plt[i].symbol_addr == val)
+			return i;
 	}
-	return NULL;
+	return -1;
+}
+
+static inline struct plt_entry *get_plt_entry(u64 val,
+				      const struct mod_section *sec_plt,
+				      const struct mod_section *sec_got_plt)
+{
+	struct plt_entry *plt = (struct plt_entry *)sec_plt->shdr->sh_addr;
+	int got_plt_idx = get_got_plt_idx(val, sec_got_plt);
+	if (got_plt_idx >= 0)
+		return plt + got_plt_idx;
+	else
+		return NULL;
 }
 
 #endif /* _ASM_RISCV_MODULE_H */
arch/riscv/kernel/module-sections.c +19 -2
index 94ba1551eac3..bbbd26e19bfd 100644
@@ -30,18 +30,23 @@ u64 module_emit_got_entry(struct module *mod, u64 val)
 
 u64 module_emit_plt_entry(struct module *mod, u64 val)
 {
+	struct mod_section *got_plt_sec = &mod->arch.got_plt;
+	struct got_entry *got_plt;
 	struct mod_section *plt_sec = &mod->arch.plt;
-	struct plt_entry *plt = get_plt_entry(val, plt_sec);
+	struct plt_entry *plt = get_plt_entry(val, plt_sec, got_plt_sec);
 	int i = plt_sec->num_entries;
 
 	if (plt)
 		return (u64)plt;
 
 	/* There is no duplicate entry, create a new one */
+	got_plt = (struct got_entry *)got_plt_sec->shdr->sh_addr;
+	got_plt[i] = emit_got_entry(val);
 	plt = (struct plt_entry *)plt_sec->shdr->sh_addr;
-	plt[i] = emit_plt_entry(val);
+	plt[i] = emit_plt_entry(val, (u64)&plt[i], (u64)&got_plt[i]);
 
 	plt_sec->num_entries++;
+	got_plt_sec->num_entries++;
 	BUG_ON(plt_sec->num_entries > plt_sec->max_entries);
 
 	return (u64)&plt[i];
@@ -94,6 +99,8 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
 			mod->arch.plt.shdr = sechdrs + i;
 		else if (!strcmp(secstrings + sechdrs[i].sh_name, ".got"))
 			mod->arch.got.shdr = sechdrs + i;
+		else if (!strcmp(secstrings + sechdrs[i].sh_name, ".got.plt"))
+			mod->arch.got_plt.shdr = sechdrs + i;
 	}
 
 	if (!mod->arch.plt.shdr) {
@@ -104,6 +111,10 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
 		pr_err("%s: module GOT section(s) missing\n", mod->name);
 		return -ENOEXEC;
 	}
+	if (!mod->arch.got_plt.shdr) {
+		pr_err("%s: module GOT.PLT section(s) missing\n", mod->name);
+		return -ENOEXEC;
+	}
 
 	/* Calculate the maxinum number of entries */
 	for (i = 0; i < ehdr->e_shnum; i++) {
@@ -135,5 +146,11 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
 	mod->arch.got.num_entries = 0;
 	mod->arch.got.max_entries = num_gots;
 
+	mod->arch.got_plt.shdr->sh_type = SHT_NOBITS;
+	mod->arch.got_plt.shdr->sh_flags = SHF_ALLOC;
+	mod->arch.got_plt.shdr->sh_addralign = L1_CACHE_BYTES;
+	mod->arch.got_plt.shdr->sh_size = (num_plts + 1) * sizeof(struct got_entry);
+	mod->arch.got_plt.num_entries = 0;
+	mod->arch.got_plt.max_entries = num_plts;
 	return 0;
 }
arch/riscv/kernel/module.lds +1 -0
index 7ef580e62883..295ecfb341a2 100644
@@ -4,4 +4,5 @@
 SECTIONS {
 	.plt (NOLOAD) : { BYTE(0) }
 	.got (NOLOAD) : { BYTE(0) }
+	.got.plt (NOLOAD) : { BYTE(0) }
 }
Signature · 1 line
2.16.1
author
#6 lore raw

PATCH 3/11 RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module

In reply to Zong Li

For CALL_PLT, emit the plt entry only when offset is more than 32-bit.

For PCREL_LO12, it uses the location of corresponding HI20 to get the address of external symbol. It should check the HI20 type is the PCREL_HI20 or GOT_HI20, because sometime the location will have two or more relocation types.
For example:
0: 00000797 auipc a5,0x0
0: R_RISCV_ALIGN *ABS*
0: R_RISCV_GOT_HI20 SYMBOL
4: 0007b783 ld a5,0(a5) # 0 <SYMBOL>
4: R_RISCV_PCREL_LO12_I .L0
4: R_RISCV_RELAX *ABS*

---
 arch/riscv/kernel/module.c | 61 ++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 10 deletions(-)
arch/riscv/kernel/module.c +51 -10
index e0f05034fc21..242d3a14c210 100644
@@ -92,6 +92,28 @@ static int apply_r_riscv_pcrel_lo12_s_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_got_hi20_rela(struct module *me, u32 *location,
+				       Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	s32 hi20;
+
+	/* Always emit the got entry */
+	if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
+		offset = module_emit_got_entry(me, v);
+		offset = (void *)offset - (void *)location;
+	} else {
+		pr_err(
+		  "%s: can not generate the GOT entry for symbol = %016llx from PC = %p\n",
+		  me->name, v, location);
+		return -EINVAL;
+	}
+
+	hi20 = (offset + 0x800) & 0xfffff000;
+	*location = (*location & 0xfff) | hi20;
+	return 0;
+}
+
 static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 				       Elf_Addr v)
 {
@@ -100,10 +122,16 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 	u32 hi20, lo12;
 
 	if (offset != fill_v) {
-		pr_err(
-		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-		  me->name, v, location);
-		return -EINVAL;
+		/* Only emit the plt entry if offset over 32-bit range */
+		if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
+			offset = module_emit_plt_entry(me, v);
+			offset = (void *)offset - (void *)location;
+		} else {
+			pr_err(
+			  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
+			  me->name, v, location);
+			return -EINVAL;
+		}
 	}
 
 	hi20 = (offset + 0x800) & 0xfffff000;
@@ -127,6 +155,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
+	[R_RISCV_GOT_HI20]		= apply_r_riscv_got_hi20_rela,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 };
@@ -184,25 +213,37 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
 				u64 hi20_loc =
 					sechdrs[sechdrs[relsec].sh_info].sh_addr
 					+ rel[j].r_offset;
-				/* Find the corresponding HI20 PC-relative relocation entry */
-				if (hi20_loc == sym->st_value) {
+				u32 hi20_type = ELF_RISCV_R_TYPE(rel[j].r_info);
+
+				/* Find the corresponding HI20 relocation entry */
+				if (hi20_loc == sym->st_value
+				    && (hi20_type == R_RISCV_PCREL_HI20
+					|| hi20_type == R_RISCV_GOT_HI20)) {
+					s32 hi20, lo12;
 					Elf_Sym *hi20_sym =
 						(Elf_Sym *)sechdrs[symindex].sh_addr
 						+ ELF_RISCV_R_SYM(rel[j].r_info);
 					u64 hi20_sym_val =
 						hi20_sym->st_value
 						+ rel[j].r_addend;
+
 					/* Calculate lo12 */
-					s64 offset = hi20_sym_val - hi20_loc;
-					s32 hi20 = (offset + 0x800) & 0xfffff000;
-					s32 lo12 = offset - hi20;
+					u64 offset = hi20_sym_val - hi20_loc;
+					if (hi20_type == R_RISCV_GOT_HI20) {
+						offset = module_emit_got_entry(
+							 me, hi20_sym_val);
+						offset = offset - hi20_loc;
+					}
+					hi20 = (offset + 0x800) & 0xfffff000;
+					lo12 = offset - hi20;
 					v = lo12;
+
 					break;
 				}
 			}
 			if (j == sechdrs[relsec].sh_size / sizeof(*rel)) {
 				pr_err(
-				  "%s: Can not find HI20 PC-relative relocation information\n",
+				  "%s: Can not find HI20 relocation information\n",
 				  me->name);
 				return -EINVAL;
 			}
Signature · 1 line
2.16.1
author
#7 lore raw

PATCH 4/11 RISC-V: Support CALL relocation type in kernel module

In reply to Zong Li
---
 arch/riscv/kernel/module.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/riscv/kernel/module.c +22 -0
index 242d3a14c210..7e85e5840b4d 100644
@@ -141,6 +141,27 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_call_rela(struct module *me, u32 *location,
+				   Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	s32 fill_v = offset;
+	u32 hi20, lo12;
+
+	if (offset != fill_v) {
+		pr_err(
+		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
+		  me->name, v, location);
+		return -EINVAL;
+	}
+
+	hi20 = (offset + 0x800) & 0xfffff000;
+	lo12 = (offset - hi20) & 0xfff;
+	*location = (*location & 0xfff) | hi20;
+	*(location + 1) = (*(location + 1) & 0xfffff) | (lo12 << 20);
+	return 0;
+}
+
 static int apply_r_riscv_relax_rela(struct module *me, u32 *location,
 				    Elf_Addr v)
 {
@@ -157,6 +178,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
 	[R_RISCV_GOT_HI20]		= apply_r_riscv_got_hi20_rela,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
+	[R_RISCV_CALL]			= apply_r_riscv_call_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 };
 
Signature · 1 line
2.16.1
author
#8 lore raw

PATCH 5/11 RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module

In reply to Zong Li

HI20 and LO12_I/LO12_S relocate the absolute address, the range of offset must in 32-bit.

---
 arch/riscv/kernel/module.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
arch/riscv/kernel/module.c +42 -0
index 7e85e5840b4d..654fe7dcd38d 100644
@@ -92,6 +92,45 @@ static int apply_r_riscv_pcrel_lo12_s_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_hi20_rela(struct module *me, u32 *location,
+				   Elf_Addr v)
+{
+	s32 hi20;
+
+	if (IS_ENABLED(CMODEL_MEDLOW)) {
+		pr_err(
+		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
+		  me->name, v, location);
+		return -EINVAL;
+	}
+
+	hi20 = ((s32)v + 0x800) & 0xfffff000;
+	*location = (*location & 0xfff) | hi20;
+	return 0;
+}
+
+static int apply_r_riscv_lo12_i_rela(struct module *me, u32 *location,
+				     Elf_Addr v)
+{
+	/* Skip medlow checking because of filtering by HI20 already */
+	s32 hi20 = ((s32)v + 0x800) & 0xfffff000;
+	s32 lo12 = ((s32)v - hi20);
+	*location = (*location & 0xfffff) | ((lo12 & 0xfff) << 20);
+	return 0;
+}
+
+static int apply_r_riscv_lo12_s_rela(struct module *me, u32 *location,
+				     Elf_Addr v)
+{
+	/* Skip medlow checking because of filtering by HI20 already */
+	s32 hi20 = ((s32)v + 0x800) & 0xfffff000;
+	s32 lo12 = ((s32)v - hi20);
+	u32 imm11_5 = (lo12 & 0xfe0) << (31 - 11);
+	u32 imm4_0 = (lo12 & 0x1f) << (11 - 4);
+	*location = (*location & 0x1fff07f) | imm11_5 | imm4_0;
+	return 0;
+}
+
 static int apply_r_riscv_got_hi20_rela(struct module *me, u32 *location,
 				       Elf_Addr v)
 {
@@ -176,6 +215,9 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
+	[R_RISCV_HI20]			= apply_r_riscv_hi20_rela,
+	[R_RISCV_LO12_I]		= apply_r_riscv_lo12_i_rela,
+	[R_RISCV_LO12_S]		= apply_r_riscv_lo12_s_rela,
 	[R_RISCV_GOT_HI20]		= apply_r_riscv_got_hi20_rela,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
 	[R_RISCV_CALL]			= apply_r_riscv_call_rela,
Signature · 1 line
2.16.1
author
#9 lore raw

PATCH 6/11 RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq

In reply to Zong Li
---
 arch/riscv/kernel/module.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
arch/riscv/kernel/module.c +35 -0
index 654fe7dcd38d..e23c051dfc62 100644
@@ -49,6 +49,39 @@ static int apply_r_riscv_jal_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_rcv_branch_rela(struct module *me, u32 *location,
+					 Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	u16 imm8 = (offset & 0x100) << (12 - 8);
+	u16 imm7_6 = (offset & 0xc0) >> (6 - 5);
+	u16 imm5 = (offset & 0x20) >> (5 - 2);
+	u16 imm4_3 = (offset & 0x18) << (12 - 5);
+	u16 imm2_1 = (offset & 0x6) << (12 - 10);
+
+	*(u16 *)location = (*(u16 *)location & 0xe383) |
+		    imm8 | imm7_6 | imm5 | imm4_3 | imm2_1;
+	return 0;
+}
+
+static int apply_r_riscv_rvc_jump_rela(struct module *me, u32 *location,
+				       Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	u16 imm11 = (offset & 0x800) << (12 - 11);
+	u16 imm10 = (offset & 0x400) >> (10 - 8);
+	u16 imm9_8 = (offset & 0x300) << (12 - 11);
+	u16 imm7 = (offset & 0x80) >> (7 - 6);
+	u16 imm6 = (offset & 0x40) << (12 - 11);
+	u16 imm5 = (offset & 0x20) >> (5 - 2);
+	u16 imm4 = (offset & 0x10) << (12 - 5);
+	u16 imm3_1 = (offset & 0xe) << (12 - 10);
+
+	*(u16 *)location = (*(u16 *)location & 0xe003) |
+		    imm11 | imm10 | imm9_8 | imm7 | imm6 | imm5 | imm4 | imm3_1;
+	return 0;
+}
+
 static int apply_r_riscv_pcrel_hi20_rela(struct module *me, u32 *location,
 					 Elf_Addr v)
 {
@@ -212,6 +245,8 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_64]			= apply_r_riscv_64_rela,
 	[R_RISCV_BRANCH]		= apply_r_riscv_branch_rela,
 	[R_RISCV_JAL]			= apply_r_riscv_jal_rela,
+	[R_RISCV_RVC_BRANCH]		= apply_r_riscv_rcv_branch_rela,
+	[R_RISCV_RVC_JUMP]		= apply_r_riscv_rvc_jump_rela,
 	[R_RISCV_PCREL_HI20]		= apply_r_riscv_pcrel_hi20_rela,
 	[R_RISCV_PCREL_LO12_I]		= apply_r_riscv_pcrel_lo12_i_rela,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
Signature · 1 line
2.16.1
author
#10 lore raw

PATCH 7/11 RISC-V: Support ALIGN relocation type in kernel module

In reply to Zong Li

Just ignore align type. The nop instructions cannot be removed in kernel module. Kernel modules is not doing relax.

---
 arch/riscv/kernel/module.c | 7 +++++++
 1 file changed, 7 insertions(+)
arch/riscv/kernel/module.c +7 -0
index e23c051dfc62..351bf2a518ee 100644
@@ -240,6 +240,12 @@ static int apply_r_riscv_relax_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_align_rela(struct module *me, u32 *location,
+				    Elf_Addr v)
+{
+	return 0;
+}
+
 static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 				Elf_Addr v) = {
 	[R_RISCV_64]			= apply_r_riscv_64_rela,
@@ -257,6 +263,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
 	[R_RISCV_CALL]			= apply_r_riscv_call_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
+	[R_RISCV_ALIGN]			= apply_r_riscv_align_rela,
 };
 
 int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
Signature · 1 line
2.16.1
author
#11 lore raw

PATCH 8/11 RISC-V: Support ADD32 relocation type in kernel module

In reply to Zong Li
---
 arch/riscv/kernel/module.c | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/riscv/kernel/module.c +8 -0
index 351bf2a518ee..2d14dff22861 100644
@@ -246,6 +246,13 @@ static int apply_r_riscv_align_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_add32_rela(struct module *me, u32 *location,
+				    Elf_Addr v)
+{
+	*(u32 *)location += (*(u32 *)v);
+	return 0;
+}
+
 static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 				Elf_Addr v) = {
 	[R_RISCV_64]			= apply_r_riscv_64_rela,
@@ -264,6 +271,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_CALL]			= apply_r_riscv_call_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 	[R_RISCV_ALIGN]			= apply_r_riscv_align_rela,
+	[R_RISCV_ADD32]			= apply_r_riscv_add32_rela,
 };
 
 int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
Signature · 1 line
2.16.1
author
#12 lore raw

PATCH 9/11 RISC-V: Support SUB32 relocation type in kernel module

In reply to Zong Li
---
 arch/riscv/kernel/module.c | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/riscv/kernel/module.c +8 -0
index 2d14dff22861..4228270efe93 100644
@@ -253,6 +253,13 @@ static int apply_r_riscv_add32_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_sub32_rela(struct module *me, u32 *location,
+				    Elf_Addr v)
+{
+	*(u32 *)location -= (*(u32 *)v);
+	return 0;
+}
+
 static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 				Elf_Addr v) = {
 	[R_RISCV_64]			= apply_r_riscv_64_rela,
@@ -272,6 +279,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 	[R_RISCV_ALIGN]			= apply_r_riscv_align_rela,
 	[R_RISCV_ADD32]			= apply_r_riscv_add32_rela,
+	[R_RISCV_SUB32]			= apply_r_riscv_sub32_rela,
 };
 
 int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
Signature · 1 line
2.16.1
author
#13 lore raw

PATCH 10/11 RISC-V: Enable module support in defconfig

In reply to Zong Li
---
 arch/riscv/configs/defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/riscv/configs/defconfig +2 -0
index 92ff23586c11..07326466871b 100644
@@ -74,3 +74,5 @@ CONFIG_NFS_V4_2=y
 CONFIG_ROOT_NFS=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
Signature · 1 line
2.16.1
author
#14 lore raw

PATCH 11/11 RISC-V: Add definition of relocation types

In reply to Zong Li
---
 arch/riscv/include/uapi/asm/elf.h | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/riscv/include/uapi/asm/elf.h +24 -0
index a510edfa8226..5111c7c35e8b 100644
@@ -79,5 +79,29 @@ typedef union __riscv_fp_state elf_fpregset_t;
 #define R_RISCV_TPREL_I		49
 #define R_RISCV_TPREL_S		50
 #define R_RISCV_RELAX		51
+#define R_RISCV_SUB6		52
+#define R_RISCV_SET6		53
+#define R_RISCV_SET8		54
+#define R_RISCV_SET16		55
+#define R_RISCV_SET32		56
+#define R_RISCV_32_PCREL	57
+
+/* NDS V5*/
+#define R_RISCV_ALIGN_BTB		240
+#define R_RISCV_10_PCREL		241
+#define R_RISCV_DATA			242
+#define R_RISCV_LALO_HI20		243
+#define R_RISCV_LALO_LO12_I		244
+#define R_RISCV_RELAX_ENTRY		245
+#define R_RISCV_LGP18S0			246
+#define R_RISCV_LGP17S1			247
+#define R_RISCV_LGP17S2			248
+#define R_RISCV_LGP17S3			249
+#define R_RISCV_SGP18S0			250
+#define R_RISCV_SGP17S1			251
+#define R_RISCV_SGP17S2			252
+#define R_RISCV_SGP17S3			253
+#define R_RISCV_RELAX_REGION_BEGIN	254
+#define R_RISCV_RELAX_REGION_END	255
 
 #endif /* _UAPI_ASM_ELF_H */
Signature · 1 line
2.16.1
#15 lore raw
In reply to Zong Li

2018-03-13 16:35 GMT+08:00 Zong Li <[email protected]>:

Quoted 55 lines

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds
Quoted 3 lines

--
2.16.1

This is the list of testing modules:

# lsmod
btrfs 7876158 0 - Live 0xffffffd00745d000
ramoops 90806 0 - Live 0xffffffd0024b8000
lzo 10554 0 - Live 0xffffffd002050000
zstd_decompress 567575 1 btrfs, Live 0xffffffd00238b000
zstd_compress 1543837 1 btrfs, Live 0xffffffd002211000
zram 101300 0 - Live 0xffffffd0021b8000
xxhash 62254 2 zstd_decompress,zstd_compress, Live 0xffffffd0020cf000
xor 33246 1 btrfs, Live 0xffffffd002042000
xfs 4395343 0 - Live 0xffffffd00399e000
tun 252041 0 - Live 0xffffffd0038e0000
test_user_copy 5265 0 - Live 0xffffffd003783000
test_static_keys 19606 0 - Live 0xffffffd003717000
test_static_key_base 7374 1 test_static_keys, Live 0xffffffd0036dc000
test_printf 7804 0 [permanent], Live 0xffffffd00369c000
test_module 1557 0 - Live 0xffffffd003646000
test_kmod 49100 0 - Live 0xffffffd0035f2000
test_bpf 1599301 0 - Live 0xffffffd003000000
test_bitmap 4403 0 - Live 0xffffffd002dd8000
reed_solomon 38866 1 ramoops, Live 0xffffffd002d86000
raid6_pq 161872 1 btrfs, Live 0xffffffd002b9e000
netdevsim 65401 0 - Live 0xffffffd002910000
lzo_decompress 9580 2 btrfs,lzo, Live 0xffffffd002813000
lzo_compress 21527 2 btrfs,lzo, Live 0xffffffd0027d9000
libcrc32c 2730 1 xfs, Live 0xffffffd00273c000
fuse 676371 0 - Live 0xffffffd0024d0000
exportfs 24850 1 xfs, Live 0xffffffd0020c7000
echainiv 11953 0 - Live 0xffffffd00205a000
#16 lore raw
In reply to Zong Li
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs. That's kind of complicated, though, so we can start with something simpler like this.

#30 lore raw
In reply to Zong Li

Hello!

You may be interested in my recent patchset [1], which has known issues but addresses the same problems yours does. It differs in the approach taken here in that, rather than supporting GOT/PLT handling which we can't really take advantage of anyway, we simply build non-PIC modules instead [2]. Additionally, I see your patchset has the same concern mine does, which is that ignoring ALIGN relaxations is not actually an option [3]. The approach I plan to take is outlined by Palmer at [4].

As of now I hope to get back to my patchset this weekend, but if you're close to a complete implementation by then maybe I can avoid duplicating the work ;)

Thanks,
Shea

[1]: http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
[2]: http://lists.infradead.org/pipermail/linux-riscv/2018-February/000080.html
[3]: http://lists.infradead.org/pipermail/linux-riscv/2018-February/000105.html
[4]: http://lists.infradead.org/pipermail/linux-riscv/2018-March/000147.html

Quoted 40 lines · Zong Li

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 22 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds
Signature · 7 lines
2.16.1


_______________________________________________
linux-riscv mailing list
linux-riscv at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

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#17 lore raw
In reply to Palmer Dabbelt

Hi Palmer,

Quoted 58 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

Quoted 6 lines
    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

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#18 lore raw

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 64 lines

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 11 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Hi,

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections, we can put the module anywhere, even we support the KASLR in the kernel.

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the performance, I agree the point that adding the mno-relax option and checking the alignment in ALIGN type in module loader.

Quoted 2 lines
Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

So what is the suggestion for that.

Thanks a lot.

#19 lore raw
Quoted 77 lines · zongbox at gmail.com

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 64 lines

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 11 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Quoted 8 lines

Hi,

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections, we can put the module anywhere, even we support the KASLR in the kernel.

Sorry, I guess I meant PIC objects not shared objects (I keep forgetting about PIE). We'll probably eventually add large code model targets, but they might end up just being functionally equilivant to PIE with multi-GOT and multi-PLT so it might not matter.

Either way, this is the sanest way to do it for now.

Quoted 5 lines

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the performance, I agree the point that adding the mno-relax option and checking the alignment in ALIGN type in module loader.

Sounds good. I just merged the mno-relax stuff, it'll show up when I get around to generating a 7.3.0 backport branch. For now I think you should just fail on R_RISCV_ALIGN and attempt to pass -mno-relax to the compiler (via something like "$(call cc-option,-mno-relax)", like we do for "-mstrict-align"). I don't think it's worth handling R_RISCV_ALIGN in the kernel, as that's essentially the same as full relaxation support.

Quoted 4 lines
Quoted 2 lines
Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

So what is the suggestion for that.

Well, I'm not really sure -- essentially the idea of proper multi-GOT and multi-PLT support would be to merge the GOTs and PLTs of modules together when they're within range of each other. We haven't even figured this out in userspace yet, so it's probably not worth attempting for kernel modules for a bit.

If I understand your code correctly, you're currently generating one GOT and one PLT per loaded module. If that's the case, then this is correct, it's just possible to save some memory by merging these tables. It's probably not worth the complexity for kernel modules for a while.

#25 lore raw
In reply to Shea Levy
Quoted 64 lines · shea at shealevy.com

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 8 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

We don't currently have any position-dependent RISC-V code models larger than "medany", in which all code and data must live within a single 32-bit addressable range. The PLT and GOT sort of provide an out here, so the code only needs to get to the table (which can then get anywhere via an indirection layer).

This is relevant for Linux modules because it lets us load modules anywhere in the address space. It's also a bit of a headache, as it either requires a GOT+PLT per module (which is big) or merging tables (which is hard).

#20 lore raw
In reply to Palmer Dabbelt

2018-03-14 11:07 GMT+08:00 Palmer Dabbelt <[email protected]>:

Quoted 110 lines · zongbox at gmail.com
Quoted 92 lines

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 80 lines

Hi Palmer,

Quoted 66 lines · Palmer Dabbelt
Quoted 41 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 15 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156
++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175
++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same
R_RISCV_ALIGN problem as the other one

http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html

Quoted 7 lines

It looks like this one uses shared libraries for modules instead of static
objects. I think using shared objects is the right thing to do, as it'll allow
us to place modules anywhere in the address space by having multiple GOTs and
PLTs.

Quoted 6 lines

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Hi,

Quoted 7 lines

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections,
we can put the module anywhere, even we support the KASLR in the kernel.

Sorry, I guess I meant PIC objects not shared objects (I keep forgetting about
PIE). We'll probably eventually add large code model targets, but they might
end up just being functionally equilivant to PIE with multi-GOT and multi-PLT
so it might not matter.

Quoted 1 line

Either way, this is the sanest way to do it for now.

Actually, I try to use the large code model and without PIC before. (The compiler with mcmodel=large obtain from my colleague development) On this compiler version, the -mcmodel=large uses the constant pool mechanism to
puts the addresses of data symbols at the function tail. It can resolve the reference about out of range of data symbol, but this code generation not apply to function call. For the compiler code generation and no linker to do relax reason, kernel module still needs the PLT section to jump to far target. On the other hand, the ARM64 mailing list has the patches to remove the large code model for cache performance.

https://marc.info/?l=linux-arm-kernel&m=151860828416766

so maybe we can use the medany + fPIC for now.

Quoted 9 lines
Quoted 7 lines

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the
performance, I agree the point that adding the mno-relax option and checking
the alignment in ALIGN type in module loader.

Quoted 7 lines

Sounds good. I just merged the mno-relax stuff, it'll show up when I get around to generating a 7.3.0 backport branch. For now I think you should just
fail on R_RISCV_ALIGN and attempt to pass -mno-relax to the compiler (via something like "$(call cc-option,-mno-relax)", like we do for "-mstrict-align"). I don't think it's worth handling R_RISCV_ALIGN in the kernel, as that's essentially the same as full relaxation support.

OK. I will send the v2 patches with the modification as you mention about R_RISCV_ALIGN type?

Quoted 6 lines

If I understand your code correctly, you're currently generating one GOT and one PLT per loaded module. If that's the case, then this is correct, it's just
possible to save some memory by merging these tables. It's probably not worth
the complexity for kernel modules for a while.

Yes, there are one GOT and one PLT per loaded module.
In the [PATCH 02/11], I generate the third section .got.plt for saving more memory of
each PLT entry.

Thanks a lot.

#23 lore raw
In reply to Palmer Dabbelt
Quoted 100 lines · Palmer Dabbelt
Quoted 77 lines · zongbox at gmail.com

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 64 lines

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 11 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Quoted 8 lines

Hi,

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections, we can put the module anywhere, even we support the KASLR in the kernel.

Sorry, I guess I meant PIC objects not shared objects (I keep forgetting about PIE). We'll probably eventually add large code model targets, but they might end up just being functionally equilivant to PIE with multi-GOT and multi-PLT so it might not matter.

Either way, this is the sanest way to do it for now.

Quoted 5 lines

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the performance, I agree the point that adding the mno-relax option and checking the alignment in ALIGN type in module loader.

Quoted 7 lines

Sounds good. I just merged the mno-relax stuff, it'll show up when I get around to generating a 7.3.0 backport branch. For now I think you should just fail on R_RISCV_ALIGN and attempt to pass -mno-relax to the compiler (via something like "$(call cc-option,-mno-relax)", like we do for "-mstrict-align"). I don't think it's worth handling R_RISCV_ALIGN in the kernel, as that's essentially the same as full relaxation support.

Should we unconditionally fail on R_RISCV_ALIGN or only if the code isn't already aligned?

Quoted 12 lines
Quoted 5 lines
Quoted 3 lines
Quoted 3 lines

That's kind of complicated, though, so we can start with something simpler like this.

So what is the suggestion for that.

Well, I'm not really sure -- essentially the idea of proper multi-GOT and multi-PLT support would be to merge the GOTs and PLTs of modules together when they're within range of each other. We haven't even figured this out in userspace yet, so it's probably not worth attempting for kernel modules for a bit.

Quoted 4 lines

If I understand your code correctly, you're currently generating one GOT and one PLT per loaded module. If that's the case, then this is correct, it's just possible to save some memory by merging these tables. It's probably not worth the complexity for kernel modules for a while.

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#21 lore raw
In reply to Zong Li
Quoted 145 lines · Zong Li

2018-03-14 11:07 GMT+08:00 Palmer Dabbelt <[email protected]>:

Quoted 110 lines · zongbox at gmail.com
Quoted 92 lines

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 80 lines

Hi Palmer,

Quoted 66 lines · Palmer Dabbelt
Quoted 41 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 15 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156
++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175
++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same
R_RISCV_ALIGN problem as the other one

http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html

Quoted 7 lines

It looks like this one uses shared libraries for modules instead of static
objects. I think using shared objects is the right thing to do, as it'll allow
us to place modules anywhere in the address space by having multiple GOTs and
PLTs.

Quoted 6 lines

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Hi,

Quoted 7 lines

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections,
we can put the module anywhere, even we support the KASLR in the kernel.

Sorry, I guess I meant PIC objects not shared objects (I keep forgetting about
PIE). We'll probably eventually add large code model targets, but they might
end up just being functionally equilivant to PIE with multi-GOT and multi-PLT
so it might not matter.

Quoted 1 line

Either way, this is the sanest way to do it for now.

Actually, I try to use the large code model and without PIC before. (The compiler with mcmodel=large obtain from my colleague development) On this compiler version, the -mcmodel=large uses the constant pool mechanism to
puts the addresses of data symbols at the function tail. It can resolve the reference about out of range of data symbol, but this code generation not apply to function call. For the compiler code generation and no linker to do relax reason, kernel module still needs the PLT section to jump to far target. On the other hand, the ARM64 mailing list has the patches to remove the large code model for cache performance.

https://marc.info/?l=linux-arm-kernel&m=151860828416766

so maybe we can use the medany + fPIC for now.

Quoted 9 lines
Quoted 7 lines

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the
performance, I agree the point that adding the mno-relax option and checking
the alignment in ALIGN type in module loader.

Quoted 7 lines

Sounds good. I just merged the mno-relax stuff, it'll show up when I get around to generating a 7.3.0 backport branch. For now I think you should just
fail on R_RISCV_ALIGN and attempt to pass -mno-relax to the compiler (via something like "$(call cc-option,-mno-relax)", like we do for "-mstrict-align"). I don't think it's worth handling R_RISCV_ALIGN in the kernel, as that's essentially the same as full relaxation support.

Quoted 2 lines

OK. I will send the v2 patches with the modification as you mention about R_RISCV_ALIGN type?

Just to avoid work duplication, do you think you'll get to this before this weekend? I was planning on bringing my patches up-to-date then, but since we're going the PIC route I can base my no-relax/ALIGN support on top of your series instead.

Quoted 8 lines
Quoted 7 lines

If I understand your code correctly, you're currently generating one GOT and one PLT per loaded module. If that's the case, then this is correct, it's just
possible to save some memory by merging these tables. It's probably not worth
the complexity for kernel modules for a while.

Quoted 6 lines

Yes, there are one GOT and one PLT per loaded module.
In the [PATCH 02/11], I generate the third section .got.plt for saving more memory of
each PLT entry.

Thanks a lot.

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#26 lore raw
In reply to Palmer Dabbelt
Quoted 80 lines · Palmer Dabbelt
Quoted 64 lines · shea at shealevy.com

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 8 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

We don't currently have any position-dependent RISC-V code models larger than "medany", in which all code and data must live within a single 32-bit addressable range. The PLT and GOT sort of provide an out here, so the code only needs to get to the table (which can then get anywhere via an indirection layer).

Quoted 3 lines

This is relevant for Linux modules because it lets us load modules anywhere in the address space. It's also a bit of a headache, as it either requires a GOT+PLT per module (which is big) or merging tables (which is hard).

I see, thanks! We only get this benefit if we actually do the relevanat indirection in the table, right? And if we merge tables we still have to have all modules within 32 bits of the common table? Is this how some future "medlarge" code model will work, or is it more of a convenient way to reuse existing techniques until other code models are worked out?

Thanks,
Shea
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#22 lore raw
In reply to Shea Levy

2018-03-14 19:56 GMT+08:00 Shea Levy <[email protected]>:

Quoted 147 lines
Quoted 145 lines · Zong Li

2018-03-14 11:07 GMT+08:00 Palmer Dabbelt <[email protected]>:

Quoted 110 lines · zongbox at gmail.com
Quoted 92 lines

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 80 lines

Hi Palmer,

Quoted 66 lines · Palmer Dabbelt
Quoted 41 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 15 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156
++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175
++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same
R_RISCV_ALIGN problem as the other one

http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html

Quoted 7 lines

It looks like this one uses shared libraries for modules instead of static
objects. I think using shared objects is the right thing to do, as it'll allow
us to place modules anywhere in the address space by having multiple GOTs and
PLTs.

Quoted 6 lines

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Hi,

Quoted 7 lines

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections,
we can put the module anywhere, even we support the KASLR in the kernel.

Sorry, I guess I meant PIC objects not shared objects (I keep forgetting about
PIE). We'll probably eventually add large code model targets, but they might
end up just being functionally equilivant to PIE with multi-GOT and multi-PLT
so it might not matter.

Quoted 1 line

Either way, this is the sanest way to do it for now.

Actually, I try to use the large code model and without PIC before. (The compiler with mcmodel=large obtain from my colleague development) On this compiler version, the -mcmodel=large uses the constant pool mechanism to
puts the addresses of data symbols at the function tail. It can resolve the reference about out of range of data symbol, but this code generation not apply to function call. For the compiler code generation and no linker to do relax reason, kernel module still needs the PLT section to jump to far target. On the other hand, the ARM64 mailing list has the patches to remove the large code model for cache performance.

https://marc.info/?l=linux-arm-kernel&m=151860828416766

so maybe we can use the medany + fPIC for now.

Quoted 16 lines
Quoted 7 lines

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the
performance, I agree the point that adding the mno-relax option and checking
the alignment in ALIGN type in module loader.

Sounds good. I just merged the mno-relax stuff, it'll show up when I get around to generating a 7.3.0 backport branch. For now I think you should just
fail on R_RISCV_ALIGN and attempt to pass -mno-relax to the compiler (via something like "$(call cc-option,-mno-relax)", like we do for "-mstrict-align"). I don't think it's worth handling R_RISCV_ALIGN in the kernel, as that's essentially the same as full relaxation support.

Quoted 8 lines
Quoted 2 lines

OK. I will send the v2 patches with the modification as you mention about R_RISCV_ALIGN type?

Just to avoid work duplication, do you think you'll get to this before this weekend? I was planning on bringing my patches up-to-date then, but since we're going the PIC route I can base my no-relax/ALIGN support on top of your series instead.

Hi Shea,

I'm not sure whether there are any problems before finishing discussion. If only the alignment problem, I think that it is quick modification.

Thanks a lot.

Quoted 14 lines
Quoted 14 lines
Quoted 7 lines

If I understand your code correctly, you're currently generating one GOT and one PLT per loaded module. If that's the case, then this is correct, it's just
possible to save some memory by merging these tables. It's probably not worth
the complexity for kernel modules for a while.

Yes, there are one GOT and one PLT per loaded module.
In the [PATCH 02/11], I generate the third section .got.plt for saving more memory of
each PLT entry.

Thanks a lot.

#24 lore raw
In reply to Shea Levy
Quoted 110 lines · shea at shealevy.com
Quoted 100 lines · Palmer Dabbelt
Quoted 77 lines · zongbox at gmail.com

2018-03-14 5:30 GMT+08:00 Shea Levy <[email protected]>:

Quoted 64 lines

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 11 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

Quoted 2 lines

That's kind of complicated, though, so we can start with something simpler like this.

Quoted 8 lines

Hi,

The kernel module is a object file, it is not be linked by linker, the GOT and PLT
sections will not be generated through -fPIC option, but it will generate the relative
relocation type. As Palmer mention before, If we have GOT and PLT sections, we can put the module anywhere, even we support the KASLR in the kernel.

Sorry, I guess I meant PIC objects not shared objects (I keep forgetting about PIE). We'll probably eventually add large code model targets, but they might end up just being functionally equilivant to PIE with multi-GOT and multi-PLT so it might not matter.

Either way, this is the sanest way to do it for now.

Quoted 5 lines

For the ALIGN problem, the kernel module loader is difficult to remove or migrate
the module's code like relax doing, so the remnant nop instructions harm the performance, I agree the point that adding the mno-relax option and checking the alignment in ALIGN type in module loader.

Quoted 7 lines

Sounds good. I just merged the mno-relax stuff, it'll show up when I get around to generating a 7.3.0 backport branch. For now I think you should just fail on R_RISCV_ALIGN and attempt to pass -mno-relax to the compiler (via something like "$(call cc-option,-mno-relax)", like we do for "-mstrict-align"). I don't think it's worth handling R_RISCV_ALIGN in the kernel, as that's essentially the same as full relaxation support.

Quoted 2 lines

Should we unconditionally fail on R_RISCV_ALIGN or only if the code isn't already aligned?

Either way is OK for me. With '-mno-relax' there shouldn't be any R_RISCV_ALIGN relocations, so it shouldn't matter.

Quoted 16 lines
Quoted 16 lines
Quoted 5 lines
Quoted 3 lines
Quoted 3 lines

That's kind of complicated, though, so we can start with something simpler like this.

So what is the suggestion for that.

Well, I'm not really sure -- essentially the idea of proper multi-GOT and multi-PLT support would be to merge the GOTs and PLTs of modules together when they're within range of each other. We haven't even figured this out in userspace yet, so it's probably not worth attempting for kernel modules for a bit.

If I understand your code correctly, you're currently generating one GOT and one PLT per loaded module. If that's the case, then this is correct, it's just possible to save some memory by merging these tables. It's probably not worth the complexity for kernel modules for a while.

#27 lore raw
In reply to Shea Levy
Quoted 86 lines · shea at shealevy.com
Quoted 80 lines · Palmer Dabbelt
Quoted 64 lines · shea at shealevy.com

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 8 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

We don't currently have any position-dependent RISC-V code models larger than "medany", in which all code and data must live within a single 32-bit addressable range. The PLT and GOT sort of provide an out here, so the code only needs to get to the table (which can then get anywhere via an indirection layer).

Quoted 3 lines

This is relevant for Linux modules because it lets us load modules anywhere in the address space. It's also a bit of a headache, as it either requires a GOT+PLT per module (which is big) or merging tables (which is hard).

Quoted 5 lines

I see, thanks! We only get this benefit if we actually do the relevanat indirection in the table, right? And if we merge tables we still have to have all modules within 32 bits of the common table? Is this how some future "medlarge" code model will work, or is it more of a convenient way to reuse existing techniques until other code models are worked out?

The idea is that you'd merge the tables only when it's possible to do that correctly, which is the tricky part.

It'd be called "largeany", the "med" part is what limits the code model to 32 bit offsets. We might just call it "large", as the "any" is kind of redundant.

#28 lore raw
Quoted 93 lines · Palmer Dabbelt
Quoted 86 lines · shea at shealevy.com
Quoted 80 lines · Palmer Dabbelt
Quoted 64 lines · shea at shealevy.com

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 8 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

We don't currently have any position-dependent RISC-V code models larger than "medany", in which all code and data must live within a single 32-bit addressable range. The PLT and GOT sort of provide an out here, so the code only needs to get to the table (which can then get anywhere via an indirection layer).

Quoted 3 lines

This is relevant for Linux modules because it lets us load modules anywhere in the address space. It's also a bit of a headache, as it either requires a GOT+PLT per module (which is big) or merging tables (which is hard).

Quoted 5 lines

I see, thanks! We only get this benefit if we actually do the relevanat indirection in the table, right? And if we merge tables we still have to have all modules within 32 bits of the common table? Is this how some future "medlarge" code model will work, or is it more of a convenient way to reuse existing techniques until other code models are worked out?

Quoted 5 lines

The idea is that you'd merge the tables only when it's possible to do that correctly, which is the tricky part.

It'd be called "largeany", the "med" part is what limits the code model to 32 bit offsets. We might just call it "large", as the "any" is kind of redundant.

Ah, right, that makes more sense :D. So would "mcmodel=large" also use
PLTs/GOTs for long jumps?
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#2 lore raw

Re: [PATCH 01/11] RISC-V: Add sections of PLT and GOT for kernel module

In reply to Zong Li
Thank you for the patch! Yet something to improve:

Hi Zong,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v4.16-rc5 next-20180314]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Zong-Li/RISC-V-Resolve-the-issue-of-loadable-module-on-64-bit/20180314-203750
config: riscv-defconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=riscv

All error/warnings (new ones prefixed by >>):

In file included from include/linux/module.h:25:0,
from fs/notify/fsnotify.c:23:

>> arch/riscv/include/asm/module.h:37:25: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
               const struct mod_section *sec)
                            ^~~~~~~~~~~
   arch/riscv/include/asm/module.h: In function 'get_got_entry':
>> arch/riscv/include/asm/module.h:39:49: error: dereferencing pointer to incomplete type 'const struct mod_section'
     struct got_entry *got = (struct got_entry *)sec->shdr->sh_addr;
                                                    ^~
   arch/riscv/include/asm/module.h: At top level:
   arch/riscv/include/asm/module.h:91:25: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
               const struct mod_section *sec)
                            ^~~~~~~~~~~
   arch/riscv/include/asm/module.h: In function 'get_plt_entry':
   arch/riscv/include/asm/module.h:93:49: error: dereferencing pointer to incomplete type 'const struct mod_section'
     struct plt_entry *plt = (struct plt_entry *)sec->shdr->sh_addr;
                                                    ^~

vim +39 arch/riscv/include/asm/module.h

35
36 static inline struct got_entry *get_got_entry(u64 val,

  > 37						      const struct mod_section *sec)
    38	{
  > 39		struct got_entry *got = (struct got_entry *)sec->shdr->sh_addr;
    40		int i;
    41		for (i = 0; i < sec->num_entries; i++) {
    42			if (got[i].symbol_addr == val)
    43				return &got[i];
    44		}
    45		return NULL;
    46	}
    47	

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#29 lore raw
In reply to Shea Levy
Quoted 95 lines · shea at shealevy.com
Quoted 93 lines · Palmer Dabbelt
Quoted 91 lines · shea at shealevy.com
Quoted 80 lines · Palmer Dabbelt
Quoted 64 lines · shea at shealevy.com

Hi Palmer,

Quoted 60 lines · Palmer Dabbelt
Quoted 40 lines · zong at andestech.com

These patches resolve the some issues of loadable module.
- symbol out of ranges
- unknown relocation types

The reference of external variable and function symbols cannot exceed 32-bit offset ranges in kernel module. The module only can work on the 32-bit OS or the 64-bit OS with sv32 virtual addressing.

These patches will generate the .got, .got.plt and .plt sections during loading module, let it can refer to the symbol which locate more than 32-bit offset. These sections depend on the relocation types:
- R_RISCV_GOT_HI20
- R_RISCV_CALL_PLT

These patches also support more relocation types
- R_RISCV_CALL
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_ALIGN
- R_RISCV_ADD32
- R_RISCV_SUB32

Zong Li (11):
RISC-V: Add sections of PLT and GOT for kernel module
RISC-V: Add section of GOT.PLT for kernel module
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module
RISC-V: Support CALL relocation type in kernel module
RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module
RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq
RISC-V: Support ALIGN relocation type in kernel module
RISC-V: Support ADD32 relocation type in kernel module
RISC-V: Support SUB32 relocation type in kernel module
RISC-V: Enable module support in defconfig
RISC-V: Add definition of relocation types

Quoted 13 lines
 arch/riscv/Kconfig                  |   5 ++
 arch/riscv/Makefile                 |   3 +
 arch/riscv/configs/defconfig        |   2 +
 arch/riscv/include/asm/module.h     | 112 +++++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h   |  24 +++++
 arch/riscv/kernel/Makefile          |   1 +
 arch/riscv/kernel/module-sections.c | 156 ++++++++++++++++++++++++++++++++
 arch/riscv/kernel/module.c          | 175 ++++++++++++++++++++++++++++++++++--
 arch/riscv/kernel/module.lds        |   8 ++
 9 files changed, 480 insertions(+), 6 deletions(-)
 create mode 100644 arch/riscv/include/asm/module.h
 create mode 100644 arch/riscv/kernel/module-sections.c
 create mode 100644 arch/riscv/kernel/module.lds

This is the second set of patches that turn on modules, and it has the same R_RISCV_ALIGN problem as the other one

    http://lists.infradead.org/pipermail/linux-riscv/2018-February/000081.html
Quoted 8 lines
Quoted 4 lines

It looks like this one uses shared libraries for modules instead of static objects. I think using shared objects is the right thing to do, as it'll allow us to place modules anywhere in the address space by having multiple GOTs and PLTs.

Can you expand on this? It was my understanding that outside of the context of multiple address spaces sharing code the GOT and PLT were simply unnecessary overhead, what benefit would they bring here?

We don't currently have any position-dependent RISC-V code models larger than "medany", in which all code and data must live within a single 32-bit addressable range. The PLT and GOT sort of provide an out here, so the code only needs to get to the table (which can then get anywhere via an indirection layer).

Quoted 3 lines

This is relevant for Linux modules because it lets us load modules anywhere in the address space. It's also a bit of a headache, as it either requires a GOT+PLT per module (which is big) or merging tables (which is hard).

I see, thanks! We only get this benefit if we actually do the relevanat indirection in the table, right? And if we merge tables we still have to have all modules within 32 bits of the common table? Is this how some future "medlarge" code model will work, or is it more of a convenient way to reuse existing techniques until other code models are worked out?

Quoted 8 lines
Quoted 5 lines

The idea is that you'd merge the tables only when it's possible to do that correctly, which is the tricky part.

It'd be called "largeany", the "med" part is what limits the code model to 32 bit offsets. We might just call it "large", as the "any" is kind of redundant.

Ah, right, that makes more sense :D. So would "mcmodel=large" also use PLTs/GOTs for long jumps?

We'd probably still restrict the size of single object files to 32-bit offsets, but jumps outside of an object file would use an offset table. Of course, none of this is set in stone yet because we haven't fully figured out how to make this all work.

#4 lore raw

Re: [PATCH 02/11] RISC-V: Add section of GOT.PLT for kernel module

In reply to Zong Li
Thank you for the patch! Yet something to improve:

Hi Zong,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v4.16-rc5 next-20180314]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Zong-Li/RISC-V-Resolve-the-issue-of-loadable-module-on-64-bit/20180314-203750
config: riscv-defconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=riscv

All errors (new ones prefixed by >>):

In file included from include/linux/module.h:25:0,
from fs/notify/fsnotify.c:23:
arch/riscv/include/asm/module.h:38:25: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
const struct mod_section *sec)
^~~~~~~~~~~
arch/riscv/include/asm/module.h: In function 'get_got_entry':
arch/riscv/include/asm/module.h:40:49: error: dereferencing pointer to incomplete type 'const struct mod_section'

     struct got_entry *got = (struct got_entry *)sec->shdr->sh_addr;
                                                    ^~
   arch/riscv/include/asm/module.h: At top level:
   arch/riscv/include/asm/module.h:89:57: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
    static inline int get_got_plt_idx(u64 val, const struct mod_section *sec)
                                                            ^~~~~~~~~~~
   arch/riscv/include/asm/module.h: In function 'get_got_plt_idx':
   arch/riscv/include/asm/module.h:91:53: error: dereferencing pointer to incomplete type 'const struct mod_section'
     struct got_entry *got_plt = (struct got_entry *)sec->shdr->sh_addr;
                                                        ^~
   arch/riscv/include/asm/module.h: At top level:
   arch/riscv/include/asm/module.h:101:24: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
              const struct mod_section *sec_plt,
                           ^~~~~~~~~~~
   arch/riscv/include/asm/module.h: In function 'get_plt_entry':
   arch/riscv/include/asm/module.h:104:53: error: dereferencing pointer to incomplete type 'const struct mod_section'
     struct plt_entry *plt = (struct plt_entry *)sec_plt->shdr->sh_addr;
                                                        ^~
>> arch/riscv/include/asm/module.h:105:41: error: passing argument 2 of 'get_got_plt_idx' from incompatible pointer type [-Werror=incompatible-pointer-types]
     int got_plt_idx = get_got_plt_idx(val, sec_got_plt);
                                            ^~~~~~~~~~~

arch/riscv/include/asm/module.h:89:19: note: expected 'const struct mod_section *' but argument is of type 'const struct mod_section *'
static inline int get_got_plt_idx(u64 val, const struct mod_section *sec)
^~~~~~~~~~~~~~~
cc1: some warnings being treated as errors

vim +/get_got_plt_idx +105 arch/riscv/include/asm/module.h

    99	
   100	static inline struct plt_entry *get_plt_entry(u64 val,
 > 101					      const struct mod_section *sec_plt,
   102					      const struct mod_section *sec_got_plt)
   103	{
   104		struct plt_entry *plt = (struct plt_entry *)sec_plt->shdr->sh_addr;
 > 105		int got_plt_idx = get_got_plt_idx(val, sec_got_plt);

106 if (got_plt_idx >= 0)
107 return plt + got_plt_idx;
108 else
109 return NULL;
110 }
111

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#5 lore raw

Re: [PATCH 02/11] RISC-V: Add section of GOT.PLT for kernel module

2018-03-15 1:34 GMT+08:00 kbuild test robot <[email protected]>:

Quoted 68 lines

Hi Zong,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v4.16-rc5 next-20180314]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Zong-Li/RISC-V-Resolve-the-issue-of-loadable-module-on-64-bit/20180314-203750
config: riscv-defconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=riscv

All errors (new ones prefixed by >>):

In file included from include/linux/module.h:25:0,
from fs/notify/fsnotify.c:23:
arch/riscv/include/asm/module.h:38:25: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
const struct mod_section *sec)
^~~~~~~~~~~
arch/riscv/include/asm/module.h: In function 'get_got_entry':
arch/riscv/include/asm/module.h:40:49: error: dereferencing pointer to incomplete type 'const struct mod_section'

     struct got_entry *got = (struct got_entry *)sec->shdr->sh_addr;
                                                    ^~
   arch/riscv/include/asm/module.h: At top level:
   arch/riscv/include/asm/module.h:89:57: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
    static inline int get_got_plt_idx(u64 val, const struct mod_section *sec)
                                                            ^~~~~~~~~~~
   arch/riscv/include/asm/module.h: In function 'get_got_plt_idx':
   arch/riscv/include/asm/module.h:91:53: error: dereferencing pointer to incomplete type 'const struct mod_section'
     struct got_entry *got_plt = (struct got_entry *)sec->shdr->sh_addr;
                                                        ^~
   arch/riscv/include/asm/module.h: At top level:
   arch/riscv/include/asm/module.h:101:24: warning: 'struct mod_section' declared inside parameter list will not be visible outside of this definition or declaration
              const struct mod_section *sec_plt,
                           ^~~~~~~~~~~
   arch/riscv/include/asm/module.h: In function 'get_plt_entry':
   arch/riscv/include/asm/module.h:104:53: error: dereferencing pointer to incomplete type 'const struct mod_section'
     struct plt_entry *plt = (struct plt_entry *)sec_plt->shdr->sh_addr;
                                                        ^~
Quoted 1 line
Quoted 1 line

arch/riscv/include/asm/module.h:105:41: error: passing argument 2 of 'get_got_plt_idx' from incompatible pointer type [-Werror=incompatible-pointer-types]

     int got_plt_idx = get_got_plt_idx(val, sec_got_plt);
                                            ^~~~~~~~~~~

arch/riscv/include/asm/module.h:89:19: note: expected 'const struct mod_section *' but argument is of type 'const struct mod_section *'
static inline int get_got_plt_idx(u64 val, const struct mod_section *sec)
^~~~~~~~~~~~~~~
cc1: some warnings being treated as errors

vim +/get_got_plt_idx +105 arch/riscv/include/asm/module.h

    99

100 static inline struct plt_entry *get_plt_entry(u64 val,

Quoted 1 line

101 const struct mod_section *sec_plt,

102 const struct mod_section *sec_got_plt)

   103  {
   104          struct plt_entry *plt = (struct plt_entry *)sec_plt->shdr->sh_addr;
Quoted 1 line

105 int got_plt_idx = get_got_plt_idx(val, sec_got_plt);

106 if (got_plt_idx >= 0)

   107                  return plt + got_plt_idx;
   108          else
   109                  return NULL;
   110  }
   111
Quoted 3 lines

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The config default is enable the MODULES, but also need to consider the MODULES disable situation.
Modify the include/asm/module.h in PATCH v2

+u64 module_emit_got_entry(struct module *mod, u64 val); +u64 module_emit_plt_entry(struct module *mod, u64 val);

#ifdef CONFIG_MODULE_SECTIONS
struct mod_section {

@@ -23,6 +21,10 @@ struct mod_arch_specific {
        struct mod_section plt;
        struct mod_section got_plt;

};
-#endif

-u64 module_emit_got_entry(struct module *mod, u64 val); -u64 module_emit_plt_entry(struct module *mod, u64 val);

struct got_entry {
u64 symbol_addr; /* the real variable address */
@@ -108,6 +109,5 @@ static inline struct plt_entry *get_plt_entry(u64 val,

                 return NULL;

}

+#endif /* CONFIG_MODULE_SECTIONS */

#endif /* _ASM_RISCV_MODULE_H */