Add support for MediaTek SoCs - MT7623n / MT7629

Hello,

This is first round (time) to add U-boot support for MediaTek SoCs (MT7623n and MT7629), and the most of the drivers are based on mainline Linux, like clock, timer, mmc, pinctrl, watchdog, power domain and DTS.

The following are the major differences between Linux and U-boot:
- modify the driver interface to adapt the U-boot DM framework.
- remove unneeded DT nodes as they don't have proper drivers in U-boot yet.
- just add the basic functions (step-by-step) so that we can monitor the size.
- reuse ns16550.c but add a highspeed register for MediaTek UARTs.
- add a whole new SNOR driver mtk_qspi.c which is based on SPI master-slave hierarchy.

Our current progress:
The MT7623n (BananaPi R2) which has already supported in mainline Linux.
- We can choice to boot from eMMC or SD card. (ROM -> MediaTek preloder -> U-boot ...)
- MT7623n has an open development board called BananaPi R2 [1].

The MT7629 which has NOT supported in mainline Linux yet, but we will do it soon.
- Boot from SNOR. (ROM -> (boot header parsing sequence) -> SPL -> U-boot ...)

[1] http://wiki.banana-pi.org/Banana_Pi_BPI-R2

Thanks,
Ryder

Guochun Mao (1):
spi: mtk_qspi: add qspi driver for MT7629 SoC

Ryder Lee (16):
tools: MediaTek: add MTK boot header generation to mkimage
arm: MediaTek: add basic support for MT7629 boards
arm: dts: MediaTek: add MT7629 reference board support
arm: dts: MediaTek: add MT7623 Bananapi R2 board support
configs: MediaTek: add MT7629 reference board support
clk: MediaTek: add clock driver for MT7629 SoC.
clk: MediaTek: add clock driver for MT7623 SoC.
timer: MediaTek: add timer driver for MediaTek SoCs
watchdog: MediaTek: add watchdog driver for MediaTek SoCs
pinctrl: MediaTek: add pinctrl driver for MT7629 SoC
pinctrl: MediaTek: add pinctrl driver for MT7623 SoC power domain: MediaTek: add power domain driver for MT7629 SoC power domain: MediaTek: add power domain driver for MT7623 SoC
serial: 16550: allow the driver to support MediaTek serial
ram: MediaTek: add DDR3 driver for MT7629 SoC
MAINTAINERS: add an entry for MediaTek

Weijie Gao (3):
arm: MediaTek: add basic support for MT7623 boards
configs: MediaTek: add MT7623 Bananapi R2 board support
mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC

 MAINTAINERS                                   |   18 +
 Makefile                                      |   20 +
 arch/arm/Kconfig                              |   14 +
 arch/arm/Makefile                             |    1 +
 arch/arm/dts/Makefile                         |    4 +
 arch/arm/dts/mt7623.dtsi                      |  258 +++++
 arch/arm/dts/mt7623n-bananapi-bpi-r2.dts      |  207 ++++
 arch/arm/dts/mt7629-rfb.dts                   |   71 ++
 arch/arm/dts/mt7629.dtsi                      |  232 +++++
 arch/arm/include/asm/arch-mediatek/gpio.h     |    9 +
 arch/arm/mach-mediatek/Kconfig                |   32 +
 arch/arm/mach-mediatek/Makefile               |    7 +
 arch/arm/mach-mediatek/cpu.c                  |   34 +
 arch/arm/mach-mediatek/include/mach/chipid.h  |   17 +
 arch/arm/mach-mediatek/include/mach/gpio.h    |    9 +
 arch/arm/mach-mediatek/init.h                 |   11 +
 arch/arm/mach-mediatek/mt7623/Makefile        |    4 +
 arch/arm/mach-mediatek/mt7623/init.c          |   53 +
 arch/arm/mach-mediatek/mt7623/lowlevel_init.S |   22 +
 arch/arm/mach-mediatek/mt7623/preloader.h     |   99 ++
 arch/arm/mach-mediatek/mt7629/Makefile        |    4 +
 arch/arm/mach-mediatek/mt7629/init.c          |  142 +++
 arch/arm/mach-mediatek/mt7629/lowlevel_init.S |   50 +
 arch/arm/mach-mediatek/spl.c                  |   43 +
 board/mediatek/mt7623/Kconfig                 |   13 +
 board/mediatek/mt7623/MAINTAINERS             |    7 +
 board/mediatek/mt7623/Makefile                |    4 +
 board/mediatek/mt7623/mt7623_rfb.c            |   16 +
 board/mediatek/mt7629/Kconfig                 |   17 +
 board/mediatek/mt7629/MAINTAINERS             |    7 +
 board/mediatek/mt7629/Makefile                |    4 +
 board/mediatek/mt7629/mt7629_rfb.c            |   16 +
 common/image.c                                |    1 +
 configs/mt7623n_bpir2_defconfig               |   53 +
 configs/mt7629_rfb_defconfig                  |   73 ++
 drivers/clk/Makefile                          |    1 +
 drivers/clk/mediatek/Makefile                 |    7 +
 drivers/clk/mediatek/clk-mt7623.c             |  867 +++++++++++++++++
 drivers/clk/mediatek/clk-mt7629.c             |  666 +++++++++++++
 drivers/clk/mediatek/clk-mtk.c                |  494 ++++++++++
 drivers/clk/mediatek/clk-mtk.h                |  151 +++
 drivers/mmc/Kconfig                           |    9 +
 drivers/mmc/Makefile                          |    1 +
 drivers/mmc/mtk-sd.c                          | 1286 +++++++++++++++++++++++++
 drivers/pinctrl/Kconfig                       |    1 +
 drivers/pinctrl/Makefile                      |    1 +
 drivers/pinctrl/mediatek/Kconfig              |   15 +
 drivers/pinctrl/mediatek/Makefile             |    7 +
 drivers/pinctrl/mediatek/pinctrl-mt7623.c     | 1280 ++++++++++++++++++++++++
 drivers/pinctrl/mediatek/pinctrl-mt7629.c     |  489 ++++++++++
 drivers/pinctrl/mediatek/pinctrl-mtk-common.c |  558 +++++++++++
 drivers/pinctrl/mediatek/pinctrl-mtk-common.h |  186 ++++
 drivers/power/domain/Kconfig                  |    7 +
 drivers/power/domain/Makefile                 |    1 +
 drivers/power/domain/mtk-power-domain.c       |  406 ++++++++
 drivers/ram/Makefile                          |    1 +
 drivers/ram/mediatek/Makefile                 |    7 +
 drivers/ram/mediatek/ddr3-mt7629.c            |  766 +++++++++++++++
 drivers/serial/ns16550.c                      |   10 +
 drivers/spi/Kconfig                           |    7 +
 drivers/spi/Makefile                          |    1 +
 drivers/spi/mtk_qspi.c                        |  406 ++++++++
 drivers/timer/Kconfig                         |    7 +
 drivers/timer/Makefile                        |    1 +
 drivers/timer/mtk_timer.c                     |   85 ++
 drivers/watchdog/Kconfig                      |    8 +
 drivers/watchdog/Makefile                     |    1 +
 drivers/watchdog/mtk_wdt.c                    |  135 +++
 include/configs/mt7623.h                      |   66 ++
 include/configs/mt7629.h                      |   70 ++
 include/dt-bindings/clock/mt7623-clk.h        |  429 +++++++++
 include/dt-bindings/clock/mt7629-clk.h        |  217 +++++
 include/dt-bindings/power/mt7623-power.h      |   19 +
 include/dt-bindings/power/mt7629-power.h      |   13 +
 include/dt-bindings/reset/mt7623-resets.h     |   85 ++
 include/image.h                               |    1 +
 scripts/Makefile.spl                          |   11 +
 tools/Makefile                                |    1 +
 tools/mtkimage.c                              |  748 ++++++++++++++
 tools/mtkimage.h                              |  199 ++++
 80 files changed, 11299 insertions(+)
 create mode 100644 arch/arm/dts/mt7623.dtsi
 create mode 100644 arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
 create mode 100644 arch/arm/dts/mt7629-rfb.dts
 create mode 100644 arch/arm/dts/mt7629.dtsi
 create mode 100644 arch/arm/include/asm/arch-mediatek/gpio.h
 create mode 100644 arch/arm/mach-mediatek/Kconfig
 create mode 100644 arch/arm/mach-mediatek/Makefile
 create mode 100644 arch/arm/mach-mediatek/cpu.c
 create mode 100644 arch/arm/mach-mediatek/include/mach/chipid.h
 create mode 100644 arch/arm/mach-mediatek/include/mach/gpio.h
 create mode 100644 arch/arm/mach-mediatek/init.h
 create mode 100644 arch/arm/mach-mediatek/mt7623/Makefile
 create mode 100644 arch/arm/mach-mediatek/mt7623/init.c
 create mode 100644 arch/arm/mach-mediatek/mt7623/lowlevel_init.S
 create mode 100644 arch/arm/mach-mediatek/mt7623/preloader.h
 create mode 100644 arch/arm/mach-mediatek/mt7629/Makefile
 create mode 100644 arch/arm/mach-mediatek/mt7629/init.c
 create mode 100644 arch/arm/mach-mediatek/mt7629/lowlevel_init.S
 create mode 100644 arch/arm/mach-mediatek/spl.c
 create mode 100644 board/mediatek/mt7623/Kconfig
 create mode 100644 board/mediatek/mt7623/MAINTAINERS
 create mode 100644 board/mediatek/mt7623/Makefile
 create mode 100644 board/mediatek/mt7623/mt7623_rfb.c
 create mode 100644 board/mediatek/mt7629/Kconfig
 create mode 100644 board/mediatek/mt7629/MAINTAINERS
 create mode 100644 board/mediatek/mt7629/Makefile
 create mode 100644 board/mediatek/mt7629/mt7629_rfb.c
 create mode 100644 configs/mt7623n_bpir2_defconfig
 create mode 100644 configs/mt7629_rfb_defconfig
 create mode 100644 drivers/clk/mediatek/Makefile
 create mode 100644 drivers/clk/mediatek/clk-mt7623.c
 create mode 100644 drivers/clk/mediatek/clk-mt7629.c
 create mode 100644 drivers/clk/mediatek/clk-mtk.c
 create mode 100644 drivers/clk/mediatek/clk-mtk.h
 create mode 100644 drivers/mmc/mtk-sd.c
 create mode 100644 drivers/pinctrl/mediatek/Kconfig
 create mode 100644 drivers/pinctrl/mediatek/Makefile
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7623.c
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7629.c
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-common.c
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-common.h
 create mode 100644 drivers/power/domain/mtk-power-domain.c
 create mode 100644 drivers/ram/mediatek/Makefile
 create mode 100644 drivers/ram/mediatek/ddr3-mt7629.c
 create mode 100644 drivers/spi/mtk_qspi.c
 create mode 100644 drivers/timer/mtk_timer.c
 create mode 100644 drivers/watchdog/mtk_wdt.c
 create mode 100644 include/configs/mt7623.h
 create mode 100644 include/configs/mt7629.h
 create mode 100644 include/dt-bindings/clock/mt7623-clk.h
 create mode 100644 include/dt-bindings/clock/mt7629-clk.h
 create mode 100644 include/dt-bindings/power/mt7623-power.h
 create mode 100644 include/dt-bindings/power/mt7629-power.h
 create mode 100644 include/dt-bindings/reset/mt7623-resets.h
 create mode 100644 tools/mtkimage.c
 create mode 100644 tools/mtkimage.h

1.9.1

This patch adds support for MTK boot image generation.

---
 Makefile             |  20 ++
 common/image.c       |   1 +
 include/image.h      |   1 +
 scripts/Makefile.spl |  11 +
 tools/Makefile       |   1 +
 tools/mtkimage.c     | 748 +++++++++++++++++++++++++++++++++++++++++++++++++++
 tools/mtkimage.h     | 199 ++++++++++++++
 7 files changed, 981 insertions(+)
 create mode 100644 tools/mtkimage.c
 create mode 100644 tools/mtkimage.h

index 6869ac8..427a876 100644
@@ -852,6 +852,8 @@ ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
 ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb-tegra.bin
 endif
 
+ALL-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin
+
 # Add optional build target if defined in board/cpu/soc headers
 ifneq ($(CONFIG_BUILD_TARGET),)
 ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)

@@ -1354,6 +1356,24 @@ u-boot.elf: u-boot.bin
 	$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
 	$(call if_changed,u-boot-elf)
 
+# MediaTek's ARM-based u-boot needs a header to contains its load address
+# which is parsed by the BootROM.
+# If the SPL build is enabled, the header will be added to the spl binary,
+# and the spl binary and the u-boot.img will be combined into one file.
+# Otherwise the header will be added to the u-boot.bin directly.
+
+ifeq ($(CONFIG_SPL),y)
+u-boot-mtk.bin: spl/u-boot-spl-mtk.bin u-boot.img FORCE
+	$(call if_changed,cat)
+else
+MKIMAGEFLAGS_u-boot-mtk.bin = -T mtkimage \
+	-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
+	-n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
+
+u-boot-mtk.bin: u-boot.bin FORCE
+	$(call if_changed,mkimage)
+endif
+
 ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
 
 # Rule to link u-boot

index 4f20128..3035cc8 100644
@@ -165,6 +165,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
 	{       IH_TYPE_PMMC,        "pmmc",        "TI Power Management Micro-Controller Firmware",},
 	{	IH_TYPE_STM32IMAGE, "stm32image", "STMicroelectronics STM32 Image" },
+	{	IH_TYPE_MTKIMAGE,   "mtkimage",   "MeidaTek BootROM loadable Image" },
 	{	-1,		    "",		  "",			},
 };
 

index 3bb7d29..3128981 100644
@@ -277,6 +277,7 @@ enum {
 	IH_TYPE_PMMC,            /* TI Power Management Micro-Controller Firmware */
 	IH_TYPE_STM32IMAGE,		/* STMicroelectronics STM32 Image */
 	IH_TYPE_SOCFPGAIMAGE_V1,	/* Altera SOCFPGA A10 Preloader	*/
+	IH_TYPE_MTKIMAGE,		/* MeidaTek BootROM loadable Image */
 
 	IH_TYPE_COUNT,			/* Number of image types */
 };

index e494d18..b87d0dc 100644
@@ -212,6 +212,8 @@ ALL-$(CONFIG_SPL_X86_16BIT_INIT) += $(obj)/u-boot-x86-16bit-spl.bin
 ALL-$(CONFIG_ARCH_ZYNQ)		+= $(obj)/boot.bin
 ALL-$(CONFIG_ARCH_ZYNQMP)	+= $(obj)/boot.bin
 
+ALL-$(CONFIG_ARCH_MEDIATEK)	+= $(obj)/u-boot-spl-mtk.bin
+
 all:	$(ALL-y)
 
 quiet_cmd_cat = CAT     $@

@@ -342,6 +344,15 @@ cmd_sunxi_spl_image_builder = $(objtree)/tools/sunxi-spl-image-builder \
 $(obj)/sunxi-spl-with-ecc.bin: $(obj)/sunxi-spl.bin
 	$(call if_changed,sunxi_spl_image_builder)
 
+
+# MediaTek's specific SPL build
+MKIMAGEFLAGS_u-boot-spl-mtk.bin = -T mtkimage \
+	-a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) \
+	-n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
+
+$(obj)/u-boot-spl-mtk.bin: $(obj)/u-boot-spl.bin FORCE
+	$(call if_changed,mkimage)
+
 # Rule to link u-boot-spl
 # May be overridden by arch/$(ARCH)/config.mk
 quiet_cmd_u-boot-spl ?= LD      $@

index 0c3341e..11732e3 100644
@@ -115,6 +115,7 @@ dumpimage-mkimage-objs := aisimage.o \
 			$(LIBFDT_OBJS) \
 			gpimage.o \
 			gpimage-common.o \
+			mtkimage.o \
 			$(RSA_OBJS-y)
 
 dumpimage-objs := $(dumpimage-mkimage-objs) dumpimage.o

1.9.1

This adds a general board file based on MT7629 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks.

---
 arch/arm/Kconfig                              |  14 +++
 arch/arm/Makefile                             |   1 +
 arch/arm/mach-mediatek/Kconfig                |  24 +++++
 arch/arm/mach-mediatek/Makefile               |   6 ++
 arch/arm/mach-mediatek/cpu.c                  |  34 ++++++
 arch/arm/mach-mediatek/include/mach/chipid.h  |  17 +++
 arch/arm/mach-mediatek/include/mach/gpio.h    |   9 ++
 arch/arm/mach-mediatek/init.h                 |  11 ++
 arch/arm/mach-mediatek/mt7629/Makefile        |   4 +
 arch/arm/mach-mediatek/mt7629/init.c          | 142 ++++++++++++++++++++++++++
 arch/arm/mach-mediatek/mt7629/lowlevel_init.S |  50 +++++++++
 arch/arm/mach-mediatek/spl.c                  |  43 ++++++++
 board/mediatek/mt7629/Kconfig                 |  17 +++
 board/mediatek/mt7629/MAINTAINERS             |   7 ++
 board/mediatek/mt7629/Makefile                |   4 +
 board/mediatek/mt7629/mt7629_rfb.c            |  16 +++
 include/configs/mt7629.h                      |  68 ++++++++++++
 17 files changed, 467 insertions(+)
 create mode 100644 arch/arm/mach-mediatek/Kconfig
 create mode 100644 arch/arm/mach-mediatek/Makefile
 create mode 100644 arch/arm/mach-mediatek/cpu.c
 create mode 100644 arch/arm/mach-mediatek/include/mach/chipid.h
 create mode 100644 arch/arm/mach-mediatek/include/mach/gpio.h
 create mode 100644 arch/arm/mach-mediatek/init.h
 create mode 100644 arch/arm/mach-mediatek/mt7629/Makefile
 create mode 100644 arch/arm/mach-mediatek/mt7629/init.c
 create mode 100644 arch/arm/mach-mediatek/mt7629/lowlevel_init.S
 create mode 100644 arch/arm/mach-mediatek/spl.c
 create mode 100644 board/mediatek/mt7629/Kconfig
 create mode 100644 board/mediatek/mt7629/MAINTAINERS
 create mode 100644 board/mediatek/mt7629/Makefile
 create mode 100644 board/mediatek/mt7629/mt7629_rfb.c
 create mode 100644 include/configs/mt7629.h

index ccf2a84..eac03f0 100644
@@ -668,6 +668,18 @@ config ARCH_MESON
 	  targeted at media players and tablet computers. We currently
 	  support the S905 (GXBaby) 64-bit SoC.
 
+config ARCH_MEDIATEK
+	bool "MediaTek SoCs"
+	select DM
+	select OF_CONTROL
+	select SPL_DM if SPL
+	select SPL_LIBCOMMON_SUPPORT if SPL
+	select SPL_LIBGENERIC_SUPPORT if SPL
+	select SPL_OF_CONTROL if SPL
+	select SUPPORT_SPL
+	help
+	  Support for the MediaTek SoCs family.
+
 config ARCH_MX8M
 	bool "NXP i.MX8M platform"
 	select ARM64

@@ -1423,6 +1435,8 @@ source "arch/arm/mach-rmobile/Kconfig"
 
 source "arch/arm/mach-meson/Kconfig"
 
+source "arch/arm/mach-mediatek/Kconfig"
+
 source "arch/arm/mach-qemu/Kconfig"
 
 source "arch/arm/mach-rockchip/Kconfig"

index 8f50560..ddb9618 100644
@@ -62,6 +62,7 @@ machine-$(CONFIG_ARCH_K3)		+= k3
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD)		+= kirkwood
+machine-$(CONFIG_ARCH_MEDIATEK)		+= mediatek
 machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA

new file mode 100644
index 0000000..a932e70
@@ -0,0 +1,24 @@
+if ARCH_MEDIATEK
+
+config SYS_SOC
+	default "mediatek"
+
+config SYS_VENDOR
+	default "mediatek"
+
+choice
+	prompt "MediaTek board select"
+
+config TARGET_MT7629
+	bool "MediaTek MT7629 SoC"
+	select CPU_V7A
+	select SPL
+	select ARCH_MISC_INIT
+	help
+		Support MediaTek MT7629 SoC.
+
+endchoice
+
+source "board/mediatek/mt7629/Kconfig"
+
+endif

new file mode 100644
index 0000000..852d330
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier:	GPL-2.0
+
+obj-y	+= cpu.o
+obj-$(CONFIG_SPL_BUILD)	+= spl.o
+
+obj-$(CONFIG_TARGET_MT7629) += mt7629/

new file mode 100644
index 0000000..2bfeab7
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/uclass-internal.h>
+#include <wdt.h>
+
+int arch_misc_init(void)
+{
+	struct udevice *wdt;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_WDT, 0, &wdt);
+	if (!ret)
+		wdt_stop(wdt);
+
+	return 0;
+}
+
+int arch_cpu_init(void)
+{
+	icache_enable();
+
+	return 0;
+}
+
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}

new file mode 100644
index 0000000..a2bc0a6
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#ifndef __MEDIATEK_CHIPID_H_
+#define __MEDIATEK_CHIPID_H_
+
+#define VER_BASE		0x08000000
+#define VER_SIZE		0x10
+
+#define APHW_CODE		0x00
+#define APHW_SUBCODE		0x04
+#define APHW_VER		0x08
+#define APSW_VER		0x0c
+
+#endif /* __MEDIATEK_CHIPID_H_ */

new file mode 100644
index 0000000..d302ab3
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#ifndef __MEDIATEK_GPIO_H_
+#define __MEDIATEK_GPIO_H_
+
+#endif /* __MEDIATEK_GPIO_H_ */

new file mode 100644
index 0000000..1d896fb
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#ifndef __MEDIATEK_INIT_H_
+#define __MEDIATEK_INIT_H_
+
+extern int mtk_soc_early_init(void);
+
+#endif /* __MEDIATEK_INIT_H_ */

new file mode 100644
index 0000000..007eb4a
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier:	GPL-2.0
+
+obj-y += init.o
+obj-y += lowlevel_init.o

new file mode 100644
index 0000000..6055164
@@ -0,0 +1,17 @@
+if TARGET_MT7629
+
+config SYS_BOARD
+	default "mt7629"
+
+config SYS_CONFIG_NAME
+	default "mt7629"
+
+config MTK_SPL_PAD_SIZE
+	hex
+	default 0x10000
+
+config MTK_BROM_HEADER_INFO
+	string
+	default "media=nor"
+
+endif

new file mode 100644
index 0000000..424f115
@@ -0,0 +1,7 @@
+MT7629
+M:	Ryder Lee <[email protected]>
+M:	Weijie Gao <[email protected]>
+S:	Maintained
+F:	board/mediatek/mt7629
+F:	include/configs/mt7629.h
+F:	configs/mt7629_rfb_defconfig

new file mode 100644
index 0000000..aa8790c
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier:	GPL-2.0+
+
+obj-y += mt7629_rfb.o
+

new file mode 100644
index 0000000..08468b5
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}

1.9.1

From: Weijie Gao <[email protected]>

This adds a general board file based on MT7623 SoCs from MediaTek.

As this u-boot is loaded by preloader, there is no low level initializtion codes.

---
 arch/arm/mach-mediatek/Kconfig                |  8 +++
 arch/arm/mach-mediatek/Makefile               |  1 +
 arch/arm/mach-mediatek/mt7623/Makefile        |  4 ++
 arch/arm/mach-mediatek/mt7623/init.c          | 53 ++++++++++++++
 arch/arm/mach-mediatek/mt7623/lowlevel_init.S | 22 ++++++
 arch/arm/mach-mediatek/mt7623/preloader.h     | 99 +++++++++++++++++++++++++++
 board/mediatek/mt7623/Kconfig                 | 13 ++++
 board/mediatek/mt7623/MAINTAINERS             |  7 ++
 board/mediatek/mt7623/Makefile                |  4 ++
 board/mediatek/mt7623/mt7623_rfb.c            | 16 +++++
 include/configs/mt7623.h                      | 66 ++++++++++++++++++
 11 files changed, 293 insertions(+)
 create mode 100644 arch/arm/mach-mediatek/mt7623/Makefile
 create mode 100644 arch/arm/mach-mediatek/mt7623/init.c
 create mode 100644 arch/arm/mach-mediatek/mt7623/lowlevel_init.S
 create mode 100644 arch/arm/mach-mediatek/mt7623/preloader.h
 create mode 100644 board/mediatek/mt7623/Kconfig
 create mode 100644 board/mediatek/mt7623/MAINTAINERS
 create mode 100644 board/mediatek/mt7623/Makefile
 create mode 100644 board/mediatek/mt7623/mt7623_rfb.c
 create mode 100644 include/configs/mt7623.h

index a932e70..b39bc44 100644
@@ -9,6 +9,13 @@ config SYS_VENDOR
 choice
 	prompt "MediaTek board select"
 
+config TARGET_MT7623
+	bool "MediaTek MT7623 SoC"
+	select CPU_V7A
+	select ARCH_MISC_INIT
+	help
+		Support MediaTek MT7623 SoC.
+
 config TARGET_MT7629
 	bool "MediaTek MT7629 SoC"
 	select CPU_V7A

@@ -19,6 +26,7 @@ config TARGET_MT7629
 
 endchoice
 
+source "board/mediatek/mt7623/Kconfig"
 source "board/mediatek/mt7629/Kconfig"
 
 endif

index 852d330..b5d3a37 100644
@@ -3,4 +3,5 @@
 obj-y	+= cpu.o
 obj-$(CONFIG_SPL_BUILD)	+= spl.o
 
+obj-$(CONFIG_TARGET_MT7623) += mt7623/
 obj-$(CONFIG_TARGET_MT7629) += mt7629/

new file mode 100644
index 0000000..007eb4a
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier:	GPL-2.0
+
+obj-y += init.o
+obj-y += lowlevel_init.o

new file mode 100644
index 0000000..afb9476
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#include <linux/linkage.h>
+
+.extern	preloader_param
+
+ENTRY(save_boot_params)
+	ldr	r6, =preloader_param
+	str	r4, [r6]
+	b	save_boot_params_ret
+ENDPROC(save_boot_params)
+
+ENTRY(lowlevel_init)
+	/* enable SMP bit */
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #0x40
+	mcr	p15, 0, r0, c1, c0, 1
+	mov	pc, lr
+ENDPROC(lowlevel_init)

new file mode 100644
index 0000000..a8c670e
@@ -0,0 +1,13 @@
+if TARGET_MT7623
+
+config SYS_BOARD
+	default "mt7623"
+
+config SYS_CONFIG_NAME
+	default "mt7623"
+
+config MTK_BROM_HEADER_INFO
+	string
+	default "lk=1"
+
+endif

new file mode 100644
index 0000000..2a78b72
@@ -0,0 +1,7 @@
+MT7623
+M:	Ryder Lee <[email protected]>
+M:	Weijie Gao <[email protected]>
+S:	Maintained
+F:	board/mediatek/mt7623
+F:	include/configs/mt7623.h
+F:	configs/mt7623n-bananapi-bpi-r2_defconfig

new file mode 100644
index 0000000..8943111
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier:	GPL-2.0+
+
+obj-y += mt7623_rfb.o
+

new file mode 100644
index 0000000..08468b5
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}

1.9.1

This patch adds mt7629.dtsi and reference board support.

---
 arch/arm/dts/Makefile                    |   3 +
 arch/arm/dts/mt7629-rfb.dts              |  71 ++++++++++
 arch/arm/dts/mt7629.dtsi                 | 232 +++++++++++++++++++++++++++++++
 include/configs/mt7629.h                 |   2 +
 include/dt-bindings/clock/mt7629-clk.h   | 217 +++++++++++++++++++++++++++++
 include/dt-bindings/power/mt7629-power.h |  13 ++
 6 files changed, 538 insertions(+)
 create mode 100644 arch/arm/dts/mt7629-rfb.dts
 create mode 100644 arch/arm/dts/mt7629.dtsi
 create mode 100644 include/dt-bindings/clock/mt7629-clk.h
 create mode 100644 include/dt-bindings/power/mt7629-power.h

index 44ebc50..9f88146 100644
@@ -554,6 +554,9 @@ dtb-$(CONFIG_TARGET_STM32MP1) += \
 
 dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb
 
+dtb-$(CONFIG_ARCH_MEDIATEK) += \
+	mt7629-rfb.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here

index ea979f0..d57adaa 100644
@@ -11,6 +11,8 @@
 
 #include <linux/sizes.h>
 
+#include <dt-bindings/clock/mt7629-clk.h>
+
 #ifndef __ASSEMBLY__
 extern unsigned long get_spl_size(void);
 #endif

new file mode 100644
index 0000000..c7e6130
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_MT7629_POWER_H
+#define _DT_BINDINGS_MT7629_POWER_H
+
+#define MT7629_POWER_DOMAIN_ETHSYS	0
+#define MT7629_POWER_DOMAIN_HIF0	1
+#define MT7629_POWER_DOMAIN_HIF1	2
+
+#endif /* _DT_BINDINGS_MT7629_POWER_H */

1.9.1

This patch adds support for MT7623 development board - Bananapi R2 from BIPAI KEJI. Detailed hardware information for BPI-R2 which could be found on http://wiki.banana-pi.org/Banana_Pi_BPI-R2.

---
 arch/arm/dts/Makefile                     |   1 +
 arch/arm/dts/mt7623.dtsi                  | 258 ++++++++++++++++++
 arch/arm/dts/mt7623n-bananapi-bpi-r2.dts  | 207 ++++++++++++++
 include/dt-bindings/clock/mt7623-clk.h    | 429 ++++++++++++++++++++++++++++++
 include/dt-bindings/power/mt7623-power.h  |  19 ++
 include/dt-bindings/reset/mt7623-resets.h |  85 ++++++
 6 files changed, 999 insertions(+)
 create mode 100644 arch/arm/dts/mt7623.dtsi
 create mode 100644 arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
 create mode 100644 include/dt-bindings/clock/mt7623-clk.h
 create mode 100644 include/dt-bindings/power/mt7623-power.h
 create mode 100644 include/dt-bindings/reset/mt7623-resets.h

index 9f88146..942ae4d 100644
@@ -555,6 +555,7 @@ dtb-$(CONFIG_TARGET_STM32MP1) += \
 dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb
 
 dtb-$(CONFIG_ARCH_MEDIATEK) += \
+	mt7623n-bananapi-bpi-r2.dtb \
 	mt7629-rfb.dtb
 
 targets += $(dtb-y)

new file mode 100644
index 0000000..0e73bb4
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_MT7623_POWER_H
+#define _DT_BINDINGS_MT7623_POWER_H
+
+#define MT7623_POWER_DOMAIN_CONN	0
+#define MT7623_POWER_DOMAIN_DISP	1
+#define MT7623_POWER_DOMAIN_MFG		2
+#define MT7623_POWER_DOMAIN_VDEC	3
+#define MT7623_POWER_DOMAIN_ISP		4
+#define MT7623_POWER_DOMAIN_BDP		5
+#define MT7623_POWER_DOMAIN_ETH		6
+#define MT7623_POWER_DOMAIN_HIF		7
+#define MT7623_POWER_DOMAIN_IFR_MSC	8
+
+#endif /* _DT_BINDINGS_MT7623_POWER_H */

1.9.1

This patch adds defconfig for the MT7629 reference board.

---
 configs/mt7629_rfb_defconfig | 73 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)
 create mode 100644 configs/mt7629_rfb_defconfig

new file mode 100644
index 0000000..2ae9c8f
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_TARGET_MT7629=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_DEFAULT_FDT_FILE="mt7629-rfb"
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+# CONFIG_PARTITIONS is not set
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7629=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_QSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_MTK_TIMER=y
+CONFIG_WDT_MTK=y
+CONFIG_LZMA=y
+# CONFIG_EFI_LOADER is not set

1.9.1

From: Weijie Gao <[email protected]>

This patch adds defconfig for the MT7623 Bananapi R2 board.

---
 configs/mt7623n_bpir2_defconfig | 53 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 configs/mt7623n_bpir2_defconfig

new file mode 100644
index 0000000..a896d6a
@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_SYS_TEXT_BASE=0x81e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_TARGET_MT7623=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_DEFAULT_FDT_FILE="mt7623n-bananapi-bpi-r2"
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_READ=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+# CONFIG_MMC_QUIRKS is not set
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_MTK=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7623=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_TIMER=y
+CONFIG_MTK_TIMER=y
+CONFIG_WDT_MTK=y
+CONFIG_LZMA=y
+# CONFIG_EFI_LOADER is not set

1.9.1

This patch adds clock driver for MediaTek SoC and divides it into two parts:

- Shared functions: a common driver which contains the general operations for plls, muxes, dividers and clock gates so that we can reuse it for other SoCs.

- Specific SoC drivers: the group of structures which describe the hardware configurations.

And we take MT7629 as an example to demonstrate how to implement drivers if any other MediaTek chips would like to use it.

---
 drivers/clk/Makefile              |   1 +
 drivers/clk/mediatek/Makefile     |   6 +
 drivers/clk/mediatek/clk-mt7629.c | 666 ++++++++++++++++++++++++++++++++++++++
 drivers/clk/mediatek/clk-mtk.c    | 494 ++++++++++++++++++++++++++++
 drivers/clk/mediatek/clk-mtk.h    | 151 +++++++++
 5 files changed, 1318 insertions(+)
 create mode 100644 drivers/clk/mediatek/Makefile
 create mode 100644 drivers/clk/mediatek/clk-mt7629.c
 create mode 100644 drivers/clk/mediatek/clk-mtk.c
 create mode 100644 drivers/clk/mediatek/clk-mtk.h

index 8bc9f52..3641991 100644
@@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
 obj-y += tegra/
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_ARCH_MESON) += clk_meson.o
+obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_ARCH_SOCFPGA) += altera/
 obj-$(CONFIG_CLK_AT91) += at91/

new file mode 100644
index 0000000..297f99d
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+# Core
+obj-$(CONFIG_ARCH_MEDIATEK) += clk-mtk.o
+
+# SoC Drivers
+obj-$(CONFIG_TARGET_MT7629) += clk-mt7629.o

1.9.1

This patch adds the hardware details of MT7623 clock blocks.

---
 drivers/clk/mediatek/Makefile     |   1 +
 drivers/clk/mediatek/clk-mt7623.c | 867 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 868 insertions(+)
 create mode 100644 drivers/clk/mediatek/clk-mt7623.c

index 297f99d..0632dc8 100644
@@ -3,4 +3,5 @@
 obj-$(CONFIG_ARCH_MEDIATEK) += clk-mtk.o
 
 # SoC Drivers
+obj-$(CONFIG_TARGET_MT7623) += clk-mt7623.o
 obj-$(CONFIG_TARGET_MT7629) += clk-mt7629.o

1.9.1

This patch adds clock source/event for the timer found on the Mediatek SoCs.

---
 drivers/timer/Kconfig     |  7 ++++
 drivers/timer/Makefile    |  1 +
 drivers/timer/mtk_timer.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 93 insertions(+)
 create mode 100644 drivers/timer/mtk_timer.c

index a7d600b..83ec0e6 100644
@@ -147,4 +147,11 @@ config MPC83XX_TIMER
 	  Select this to enable support for the timer found on
 	  devices based on the MPC83xx family of SoCs.
 
+config MTK_TIMER
+        bool "MediaTek timer support"
+	depends on TIMER
+	help
+	  Select this to enable support for the timer found on
+	  MediaTek devices.
+
 endmenu

index 7f19c49..c4fbab2 100644
@@ -18,3 +18,4 @@ obj-$(CONFIG_SANDBOX_TIMER)	+= sandbox_timer.o
 obj-$(CONFIG_STI_TIMER)		+= sti-timer.o
 obj-$(CONFIG_STM32_TIMER)	+= stm32_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)	+= tsc_timer.o
+obj-$(CONFIG_MTK_TIMER)		+= mtk_timer.o

1.9.1

This patch adds a common driver for the Mediatek SoC integrated watchdog.

---
 drivers/watchdog/Kconfig   |   8 +++
 drivers/watchdog/Makefile  |   1 +
 drivers/watchdog/mtk_wdt.c | 135 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 144 insertions(+)
 create mode 100644 drivers/watchdog/mtk_wdt.c

index d545b3e..57a12f5 100644
@@ -103,6 +103,14 @@ config WDT_CDNS
 	   Select this to enable Cadence watchdog timer, which can be found on some
 	   Xilinx Microzed Platform.
 
+config WDT_MTK
+	bool "MediaTek watchdog timer support"
+	depends on WDT && ARCH_MEDIATEK
+	help
+	  Select this to enable watchdog timer for MediaTek SoCs.
+	  The watchdog timer is stopped when initialized.
+	  It performs full SoC reset.
+
 config XILINX_TB_WATCHDOG
 	bool "Xilinx Axi watchdog timer support"
 	depends on WDT

index 08406ca..04fa4a6 100644
@@ -23,3 +23,4 @@ obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
 obj-$(CONFIG_WDT_ORION) += orion_wdt.o
 obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_MPC8xx_WATCHDOG) += mpc8xx_wdt.o
+obj-$(CONFIG_WDT_MTK) += mtk_wdt.o

1.9.1

Add support for pinctrl on MT7629 SoC. The IO core found on the SoC has the registers for pinctrl, pinconf and gpio mixed up in the same register range. Hence the driver also implements the gpio functionality through UCLASS_GPIO.

We create pinctrl-mtk-common.c for common part as there might be other chips that use the same binding and driver, then being a little more abstract could help in the long run.

---
 arch/arm/include/asm/arch-mediatek/gpio.h     |   9 +
 drivers/pinctrl/Kconfig                       |   1 +
 drivers/pinctrl/Makefile                      |   1 +
 drivers/pinctrl/mediatek/Kconfig              |  11 +
 drivers/pinctrl/mediatek/Makefile             |   6 +
 drivers/pinctrl/mediatek/pinctrl-mt7629.c     | 489 ++++++++++++++++++++++
 drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 558 ++++++++++++++++++++++++++
 drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 185 +++++++++
 8 files changed, 1260 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mediatek/gpio.h
 create mode 100644 drivers/pinctrl/mediatek/Kconfig
 create mode 100644 drivers/pinctrl/mediatek/Makefile
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7629.c
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-common.c
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-common.h

new file mode 100644
index 0000000..8e6bf67
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ */
+
+#ifndef __GPIO_H
+#define __GPIO_H
+
+#endif	/* __GPIO_H */

index ad0b8da..7e6fad3 100644
@@ -301,6 +301,7 @@ config ASPEED_AST2500_PINCTRL
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
+source "drivers/pinctrl/mediatek/Kconfig"
 source "drivers/pinctrl/nxp/Kconfig"
 source "drivers/pinctrl/renesas/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"

index a3a6c6d..293bad3 100644
@@ -16,6 +16,7 @@ obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_PINCTRL_PIC32)	+= pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)	+= exynos/
 obj-$(CONFIG_PINCTRL_MESON)	+= meson/
+obj-$(CONFIG_PINCTRL_MTK)	+= mediatek/
 obj-$(CONFIG_ARCH_MVEBU)	+= mvebu/
 obj-$(CONFIG_PINCTRL_SINGLE)	+= pinctrl-single.o
 obj-$(CONFIG_PINCTRL_STI)	+= pinctrl-sti.o

new file mode 100644
index 0000000..e0145b1
@@ -0,0 +1,11 @@
+if ARCH_MEDIATEK
+
+config PINCTRL_MTK
+	depends on PINCTRL_GENERIC
+	bool
+
+config PINCTRL_MT7629
+	bool "MT7629 SoC pinctrl driver"
+	select PINCTRL_MTK
+
+endif

new file mode 100644
index 0000000..cbf0765
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+# Core
+obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
+
+# SoC Drivers
+obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o

1.9.1

Add support for pinctrl on MT7629 SoC which has 279 pins. And the most of the codes in this patch are used to describe the details of each pin.

---
 drivers/pinctrl/mediatek/Kconfig              |    4 +
 drivers/pinctrl/mediatek/Makefile             |    1 +
 drivers/pinctrl/mediatek/pinctrl-mt7623.c     | 1280 +++++++++++++++++++++++++
 drivers/pinctrl/mediatek/pinctrl-mtk-common.h |    1 +
 4 files changed, 1286 insertions(+)
 create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7623.c

index e0145b1..1bd9a92 100644
@@ -4,6 +4,10 @@ config PINCTRL_MTK
 	depends on PINCTRL_GENERIC
 	bool
 
+config PINCTRL_MT7623
+	bool "MT7623 SoC pinctrl driver"
+	select PINCTRL_MTK
+
 config PINCTRL_MT7629
 	bool "MT7629 SoC pinctrl driver"
 	select PINCTRL_MTK

index cbf0765..f6ef362 100644
@@ -3,4 +3,5 @@
 obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
 
 # SoC Drivers
+obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
 obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o

index 58abce7..34a913d 100644
@@ -179,6 +179,7 @@ struct mtk_pinctrl_priv {
 
 extern const struct pinctrl_ops mtk_pinctrl_ops;
 
+void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set);
 int mtk_pinctrl_probe(struct udevice *dev,
 		      struct mtk_pinctrl_soc *soc);
 

1.9.1

This adds a power domain driver for the Mediatek SCPSYS unit.

The System Control Processor System (SCPSYS) has several power management related tasks in the system. The tasks include thermal measurement, dynamic voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control. The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power domain control.

For now this driver only adds power domain support.

---
 drivers/power/domain/Kconfig            |   7 +
 drivers/power/domain/Makefile           |   1 +
 drivers/power/domain/mtk-power-domain.c | 326 ++++++++++++++++++++++++++++++++
 3 files changed, 334 insertions(+)
 create mode 100644 drivers/power/domain/mtk-power-domain.c

index 2c34488..e479fed 100644
@@ -16,6 +16,13 @@ config BCM6328_POWER_DOMAIN
 	  Enable support for manipulating BCM6345 power domains via MMIO
 	  mapped registers.
 
+config MTK_POWER_DOMAIN
+	bool "Enable the MediaTek power domain driver"
+	depends on POWER_DOMAIN && ARCH_MEDIATEK
+	help
+	  Enable support for manipulating MediaTek power domains via MMIO
+	  mapped registers.
+
 config MESON_GX_VPU_POWER_DOMAIN
 	bool "Enable Amlogic Meson GX VPU power domain driver"
 	depends on ARCH_MESON

index 6bdaa17..d6c7aa7 100644
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
 obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
+obj-$(CONFIG_MTK_POWER_DOMAIN) += mtk-power-domain.o
 obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o

1.9.1

This adds power domain (scpsys) support for MT7623 SoC.

---
 drivers/power/domain/mtk-power-domain.c | 80 +++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

index 5ebeabd..8b97a16 100644
@@ -14,8 +14,18 @@
 #include <asm/processor.h>
 #include <linux/iopoll.h>
 
+#include <dt-bindings/power/mt7623-power.h>
 #include <dt-bindings/power/mt7629-power.h>
 
+#define SPM_VDE_PWR_CON		0x0210
+#define SPM_MFG_PWR_CON		0x0214
+#define SPM_ISP_PWR_CON		0x0238
+#define SPM_DIS_PWR_CON		0x023c
+#define SPM_CONN_PWR_CON	0x0280
+#define SPM_BDP_PWR_CON		0x029c
+#define SPM_ETH_PWR_CON		0x02a0
+#define SPM_HIF_PWR_CON		0x02a4
+#define SPM_IFR_MSC_PWR_CON	0x02a8
 #define SPM_ETHSYS_PWR_CON	0x2e0
 #define SPM_HIF0_PWR_CON	0x2e4
 #define SPM_HIF1_PWR_CON	0x2e8

@@ -28,6 +38,15 @@
 #define PWR_ON_2ND_BIT		BIT(3)
 #define PWR_CLK_DIS_BIT		BIT(4)
 
+#define PWR_STATUS_CONN		BIT(1)
+#define PWR_STATUS_DISP		BIT(3)
+#define PWR_STATUS_MFG		BIT(4)
+#define PWR_STATUS_ISP		BIT(5)
+#define PWR_STATUS_VDEC		BIT(7)
+#define PWR_STATUS_BDP		BIT(14)
+#define PWR_STATUS_ETH		BIT(15)
+#define PWR_STATUS_HIF		BIT(16)
+#define PWR_STATUS_IFR_MSC	BIT(17)
 #define PWR_STATUS_ETHSYS	BIT(24)
 #define PWR_STATUS_HIF0		BIT(25)
 #define PWR_STATUS_HIF1		BIT(26)

@@ -40,6 +59,7 @@
 #define DCM_TOP_EN		BIT(0)
 
 enum scp_domain_type {
+	SCPSYS_MT7623,
 	SCPSYS_MT7629,
 };
 

@@ -61,6 +81,59 @@ struct scp_domain {
 	struct scp_domain_data *data;
 };
 
+static struct scp_domain_data scp_domain_mt7623[] = {
+	[MT7623_POWER_DOMAIN_CONN] = {
+		.sta_mask = PWR_STATUS_CONN,
+		.ctl_offs = SPM_CONN_PWR_CON,
+		.bus_prot_mask = BIT(8) | BIT(2),
+	},
+	[MT7623_POWER_DOMAIN_DISP] = {
+		.sta_mask = PWR_STATUS_DISP,
+		.ctl_offs = SPM_DIS_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+		.bus_prot_mask = BIT(2),
+	},
+	[MT7623_POWER_DOMAIN_MFG] = {
+		.sta_mask = PWR_STATUS_MFG,
+		.ctl_offs = SPM_MFG_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+		.sram_pdn_ack_bits = GENMASK(12, 12),
+	},
+	[MT7623_POWER_DOMAIN_VDEC] = {
+		.sta_mask = PWR_STATUS_VDEC,
+		.ctl_offs = SPM_VDE_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+		.sram_pdn_ack_bits = GENMASK(12, 12),
+	},
+	[MT7623_POWER_DOMAIN_ISP] = {
+		.sta_mask = PWR_STATUS_ISP,
+		.ctl_offs = SPM_ISP_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+		.sram_pdn_ack_bits = GENMASK(13, 12),
+	},
+	[MT7623_POWER_DOMAIN_BDP] = {
+		.sta_mask = PWR_STATUS_BDP,
+		.ctl_offs = SPM_BDP_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+	},
+	[MT7623_POWER_DOMAIN_ETH] = {
+		.sta_mask = PWR_STATUS_ETH,
+		.ctl_offs = SPM_ETH_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+		.sram_pdn_ack_bits = GENMASK(15, 12),
+	},
+	[MT7623_POWER_DOMAIN_HIF] = {
+		.sta_mask = PWR_STATUS_HIF,
+		.ctl_offs = SPM_HIF_PWR_CON,
+		.sram_pdn_bits = GENMASK(11, 8),
+		.sram_pdn_ack_bits = GENMASK(15, 12),
+	},
+	[MT7623_POWER_DOMAIN_IFR_MSC] = {
+		.sta_mask = PWR_STATUS_IFR_MSC,
+		.ctl_offs = SPM_IFR_MSC_PWR_CON,
+	},
+};
+
 static struct scp_domain_data scp_domain_mt7629[] = {
 	[MT7629_POWER_DOMAIN_ETHSYS] = {
 		.sta_mask = PWR_STATUS_ETHSYS,

@@ -252,6 +325,9 @@ static int mtk_power_domain_hook(struct udevice *dev)
 	scpd->type = (enum scp_domain_type)dev_get_driver_data(dev);
 
 	switch (scpd->type) {
+	case SCPSYS_MT7623:
+		scpd->data = scp_domain_mt7623;
+		break;
 	case SCPSYS_MT7629:
 		scpd->data = scp_domain_mt7629;
 		break;

@@ -303,6 +379,10 @@ static int mtk_power_domain_probe(struct udevice *dev)
 
 static const struct udevice_id mtk_power_domain_ids[] = {
 	{
+		.compatible = "mediatek,mt7623-scpsys",
+		.data = SCPSYS_MT7623,
+	},
+	{
 		.compatible = "mediatek,mt7629-scpsys",
 		.data = SCPSYS_MT7629,
 	},

1.9.1

MediaTek UARTs has a highspeed register which influences the calcualtion of the divisor. This patch adds an extra control in ns16550.c to suuport MediaTek SoCs.

Note that we don't support the baudrate larger than 115200 currently.

---
 drivers/serial/ns16550.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

index f9041aa..f5410af 100644
@@ -148,6 +148,13 @@ int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
 
 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
 {
+#ifdef CONFIG_ARCH_MEDIATEK
+	/*
+	 * MediaTek UARTs has an extra highspeed register.
+	 * We need to clear it if baudrate <= 115200.
+	 */
+	serial_out(0, &com_port->reg9);
+#endif
 	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
 	serial_out(baud_divisor & 0xff, &com_port->dll);
 	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);

@@ -261,6 +268,9 @@ static inline void _debug_uart_init(void)
 	serial_dout(&com_port->mcr, UART_MCRVAL);
 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
 
+#ifdef CONFIG_ARCH_MEDIATEK
+	serial_dout(&com_port->reg9, 0);
+#endif
 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
 	serial_dout(&com_port->dll, baud_divisor & 0xff);
 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);

1.9.1

This patch adds a DDR3 driver for MT7629 SoC.

---
 drivers/ram/Makefile               |   1 +
 drivers/ram/mediatek/Makefile      |   7 +
 drivers/ram/mediatek/ddr3-mt7629.c | 766 +++++++++++++++++++++++++++++++++++++
 3 files changed, 774 insertions(+)
 create mode 100644 drivers/ram/mediatek/Makefile
 create mode 100644 drivers/ram/mediatek/ddr3-mt7629.c

index 4ad3604..65cba80 100644
@@ -12,3 +12,4 @@ obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
 obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/

new file mode 100644
index 0000000..95507b5
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2018 MediaTek Inc.
+#
+# SPDX-License-Identifier:      GPL-2.0
+#
+
+obj-$(CONFIG_TARGET_MT7629) = ddr3-mt7629.o

1.9.1

From: Guochun Mao <[email protected]>

This patch adds MT7629 qspi driver for accessing SPI NOR flash.

---
 drivers/spi/Kconfig    |   7 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/mtk_qspi.c | 406 +++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 414 insertions(+)
 create mode 100644 drivers/spi/mtk_qspi.c

index 7d4d47d..0c37ac0 100644
@@ -117,6 +117,13 @@ config MVEBU_A3700_SPI
 	  used to access the SPI NOR flash on platforms embedding this
 	  Marvell IP core.
 
+config MTK_QSPI
+	bool "Mediatek QSPI driver"
+	help
+	  Enable the Mediatek QSPI driver. This driver can be
+	  used to access the SPI NOR flash on platforms embedding this
+	  Mediatek QSPI IP core.
+
 config PIC32_SPI
 	bool "Microchip PIC32 SPI driver"
 	depends on MACH_PIC32

index 6679987..f1c6400 100644
@@ -32,6 +32,7 @@ obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
 obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
 obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
 obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
+obj-$(CONFIG_MTK_QSPI) += mtk_qspi.o
 obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o
 obj-$(CONFIG_MXC_SPI) += mxc_spi.o
 obj-$(CONFIG_MXS_SPI) += mxs_spi.o

1.9.1

From: Weijie Gao <[email protected]>

This patch adds MT7623 SD/MMC host controller driver for accessing SD/MMC/eMMC flashes.

---
 drivers/mmc/Kconfig  |    9 +
 drivers/mmc/Makefile |    1 +
 drivers/mmc/mtk-sd.c | 1286 ++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 1296 insertions(+)
 create mode 100644 drivers/mmc/mtk-sd.c

index 0a0d4aa..ca13341 100644
@@ -598,6 +598,15 @@ config FTSDC010_SDIO
 	help
 		This can enable ftsdc010 sdio function.
 
+config MMC_MTK
+	bool "MediaTek SD/MMC Card Interface support"
+	default n
+	help
+	  This selects the MediaTek(R) Secure digital and Multimedia card Interface.
+	  If you have a machine with a integrated SD/MMC card reader, say Y or M here.
+	  This is needed if support for any SD/SDIO/MMC devices is required.
+	  If unsure, say N.
+
 endif
 
 config TEGRA124_MMC_DISABLE_EXT_LOOPBACK

index 23c5b0d..801a26d 100644
@@ -65,3 +65,4 @@ obj-$(CONFIG_MMC_SUNXI)			+= sunxi_mmc.o
 obj-$(CONFIG_MMC_UNIPHIER)		+= tmio-common.o uniphier-sd.o
 obj-$(CONFIG_RENESAS_SDHI)		+= tmio-common.o renesas-sdhi.o
 obj-$(CONFIG_MMC_BCM2835)		+= bcm2835_sdhost.o
+obj-$(CONFIG_MMC_MTK)			+= mtk-sd.o

1.9.1

Add an entry for MediaTek.

---
 MAINTAINERS | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

index 6147a4f..f3b4f95 100644
@@ -157,6 +157,24 @@ T:	git git://git.denx.de/u-boot-pxa.git
 F:	arch/arm/cpu/pxa/
 F:	arch/arm/include/asm/arch-pxa/
 
+ARM MEDIATEK
+M:	Ryder Lee <[email protected]>
+M:	Weijie Gao <[email protected]>
+S:	Maintained
+F:	arch/arm/mach-mediatek/
+F:	arch/arm/include/asm/arch-mediatek/
+F:	board/mediatek/
+F:	drivers/clk/mediatek/
+F:	drivers/mmc/mtk-sd.c
+F:	drivers/pinctrl/mediatek/
+F:	drivers/power/domain/mtk-power-domain.c
+F:	drivers/ram/mediatek/
+F:	drivers/spi/mtk_qspi.c
+F:	drivers/timer/mtk_timer.c
+F:	drivers/watchdog/mtk_wdt.c
+F:	tools/mtkimage.c
+N:	mediatek
+
 ARM OWL
 M:	Manivannan Sadhasivam <[email protected]>
 S:	Maintained

1.9.1

I'm very happy to see Mediatek working on mainline u-boot support!

I think reference board support is already added in 2/20. AFAICS you just device tree and the includes it needs.

[...]

[...]

No, I didn't pass dtb in my tests. I just let them independent.

I'm not sure either. If we decide to pass the U-boot dtb to kernel I will modify the string in v1. A related question is that we rely on the fallback compatible "mediatek,mt6577-*" for timer, wdt, and other common IPs, but obviously, we didn't have MT6577 support in U-boot. That's why I pick a generic name for timer and WDT.

Also, I directly use "ns16500a" as compatible for uart in U-boot.

Moreover, I think/guess the DTS is hard to share with kernel as there are many properties don't support in U-boot stage.

Ryder

Sure, I will fix it. Thanks for catching that.

mt7623_rfb

[...]

[...]

[...]

[...]

I tried the series on my bananapi-r2 and I was able to boot into the kernel:

Will fix new blank line here and there.

Thanks,
Ryder

OK, we'll write another version base spi-mem.
Thanks.

Hi Jagan,

I saw fsl_qspi.c also use flash commands to distinguish operations for different setting.

Due to controller IP's design, Flash register access is different from data access for our controller IP, it has to set specific controller's registers for specific operation.
It seems that spi-mem will not handle this issue, it's specific controller's business.

About read flash register and read data,
Could you give some suggestions about how to distinguish these two kinds of ops?
so that we can do properly setting for controller.

Could we implement this driver without considering 0x65/0x71 flash command those that will have address parameters?
And it seems that, Uboot will not use quad read or dual read?

BR,

Guochun