NanoPC-T4 (and a bit of NanoPi M4) support
Subsystems (2)
v2 cover NanoPC-T4 (and a bit of NanoPi M4) support
Hi all,
With the initial patch now queued (thankfully solving the version-number conundrum), here's an updated v2 of my further changes with the tweaks Heiko pointed out. Comparing GRF dumps didn't give any insight into the SD card thing, so I've kept the GPIO patch; ~100 interrupts per insertion is still more useful than 0!
Robin.
Robin Murphy (4):
arm64: dts: rockchip: Add DT for NanoPi M4
arm64: dts: rockchip: Refine nanopi4 differences
arm64: dts: rockchip: Add NanoPC-T4 IR receiver
arm64: dts: rockchip: 'Fix' nanopi4 uSD card detect
.../devicetree/bindings/arm/rockchip.yaml | 6 +- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3399-nanopc-t4.dts | 74 +++++++++++++++++++ .../boot/dts/rockchip/rk3399-nanopi-m4.dts | 66 +++++++++++++++++ .../boot/dts/rockchip/rk3399-nanopi4.dtsi | 74 ++++--------------- 5 files changed, 158 insertions(+), 63 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts
Signature · 1 line
2.20.1.dirty
PATCH v2 1/4 arm64: dts: rockchip: Add DT for NanoPi M4
There are a number of subtle differences between the nanopi4 variants, and where they disagree, the common DTSI currently follows the details of NanoPi M4. In order to improve matters even more, let's add a separate DTS for the M4 to which we can start splitting things out appropriately. The third variant, NanoPi NEO4, is a lot closer to the M4 than either is to the larger T4, so arguably could get away with just sharing the M4 DT for now (plus I have neither of the smaller boards to actually test with).
---
v2: Fix the copy-paste binding thinko
.../devicetree/bindings/arm/rockchip.yaml | 6 ++++-- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3399-nanopi-m4.dts | 18 ++++++++++++++++++ 3 files changed, 23 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts
Documentation/devicetree/bindings/arm/rockchip.yaml +4 -2
@@ -87,9 +87,11 @@ properties: - const: firefly,roc-rk3399-pc - const: rockchip,rk3399 - - description: FriendlyElec NanoPC-T4 + - description: FriendlyElec NanoPi4 series boards items: - - const: friendlyarm,nanopc-t4 + - enum: + - friendlyarm,nanopc-t4 + - friendlyarm,nanopi-m4 - const: rockchip,rk3399 - description: GeekBuying GeekBox
arch/arm64/boot/dts/rockchip/Makefile +1 -0
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts new file +18 -0
@@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * FriendlyElec NanoPi M4 board device tree source + * + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyarm.com) + * + * Copyright (c) 2018 Collabora Ltd. + * Copyright (c) 2019 Arm Ltd. + */ + +/dts-v1/; +#include "rk3399-nanopi4.dtsi" + +/ { + model = "FriendlyElec NanoPi M4"; + compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399"; +};
Signature · 1 line
2.20.1.dirty
PATCH v2 2/4 arm64: dts: rockchip: Refine nanopi4 differences
In reply to Robin MurphyThe nanopi4 boards differ primarily in their power trees, with the main 5V and 3.3V rails having very different topologies on the smaller USB-C powered boards vs. the 12V-powered T4, as well as minor variation in other regulators related to various external connectors.
Additionally, the recovery key is only present on the T4 - ADC_IN1 is simply pulled high and not exposed on the other boards - and the lowest common denominator for MMC speed is actually HS200 according to the vendor DTs.
---
v2: No change
.../boot/dts/rockchip/rk3399-nanopc-t4.dts | 58 +++++++++++++++++++ .../boot/dts/rockchip/rk3399-nanopi-m4.dts | 48 +++++++++++++++ .../boot/dts/rockchip/rk3399-nanopi4.dtsi | 55 +----------------- 3 files changed, 107 insertions(+), 54 deletions(-)
arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts +58 -0
@@ -14,4 +14,62 @@ / { model = "FriendlyElec NanoPC-T4"; compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399"; + + vcc12v0_sys: vcc12v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <12000000>; + regulator-min-microvolt = <12000000>; + regulator-name = "vcc12v0_sys"; + }; + + vcc5v0_host0: vcc5v0-host0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host0"; + vin-supply = <&vcc5v0_sys>; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + recovery { + label = "Recovery"; + linux,code = <KEY_VENDOR>; + press-threshold-microvolt = <18000>; + }; + }; +}; + +&sdhci { + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; +}; + +&u2phy0_host { + phy-supply = <&vcc5v0_host0>; +}; + +&u2phy1_host { + phy-supply = <&vcc5v0_host0>; +}; + +&vcc5v0_sys { + vin-supply = <&vcc12v0_sys>; +}; + +&vcc3v3_sys { + vin-supply = <&vcc12v0_sys>; +}; + +&vbus_typec { + enable-active-high; + gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; };
arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts +48 -0
52 lines not on this page · raw message
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +1 -54
100 lines not on this page · raw message
Signature · 1 line
2.20.1.dirty
PATCH v2 3/4 arm64: dts: rockchip: Add NanoPC-T4 IR receiver
In reply to Robin MurphyIn common with most Rockchip reference designs, NanoPC-T4 has a passive IR receiver connected to PWM3. In lieu of a specialised driver for PWM-based IR pulse measurement, running the pin as a GPIO with the basic driver works perfectly well.
---
v2: No change
.../arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts +16 -0
@@ -45,6 +45,22 @@ press-threshold-microvolt = <18000>; }; }; + + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx>; + }; +}; + +&pinctrl { + ir { + ir_rx: ir-rx { + /* external pullup to VCC3V3_SYS, despite being 1.8V :/ */ + rockchip,pins = <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>; + }; + }; }; &sdhci {
Signature · 1 line
2.20.1.dirty
PATCH v2 4/4 arm64: dts: rockchip: 'Fix' nanopi4 uSD card detect
In reply to Robin MurphyFor whatever reason, the sdmmc_dectn function isn't working properly as-is, and microSD insertion and removal goes unnoticed. Using the pin as a GPIO interrupt instead is rather noisy without any debouncing, but is good enough to make it useful until someone feels inclined to figure out how the vendor kernel/firmware gets the dedicated function to work with no obvious difference in the pinmux/GRF configuration. Let's also take the opportunity to tweak the node name so that all related pins end up grouped together in the compiled DTB.
---
v2: Clean up ordering
.../boot/dts/rockchip/rk3399-nanopi4.dtsi | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-)
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +12 -7
@@ -501,17 +501,21 @@ }; }; - sd { - sdmmc0_pwr_h: sdmmc0-pwr-h { - rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - sdio-pwrseq { wifi_reg_on_h: wifi-reg_on-h { rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + sdmmc { + sdmmc0_det_l: sdmmc0-det-l { + rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + sdmmc0_pwr_h: sdmmc0-pwr-h { + rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pmu_io_domains {
@@ -563,9 +567,10 @@ bus-width = <4>; cap-sd-highspeed; cap-mmc-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; disable-wp; pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_bus4 &sdmmc_cd &sdmmc_clk &sdmmc_cmd>; + pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; sd-uhs-sdr104; vmmc-supply = <&vcc3v0_sd>; vqmmc-supply = <&vcc_sdio>;
Signature · 1 line
2.20.1.dirty
Re: [PATCH v2 1/4] arm64: dts: rockchip: Add DT for NanoPi M4
In reply to Robin MurphyQuoted 14 lines · Robin Murphy
There are a number of subtle differences between the nanopi4 variants, and where they disagree, the common DTSI currently follows the details of NanoPi M4. In order to improve matters even more, let's add a separate DTS for the M4 to which we can start splitting things out appropriately. The third variant, NanoPi NEO4, is a lot closer to the M4 than either is to the larger T4, so arguably could get away with just sharing the M4 DT for now (plus I have neither of the smaller boards to actually test with).
CC Rob Herring <[email protected]>CC Mark Rutland <[email protected]>Signed-off-by Robin Murphy <[email protected]>---
Quoted 8 lines
v2: Fix the copy-paste binding thinko
.../devicetree/bindings/arm/rockchip.yaml | 6 ++++-- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3399-nanopi-m4.dts | 18 ++++++++++++++++++ 3 files changed, 23 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts
Heiko Stuebner
maintainerAm Montag, 14. Januar 2019, 13:05:30 CET schrieb Robin Murphy:
Quoted 8 lines
Hi all,
With the initial patch now queued (thankfully solving the version-number conundrum), here's an updated v2 of my further changes with the tweaks Heiko pointed out. Comparing GRF dumps didn't give any insight into the SD card thing, so I've kept the GPIO patch; ~100 interrupts per insertion is still more useful than 0!
Quoted 8 lines
Robin.
Robin Murphy (4):
arm64: dts: rockchip: Add DT for NanoPi M4
arm64: dts: rockchip: Refine nanopi4 differences
arm64: dts: rockchip: Add NanoPC-T4 IR receiver
arm64: dts: rockchip: 'Fix' nanopi4 uSD card detect
queued all 4 for 5.1
Thanks
Heiko