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mt76: mt76x02: run mt76x02_edcca_init atomically in mt76_edcca_set

PATCH Applied Lorenzo Bianconi 2 participants 2 messages May 11, 2019 – Jun 7, 2019 1 message not in the archive

Subsystems (2)
Arm MediaTek MediaTek MT76 wireless LAN driver
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A message that is not in the archive (sent off-list or not yet received): [email protected]

Lorenzo Bianconi

author maintainer
#1 lore raw

PATCH v2 4/4 mt76: mt76x02: run mt76x02_edcca_init atomically in mt76_edcca_set

Run mt76x02_edcca_init atomically in mt76_edcca_set since it runs concurrently with calibration work and mt76x2_set_channel. Moreover perform phy calibration atomically

Signed-off-by Lorenzo Bianconi <[email protected]>
---
 drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c | 4 ++++
 drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c  | 6 ++++++
 drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c  | 5 +++++
 3 files changed, 15 insertions(+)
drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c +4 -0
index 7853078e8ca4..f412c779d8e2 100644
@@ -122,11 +122,15 @@ mt76_edcca_set(void *data, u64 val)
 	struct mt76x02_dev *dev = data;
 	enum nl80211_dfs_regions region = dev->dfs_pd.region;
 
+	mutex_lock(&dev->mt76.mutex);
+
 	dev->ed_monitor_enabled = !!val;
 	dev->ed_monitor = dev->ed_monitor_enabled &&
 			  region == NL80211_DFS_ETSI;
 	mt76x02_edcca_init(dev);
 
+	mutex_unlock(&dev->mt76.mutex);
+
 	return 0;
 }
drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c +6 -0
index 7a39a390a7ac..2edf1bd0c18c 100644
@@ -294,10 +294,16 @@ void mt76x2_phy_calibrate(struct work_struct *work)
 	struct mt76x02_dev *dev;
 
 	dev = container_of(work, struct mt76x02_dev, cal_work.work);
+
+	mutex_lock(&dev->mt76.mutex);
+
 	mt76x2_phy_channel_calibrate(dev, false);
 	mt76x2_phy_tssi_compensate(dev);
 	mt76x2_phy_temp_compensate(dev);
 	mt76x2_phy_update_channel_gain(dev);
+
+	mutex_unlock(&dev->mt76.mutex);
+
 	ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
 				     MT_CALIBRATE_INTERVAL);
 }
drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c +5 -0
index c7208c5375ac..dfd54f9b0e97 100644
@@ -55,10 +55,15 @@ void mt76x2u_phy_calibrate(struct work_struct *work)
 	struct mt76x02_dev *dev;
 
 	dev = container_of(work, struct mt76x02_dev, cal_work.work);
+
+	mutex_lock(&dev->mt76.mutex);
+
 	mt76x2u_phy_channel_calibrate(dev, false);
 	mt76x2_phy_tssi_compensate(dev);
 	mt76x2_phy_update_channel_gain(dev);
 
+	mutex_unlock(&dev->mt76.mutex);
+
 	ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
 				     MT_CALIBRATE_INTERVAL);
 }
Signature · 1 line
2.20.1
maintainer Applied
#2 lore raw
Quoted 5 lines · Lorenzo Bianconi

Run mt76x02_edcca_init atomically in mt76_edcca_set since it runs concurrently with calibration work and mt76x2_set_channel. Moreover perform phy calibration atomically

Signed-off-by Lorenzo Bianconi <[email protected]>

Applied, thanks.

- Felix