clk: intel: Add a new driver for a new clock controller IP
Subsystems (2)
v3 cover clk: intel: Add a new driver for a new clock controller IP
Hi,
This series adds clock driver for Clock Generation Unit(CGU) of Lightning Mountain(LGM) SoC.
Patch 1 adds common clock framework based clock driver for CGU. Patch 2 adds bindings document & include file for CGU.
These patches are baselined upon Linux 5.5-rc1 at below Git link:
git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
v3:
- Address review concerns:
Add Kconfig entry in x86 folder instead of modifying clk/Kconfig. (Andy Shevchenko) Fix coding style/convention related concerns. (Andy Shevchenko) Improve description, licensing info, rename node name correctly in dt bindings document & remove CLK_NR_CLKS from dt-bindings header file. (Stephen Boyd) Fix a build warning reported by kbuild test robot & Nathan Chancellor
- Add few new clocks & rename few existing clocks.
- Add more ops for ddiv & divider clk_ops.
- Fix few minor bugs.
- Use CLK_IS_CRITICAL flag for clocks which shall never be disabled.
v2:
- Move the driver to x86 folder.
- Remove syscon usage.
- Remove regmap based access. Use direct readl()/write() instead. Add spinlocks.
- Change all enum values to capitals.
- Rename all data structures & functions from intel_* to lgm_*.
- Remove multiple header files. Keep only one header file.
- Make probe fail when any of the clk/pll registration fails.
- Fix few bugs with clk_init_data assignement.
- Address review concerns for code quality/style/convention.
v1:
- Initial version.
Rahul Tanwar (1):
dt-bindings: clk: intel: Add bindings document & header file for CGU
rtanwar (1):
clk: intel: Add CGU clock driver for a new SoC
.../devicetree/bindings/clock/intel,cgu-lgm.yaml | 40 ++ drivers/clk/Kconfig | 1 + drivers/clk/x86/Makefile | 1 + drivers/clk/x86/clk-cgu-pll.c | 189 ++++++ drivers/clk/x86/clk-cgu.c | 714 +++++++++++++++++++++ drivers/clk/x86/clk-cgu.h | 309 +++++++++ drivers/clk/x86/clk-lgm.c | 466 ++++++++++++++ include/dt-bindings/clock/intel,lgm-clk.h | 165 +++++ 8 files changed, 1885 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml create mode 100644 drivers/clk/x86/clk-cgu-pll.c create mode 100644 drivers/clk/x86/clk-cgu.c create mode 100644 drivers/clk/x86/clk-cgu.h create mode 100644 drivers/clk/x86/clk-lgm.c create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h
Signature · 1 line
2.11.0
PATCH v3 1/2 clk: intel: Add clock controller driver for a new SoC
From: rtanwar <[email protected]>
Clock Generation Unit(CGU) is a new clock controller IP of a forthcoming Intel network processor SoC. It provides programming interfaces to control & configure all CPU & peripheral clocks. Add common clock framework based clock controller driver for CGU.
--- drivers/clk/Kconfig | 1 + drivers/clk/x86/Makefile | 1 + drivers/clk/x86/clk-cgu-pll.c | 189 +++++++++++ drivers/clk/x86/clk-cgu.c | 714 ++++++++++++++++++++++++++++++++++++++++++ drivers/clk/x86/clk-cgu.h | 309 ++++++++++++++++++ drivers/clk/x86/clk-lgm.c | 466 +++++++++++++++++++++++++++ 6 files changed, 1680 insertions(+) create mode 100644 drivers/clk/x86/clk-cgu-pll.c create mode 100644 drivers/clk/x86/clk-cgu.c create mode 100644 drivers/clk/x86/clk-cgu.h create mode 100644 drivers/clk/x86/clk-lgm.c
drivers/clk/Kconfig +1 -0
@@ -338,6 +338,7 @@ source "drivers/clk/sunxi-ng/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" +source "drivers/clk/x86/Kconfig" source "drivers/clk/zynqmp/Kconfig" endmenu
drivers/clk/x86/Makefile +1 -0
@@ -3,3 +3,4 @@ obj-$(CONFIG_PMC_ATOM) += clk-pmc-atom.o obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-st.o clk-x86-lpss-objs := clk-lpt.o obj-$(CONFIG_X86_INTEL_LPSS) += clk-x86-lpss.o +obj-$(CONFIG_CLK_LGM_CGU) += clk-cgu.o clk-cgu-pll.o clk-lgm.o
drivers/clk/x86/clk-cgu-pll.c new file +189 -0
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drivers/clk/x86/clk-cgu.c new file +714 -0
714 lines not on this page · raw message
drivers/clk/x86/clk-cgu.h new file +309 -0
309 lines not on this page · raw message
drivers/clk/x86/clk-lgm.c new file +466 -0
466 lines not on this page · raw message
Signature · 1 line
2.11.0
PATCH v3 2/2 dt-bindings: clk: intel: Add bindings document & header file for a new clock driver
In reply to Rahul TanwarClock generation unit(CGU) is a clock controller IP of Intel's Lightning Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock controller driver of LGM.
--- .../devicetree/bindings/clock/intel,cgu-lgm.yaml | 40 +++++ include/dt-bindings/clock/intel,lgm-clk.h | 165 +++++++++++++++++++++ 2 files changed, 205 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h
Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml new file +40 -0
@@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/intel,cgu-lgm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain SoC's Clock Controller(CGU) Binding + +maintainers: + - Rahul Tanwar <[email protected]> + +description: | + Lightning Mountain(LGM) SoC's Clock Generation Unit(CGU) driver provides + all means to access the CGU hardware module in order to generate a series + of clocks for the whole system and individual peripherals. + +properties: + compatible: + const: intel,cgu-lgm + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +examples: + - | + cgu: clock-controller@e0200000 { + compatible = "intel,cgu-lgm"; + reg = <0xe0200000 0x33c>; + #clock-cells = <1>; + }; + +...
include/dt-bindings/clock/intel,lgm-clk.h new file +165 -0
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Signature · 1 line
2.11.0
Re: [PATCH v3 2/2] dt-bindings: clk: intel: Add bindings document & header file for a new clock driver
Quoted 18 lines · Rahul Tanwar
Clock generation unit(CGU) is a clock controller IP of Intel's Lightning Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock controller driver of LGM.
Signed-off-by Rahul Tanwar <[email protected]>--- .../devicetree/bindings/clock/intel,cgu-lgm.yaml | 40 +++++ include/dt-bindings/clock/intel,lgm-clk.h | 165 +++++++++++++++++++++ 2 files changed, 205 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml create mode 100644 include/dt-bindings/clock/intel,lgm-clk.hDocumentation/devicetree/bindings/clock/intel,cgu-lgm.yaml new file +0
-0
Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml line 4
Quoted 4 lines
Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml new file +4
-0@@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/intel,cgu-lgm.yaml#
Drop 'bindings'
With that,