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arm64: dts: qcom: sc7180: Add support for ETMv4 PM and skipping power up.

PATCH In review Sai Prakash Ranjan 2 participants 8 messages May 15, 2020 – Jun 9, 2020

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#0 lore raw

cover arm64: dts: qcom: sc7180: Add support for ETMv4 PM and skipping power up.

Patch 1 is a resend of https://lore.kernel.org/patchwork/patch/1230367/ since that patch seems to have added the property to replicator node instead of etm7 node either when the patch was applied to the tree.

Patch 2 adds support to skip powering up of ETM to workaround the hardware errata where CPU watchdog counter is stopped when power up bit is set. Depends on https://lore.kernel.org/patchwork/cover/1242100/ changes.

Sai Prakash Ranjan (2):
arm64: dts: qcom: sc7180: Support ETMv4 power management
arm64: dts: qcom: sc7180: Add support to skip powering up of ETM

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#1 lore raw

PATCH 1/2 arm64: dts: qcom: sc7180: Support ETMv4 power management

Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states.

---

Resending this because the last patch sent here - https://lore.kernel.org/patchwork/patch/1230367/
seems to have added "coresight-loses-context-with-cpu" to
replicator node instead of etm7 node.

---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/sc7180.dtsi +8 -0
index 4069bb1c93af..8b3707347547 100644
@@ -1656,6 +1656,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1674,6 +1675,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1692,6 +1694,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1710,6 +1713,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1728,6 +1732,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1746,6 +1751,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1764,6 +1770,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1782,6 +1789,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#2 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Support ETMv4 power management

Hi Bjorn,

Quoted 80 lines · Sai Prakash Ranjan

Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states.

---

Resending this because the last patch sent here -
https://lore.kernel.org/patchwork/patch/1230367/
seems to have added "coresight-loses-context-with-cpu" to replicator node instead of etm7 node.

---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/sc7180.dtsi +7 -0
index 4069bb1c93af..8b3707347547 100644
@@ -1656,6 +1656,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1674,6 +1675,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1692,6 +1694,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1710,6 +1713,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1728,6 +1732,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1746,6 +1751,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1764,6 +1770,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

arch/arm64/boot/dts/qcom/sc7180.dtsi line 1795

Quoted 7 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi +1 -0
@@ -1782,6 +1789,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?

Thanks,
Sai

Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#3 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Support ETMv4 power management

Quoted 2 lines · Sai Prakash Ranjan

Hi Bjorn,

Hi Sai,

Quoted 86 lines · Sai Prakash Ranjan
Quoted 85 lines

Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states.

---

Resending this because the last patch sent here -
https://lore.kernel.org/patchwork/patch/1230367/
seems to have added "coresight-loses-context-with-cpu" to replicator node instead of etm7 node.

---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/sc7180.dtsi +8 -0
index 4069bb1c93af..8b3707347547 100644
@@ -1656,6 +1656,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1674,6 +1675,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1692,6 +1694,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1710,6 +1713,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1728,6 +1732,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1746,6 +1751,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1764,6 +1770,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
@@ -1782,6 +1789,7 @@
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
+			arm,coresight-loses-context-with-cpu;
 
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7180.dtsi line 1795

Quoted 2 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi +0 -0
 			out-ports {
 				port {

The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?

I'm not able to replace the old commit without rewriting the history of the branch. So I've applied a patch ontop of the branch to fix this up instead.

Please review the branch and let me know if there's any issues.

Regards,
Bjorn

#4 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Support ETMv4 power management

Hi Bjorn,

Quoted 1 line · Bjorn Andersson

On Fri 15 May 03:55 PDT 2020, Sai Prakash Ranjan wrote:

[...]

Quoted 7 lines
Quoted 6 lines

The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?

Quoted 6 lines

I'm not able to replace the old commit without rewriting the history of the branch. So I've applied a patch ontop of the branch to fix this up instead.

Please review the branch and let me know if there's any issues.

Thanks for the patch, I checked the branch and its good. Sorry, I should have sent a patch on top of the old one instead of repost.

Thanks,
Sai

Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#5 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Support ETMv4 power management

Quoted 19 lines · Sai Prakash Ranjan

Hi Bjorn,

Quoted 1 line · Bjorn Andersson

On Fri 15 May 03:55 PDT 2020, Sai Prakash Ranjan wrote:

[...]

Quoted 12 lines
Quoted 7 lines

The previous version of this patch in QCOM tree seems to have added the
property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?

I'm not able to replace the old commit without rewriting the history of the branch. So I've applied a patch ontop of the branch to fix this up instead.

Quoted 7 lines
Quoted 2 lines

Please review the branch and let me know if there's any issues.

Thanks for the patch, I checked the branch and its good. Sorry, I should have sent a patch on top of the old one instead of repost.

No worries, now you know for next time. Thanks confirming my fix.

Thanks,
Bjorn

#6 lore raw

PATCH 2/2 arm64: dts: qcom: sc7180: Add support to skip powering up of ETM

In reply to Sai Prakash Ranjan

Add "qcom,skip-power-up" property to skip powering up ETM on SC7180 SoC to workaround a hardware errata where CPU watchdog counter is stopped when ETM power up bit is set (i.e., when TRCPDCR.PU = 1).

---

Depends on ETM driver change here - https://lore.kernel.org/patchwork/cover/1242100/

---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/sc7180.dtsi +8 -0
index 8b3707347547..de4bae4ec224 100644
@@ -1657,6 +1657,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1676,6 +1677,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1695,6 +1697,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1714,6 +1717,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1733,6 +1737,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1752,6 +1757,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1771,6 +1777,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1790,6 +1797,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#7 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: sc7180: Add support to skip powering up of ETM

Hi Bjorn,

Quoted 77 lines · Sai Prakash Ranjan

Add "qcom,skip-power-up" property to skip powering up ETM on SC7180 SoC to workaround a hardware errata where CPU watchdog counter is stopped when ETM power up bit is set (i.e., when TRCPDCR.PU = 1).

---

Depends on ETM driver change here -
https://lore.kernel.org/patchwork/cover/1242100/

---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/sc7180.dtsi +7 -0
index 8b3707347547..de4bae4ec224 100644
@@ -1657,6 +1657,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1676,6 +1677,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1695,6 +1697,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1714,6 +1717,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1733,6 +1737,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1752,6 +1757,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {
@@ -1771,6 +1777,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {

arch/arm64/boot/dts/qcom/sc7180.dtsi line 1803

Quoted 7 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi +1 -0
@@ -1790,6 +1797,7 @@
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";
 			arm,coresight-loses-context-with-cpu;
+			qcom,skip-power-up;
 
 			out-ports {
 				port {

I have sent this patch as a part of other coresight changes to keep all coresight DT changes together[1], we can drop this patch now.

[1] - https://lore.kernel.org/patchwork/cover/1253969/

Thanks,
Sai

Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation