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dmaengine: idxd: IDXD pmu support

PATCH Superseded Tom Zanussi 2 participants 3 messages Apr 2, 2021

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#0 lore raw

cover dmaengine: idxd: IDXD pmu support

Hi,

This patchset implements initial pmu support for the Intel DSA (Data Streaming Accelerator [1]), which I'm hoping can go into 5.13.

I'm also hoping to supply a couple follow-on patches in the near future, but I'm not yet sure how much sense they make, so I thought I'd throw a couple ideas out there and maybe get some opinions before going forward with them:

- The perf userspace interface for this isn't exactly user-friedly, in that you currently need to specify numeric values for field values:

# perf stat -e dsa0/filter_wq=0x1,filter_tc=0x1,filter_sz=0x7,
filter_eng=0x1,event=0x8,event_category=0x3/

It would be nicer to be able to specify those values symbolically instead, and the way to do that seems to be via some JSON files in perf userspace.

- Some of the DSA pmu support is patterned after existing uncore code, and there seems to be at least some opportunity to consolidate some of the things they both do into common code, such as the cpumask device attributes and related cpu hotplug support. At this point I'm not sure how much sense it makes to put any effort into that, but would be willing to try if there would be some interest in it, especially considering there will probably be future pmu support added that could benefit from it.

Thanks,

Tom

[1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html

Tom Zanussi (1):
dmaengine: idxd: Add IDXD performance monitor support

 drivers/dma/Kconfig          |  13 +
 drivers/dma/idxd/Makefile    |   2 +
 drivers/dma/idxd/idxd.h      |  45 +++
 drivers/dma/idxd/init.c      |   9 +
 drivers/dma/idxd/irq.c       |   5 +-
 drivers/dma/idxd/perfmon.c   | 661 +++++++++++++++++++++++++++++++++++
 drivers/dma/idxd/perfmon.h   | 119 +++++++
 drivers/dma/idxd/registers.h | 108 ++++++
 include/linux/cpuhotplug.h   |   1 +
 9 files changed, 959 insertions(+), 4 deletions(-)
 create mode 100644 drivers/dma/idxd/perfmon.c
 create mode 100644 drivers/dma/idxd/perfmon.h
Signature · 1 line
2.17.1
#1 lore raw

PATCH 1/1 dmaengine: idxd: Add IDXD performance monitor support

Enable the IDXD performance monitor capability (named 'perfmon' in the DSA (Data Streaming Accelerator) spec [1]), which supports the collection of information about key events occurring during DSA and IAX (Intel Analytics Accelerator) device execution, to assist in performance tuning and debugging.

The idxd perfmon support is implemented as part of the IDXD driver and interfaces with the Linux perf framework. It has several features in common with the existing uncore pmu support:

- it does not support sampling
- does not support per-thread counting

However it also has some unique features not present in the core and uncore support:

- all general-purpose counters are identical, thus no event constraints
- operation is always system-wide

While the core perf subsystem assumes that all counters are by default per-cpu, the uncore pmus are socket-scoped and use a cpu mask to restrict counting to one cpu from each socket. IDXD counters use a similar strategy but expand the scope even further; since IDXD counters are system-wide and can be read from any cpu, the IDXD perf driver picks a single cpu to do the work (with cpu hotplug notifiers to choose a different cpu if the chosen one is taken off-line).

More specifically, the perf userspace tool by default opens a counter for each cpu for an event. However, if it finds a cpumask file associated with the pmu under sysfs, as is the case with the uncore pmus, it will open counters only on the cpus specified by the cpumask. Since perfmon only needs to open a single counter per event for a given IDXD device, the perfmon driver will create a sysfs cpumask file for the device and insert the first cpu of the system into it. When a user uses perf to open an event, perf will open a single counter on the cpu specified by the cpu mask. This amounts to the default system-wide rather than per-cpu counting mentioned previously for perfmon pmu events. In order to keep the cpu mask up-to-date, the driver implements cpu hotplug support for multiple devices, as IDXD usually enumerates and registers more than one idxd device.

The perfmon driver implements basic perfmon hardware capability discovery and configuration, and is initialized by the IDXD driver's probe function. During initialization, the driver retrieves the total number of supported performance counters, the pmu ID, and the device type from idxd device, and registers itself under the Linux perf framework.

The perf userspace tool can be used to monitor single or multiple events depending on the given configuration, as well as event groups, which are also supported by the perfmon driver. The user configures events using the perf tool command-line interface by specifying the event and corresponding event category, along with an optional set of filters that can be used to restrict counting to specific work queues, traffic classes, page and transfer sizes, and engines (See [1] for specifics).

With the configuration specified by the user, the perf tool issues a system call passing that information to the kernel, which uses it to initialize the specified event(s). The event(s) are opened and started, and following termination of the perf command, they're stopped. At that point, the perfmon driver will read the latest count for the event(s), calculate the difference between the latest counter values and previously tracked counter values, and display the final incremental count as the event count for the cycle. An overflow handler registered on the IDXD irq path is used to account for counter overflows, which are signaled by an overflow interrupt.

Below are a couple of examples of perf usage for monitoring DSA events.

The following monitors all events in the 'engine' category. Becuuse no filters are specified, this captures all engine events for the workload, which in this case is 19 iterations of the work generated by the kernel dmatest module.

Details describing the events can be found in Appendix D of [1], Performance Monitoring Events, but briefly they are:

  event 0x1:  total input data processed, in 32-byte units
  event 0x2:  total data written, in 32-byte units
  event 0x4:  number of work descriptors that read the source
  event 0x8:  number of work descriptors that write the destination

event 0x10: number of work descriptors dispatched from batch descriptors event 0x20: number of work descriptors dispatched from work queues

 # perf stat -e dsa0/event=0x1,event_category=0x1/,
                dsa0/event=0x2,event_category=0x1/,
		dsa0/event=0x4,event_category=0x1/,
		dsa0/event=0x8,event_category=0x1/,
		dsa0/event=0x10,event_category=0x1/,
		dsa0/event=0x20,event_category=0x1/
		  modprobe dmatest channel=dma0chan0 timeout=2000
		  iterations=19 run=1 wait=1
     Performance counter stats for 'system wide':

                 5,332      dsa0/event=0x1,event_category=0x1/
                 5,327      dsa0/event=0x2,event_category=0x1/
                    19      dsa0/event=0x4,event_category=0x1/
                    19      dsa0/event=0x8,event_category=0x1/
                     0      dsa0/event=0x10,event_category=0x1/
                    19      dsa0/event=0x20,event_category=0x1/

          21.977436186 seconds time elapsed

The command below illustrates filter usage with a simple example. It specifies that MEM_MOVE operations should be counted for the DSA device dsa0 (event 0x8 corresponds to the EV_MEM_MOVE event - Number of Memory Move Descriptors, which is part of event category 0x3 - Operations. The detailed category and event IDs are available in Appendix D, Performance Monitoring Events, of [1]). In addition to the event and event category, a number of filters are also specified (the detailed filter values are available in Chapter 6.4 (Filter Support) of [1]), which will restrict counting to only those events that meet all of the filter criteria. In this case, the filters specify that only MEM_MOVE operations that are serviced by work queue wq0 and specifically engine number engine0 and traffic class tc0 having sizes between 0 and 4k and page size of between 0 and 1G result in a counter hit; anything else will be filtered out and not appear in the final count. Note that filters are optional - any filter not specified is assumed to be all ones and will pass anything.

 # perf stat -e dsa0/filter_wq=0x1,filter_tc=0x1,filter_sz=0x7,
                filter_eng=0x1,event=0x8,event_category=0x3/
		  modprobe dmatest channel=dma0chan0 timeout=2000
		  iterations=19 run=1 wait=1
     Performance counter stats for 'system wide':

       19      dsa0/filter_wq=0x1,filter_tc=0x1,filter_sz=0x7,
               filter_eng=0x1,event=0x8,event_category=0x3/

          21.865914091 seconds time elapsed

The output above reflects that the unspecified workload resulted in the counting of 19 MEM_MOVE operation events that met the filter criteria.

[1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html

[ Based on work originally by Jing Lin. ]

---
 drivers/dma/Kconfig          |  13 +
 drivers/dma/idxd/Makefile    |   2 +
 drivers/dma/idxd/idxd.h      |  45 +++
 drivers/dma/idxd/init.c      |   9 +
 drivers/dma/idxd/irq.c       |   5 +-
 drivers/dma/idxd/perfmon.c   | 661 +++++++++++++++++++++++++++++++++++
 drivers/dma/idxd/perfmon.h   | 119 +++++++
 drivers/dma/idxd/registers.h | 108 ++++++
 include/linux/cpuhotplug.h   |   1 +
 9 files changed, 959 insertions(+), 4 deletions(-)
 create mode 100644 drivers/dma/idxd/perfmon.c
 create mode 100644 drivers/dma/idxd/perfmon.h
drivers/dma/Kconfig +13 -0
index 0c2827fd8c19..fa945420e346 100644
@@ -300,6 +300,19 @@ config INTEL_IDXD_SVM
 	depends on PCI_PASID
 	depends on PCI_IOV
 
+config INTEL_IDXD_PERFMON
+	bool "Intel Data Accelerators performance monitor support"
+	depends on INTEL_IDXD
+	default y
+	help
+	  Enable performance monitor (pmu) support for the Intel(R)
+	  data accelerators present in Intel Xeon CPU.  With this
+	  enabled, perf can be used to monitor the DSA (Intel Data
+	  Streaming Accelerator) events described in the Intel DSA
+	  spec.
+
+	  If unsure, say N.
+
 config INTEL_IOATDMA
 	tristate "Intel I/OAT DMA support"
 	depends on PCI && X86_64
drivers/dma/idxd/Makefile +2 -0
index 8978b898d777..6d11558756f8 100644
@@ -1,2 +1,4 @@
 obj-$(CONFIG_INTEL_IDXD) += idxd.o
 idxd-y := init.o irq.o device.o sysfs.o submit.o dma.o cdev.o
+
+idxd-$(CONFIG_INTEL_IDXD_PERFMON) += perfmon.o
drivers/dma/idxd/idxd.h +45 -0

73 lines not on this page · raw message

drivers/dma/idxd/init.c +9 -0
index 085a0c3b62c6..e117d30c97ce 100644
@@ -21,6 +21,7 @@
 #include "../dmaengine.h"
 #include "registers.h"
 #include "idxd.h"
+#include "perfmon.h"
 
 MODULE_VERSION(IDXD_DRIVER_VERSION);
 MODULE_LICENSE("GPL v2");
@@ -378,6 +379,10 @@ static int idxd_probe(struct idxd_device *idxd)
 
 	idxd->major = idxd_cdev_get_major(idxd);
 
+	rc = perfmon_pmu_init(idxd);
+	if (rc < 0)
+		dev_warn(dev, "Failed to initialize perfmon. No PMU support: %d\n", rc);
+
 	dev_dbg(dev, "IDXD device %d probed successfully\n", idxd->id);
 	return 0;
 
@@ -522,6 +527,7 @@ static void idxd_remove(struct pci_dev *pdev)
 	idxd_shutdown(pdev);
 	if (device_pasid_enabled(idxd))
 		idxd_disable_system_pasid(idxd);
+	perfmon_pmu_remove(idxd);
 	mutex_lock(&idxd_idr_lock);
 	idr_remove(&idxd_idrs[idxd->type], idxd->id);
 	mutex_unlock(&idxd_idr_lock);
@@ -556,6 +562,8 @@ static int __init idxd_init_module(void)
 	for (i = 0; i < IDXD_TYPE_MAX; i++)
 		idr_init(&idxd_idrs[i]);
 
+	perfmon_init();
+
 	err = idxd_register_bus_type();
 	if (err < 0)
 		return err;
@@ -589,5 +597,6 @@ static void __exit idxd_exit_module(void)
 	pci_unregister_driver(&idxd_pci_driver);
 	idxd_cdev_remove();
 	idxd_unregister_bus_type();
+	perfmon_exit();
 }
 module_exit(idxd_exit_module);
drivers/dma/idxd/irq.c +1 -4
index a60ca11a5784..bb2f4f5f66ec 100644
@@ -163,11 +163,8 @@ static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
 	}
 
 	if (cause & IDXD_INTC_PERFMON_OVFL) {
-		/*
-		 * Driver does not utilize perfmon counter overflow interrupt
-		 * yet.
-		 */
 		val |= IDXD_INTC_PERFMON_OVFL;
+		perfmon_counter_overflow(idxd);
 	}
 
 	val ^= cause;
drivers/dma/idxd/perfmon.c new file +661 -0

661 lines not on this page · raw message

drivers/dma/idxd/perfmon.h new file +119 -0

119 lines not on this page · raw message

drivers/dma/idxd/registers.h +108 -0

112 lines not on this page · raw message

include/linux/cpuhotplug.h +1 -0
index f14adb882338..264d911424c0 100644
@@ -167,6 +167,7 @@ enum cpuhp_state {
 	CPUHP_AP_PERF_X86_RAPL_ONLINE,
 	CPUHP_AP_PERF_X86_CQM_ONLINE,
 	CPUHP_AP_PERF_X86_CSTATE_ONLINE,
+	CPUHP_AP_PERF_X86_IDXD_ONLINE,
 	CPUHP_AP_PERF_S390_CF_ONLINE,
 	CPUHP_AP_PERF_S390_CFD_ONLINE,
 	CPUHP_AP_PERF_S390_SF_ONLINE,
Signature · 1 line
2.17.1
#2 lore raw

Re: [PATCH 1/1] dmaengine: idxd: Add IDXD performance monitor support

Thank you for the patch! Perhaps something to improve:

Hi Tom,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on linux/master linus/master v5.12-rc5 next-20210401] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Tom-Zanussi/dmaengine-idxd-IDXD-pmu-support/20210403-005240
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/ef9587b8e4ebe37a46d89b14ed68fb321e33242f
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Tom-Zanussi/dmaengine-idxd-IDXD-pmu-support/20210403-005240
        git checkout ef9587b8e4ebe37a46d89b14ed68fb321e33242f
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate

All warnings (new ones prefixed by >>):

drivers/dma/idxd/perfmon.c: In function 'perfmon_pmu_event_init':

>> drivers/dma/idxd/perfmon.c:192:17: warning: variable 'dev' set but not used [-Wunused-but-set-variable]
     192 |  struct device *dev;
         |                 ^~~
   drivers/dma/idxd/perfmon.c: In function 'perfmon_pmu_read_counter':
   drivers/dma/idxd/perfmon.c:228:17: warning: variable 'dev' set but not used [-Wunused-but-set-variable]
     228 |  struct device *dev;
         |                 ^~~
   drivers/dma/idxd/perfmon.c: In function 'perfmon_pmu_event_start':
   drivers/dma/idxd/perfmon.c:325:17: warning: variable 'dev' set but not used [-Wunused-but-set-variable]
     325 |  struct device *dev;
         |                 ^~~
>> drivers/dma/idxd/perfmon.c:323:19: warning: variable 'idxd_pmu' set but not used [-Wunused-but-set-variable]
     323 |  struct idxd_pmu *idxd_pmu;
         |                   ^~~~~~~~

vim +/dev +192 drivers/dma/idxd/perfmon.c

188
189 static int perfmon_pmu_event_init(struct perf_event *event)
190 {
191 struct idxd_device *idxd;

 > 192		struct device *dev;
   193		int ret = 0;
   194	
   195		idxd = event_to_idxd(event);
   196		dev = &idxd->pdev->dev;
   197		event->hw.idx = -1;
   198	
   199		if (event->attr.type != event->pmu->type)
   200			return -ENOENT;
   201	
   202		/* sampling not supported */
   203		if (event->attr.sample_period)
   204			return -EINVAL;
   205	
   206		if (event->cpu < 0)
   207			return -EINVAL;
   208	
   209		if (event->pmu != &idxd->idxd_pmu->pmu)
   210			return -EINVAL;
   211	
   212		event->hw.event_base = ioread64(PERFMON_TABLE_OFFSET(idxd));
   213		event->cpu = idxd->idxd_pmu->cpu;
   214		event->hw.config = event->attr.config;
   215	
   216		if (event->group_leader != event)
   217			 /* non-group events have themselves as leader */
   218			ret = perfmon_validate_group(idxd->idxd_pmu, event);
   219	
   220		return ret;
   221	}
   222	
   223	static inline u64 perfmon_pmu_read_counter(struct perf_event *event)
   224	{
   225		struct hw_perf_event *hwc = &event->hw;
   226		struct idxd_device *idxd;
   227		int cntr = hwc->idx;
   228		struct device *dev;
   229		u64 cntrdata;
   230	
   231		idxd = event_to_idxd(event);
   232		dev = &idxd->pdev->dev;
   233	
   234		cntrdata = ioread64(CNTRDATA_REG(idxd, cntr));
   235	
   236		return cntrdata;
   237	}
   238	
   239	static void perfmon_pmu_event_update(struct perf_event *event)
   240	{
   241		struct idxd_device *idxd = event_to_idxd(event);
   242		u64 prev_raw_count, new_raw_count, delta, p, n;
   243		int shift = 64 - idxd->idxd_pmu->counter_width;
   244		struct hw_perf_event *hwc = &event->hw;
   245	
   246		do {
   247			prev_raw_count = local64_read(&hwc->prev_count);
   248			new_raw_count = perfmon_pmu_read_counter(event);
   249		} while (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
   250				new_raw_count) != prev_raw_count);
   251	
   252		n = (new_raw_count << shift);
   253		p = (prev_raw_count << shift);
   254	
   255		delta = ((n - p) >> shift);
   256	
   257		local64_add(delta, &event->count);
   258	}
   259	
   260	void perfmon_counter_overflow(struct idxd_device *idxd)
   261	{
   262		int i, n_counters, max_loop = OVERFLOW_SIZE;
   263		struct perf_event *event;
   264		unsigned long ovfstatus;
   265	
   266		n_counters = min(idxd->idxd_pmu->n_counters, OVERFLOW_SIZE);
   267	
   268		ovfstatus = ioread32(OVFSTATUS_REG(idxd));
   269	
   270		/*
   271		 * While updating overflowed counters, other counters behind
   272		 * them could overflow and be missed in a given pass.
   273		 * Normally this could happen at most n_counters times, but in
   274		 * theory a tiny counter width could result in continual
   275		 * overflows and endless looping.  max_loop provides a
   276		 * failsafe in that highly unlikely case.
   277		 */
   278		while (ovfstatus && max_loop--) {
   279			/* Figure out which counter(s) overflowed */
   280			for_each_set_bit(i, &ovfstatus, n_counters) {
   281				/* Update event->count for overflowed counter */
   282				event = idxd->idxd_pmu->event_list[i];
   283				perfmon_pmu_event_update(event);
   284				clear_bit(i, &ovfstatus);
   285				iowrite32(ovfstatus, OVFSTATUS_REG(idxd));
   286			}
   287	
   288			ovfstatus = ioread32(OVFSTATUS_REG(idxd));
   289		}
   290	
   291		/*
   292		 * Should never happen.  If so, it means a counter(s) looped
   293		 * around twice while this handler was running.
   294		 */
   295		WARN_ON_ONCE(ovfstatus);
   296	}
   297	
   298	static inline void perfmon_reset_config(struct idxd_device *idxd)
   299	{
   300		iowrite32(CONFIG_RESET, PERFRST_REG(idxd));
   301		iowrite32(0, OVFSTATUS_REG(idxd));
   302		iowrite32(0, PERFFRZ_REG(idxd));
   303	}
   304	
   305	static inline void perfmon_reset_counters(struct idxd_device *idxd)
   306	{
   307		iowrite32(CNTR_RESET, PERFRST_REG(idxd));
   308	}
   309	
   310	static inline void perfmon_reset(struct idxd_device *idxd)
   311	{
   312		perfmon_reset_config(idxd);
   313		perfmon_reset_counters(idxd);
   314	}
   315	
   316	static void perfmon_pmu_event_start(struct perf_event *event, int mode)
   317	{
   318		u32 flt_wq, flt_tc, flt_pg_sz, flt_xfer_sz, flt_eng = 0;
   319		u64 cntr_cfg, cntrdata, event_enc, event_cat = 0;
   320		struct hw_perf_event *hwc = &event->hw;
   321		union filter_cfg flt_cfg;
   322		union event_cfg event_cfg;
 > 323		struct idxd_pmu *idxd_pmu;

324 struct idxd_device *idxd;
325 struct device *dev;
326 int cntr;
327
328 idxd_pmu = event_to_pmu(event);
329 idxd = event_to_idxd(event);
330 dev = &idxd->pdev->dev;
331
332 event->hw.idx = hwc->idx;
333 cntr = hwc->idx;
334
335 /* Obtain event category and event value from user space */
336 event_cfg.val = event->attr.config;
337 flt_cfg.val = event->attr.config1;
338 event_cat = event_cfg.event_cat;
339 event_enc = event_cfg.event_enc;
340
341 /* Obtain filter configuration from user space */
342 flt_wq = flt_cfg.wq;
343 flt_tc = flt_cfg.tc;
344 flt_pg_sz = flt_cfg.pg_sz;
345 flt_xfer_sz = flt_cfg.xfer_sz;
346 flt_eng = flt_cfg.eng;
347
348 if (flt_wq && test_bit(FLT_WQ, &idxd->idxd_pmu->supported_filters))
349 iowrite32(flt_wq, FLTCFG_REG(idxd, cntr, FLT_WQ));
350 if (flt_tc && test_bit(FLT_TC, &idxd->idxd_pmu->supported_filters))
351 iowrite32(flt_tc, FLTCFG_REG(idxd, cntr, FLT_TC));
352 if (flt_pg_sz && test_bit(FLT_PG_SZ, &idxd->idxd_pmu->supported_filters))
353 iowrite32(flt_pg_sz, FLTCFG_REG(idxd, cntr, FLT_PG_SZ));
354 if (flt_xfer_sz && test_bit(FLT_XFER_SZ, &idxd->idxd_pmu->supported_filters))
355 iowrite32(flt_xfer_sz, FLTCFG_REG(idxd, cntr, FLT_XFER_SZ));
356 if (flt_eng && test_bit(FLT_ENG, &idxd->idxd_pmu->supported_filters))
357 iowrite32(flt_eng, FLTCFG_REG(idxd, cntr, FLT_ENG));
358
359 /* Read the start value */
360 cntrdata = ioread64(CNTRDATA_REG(idxd, cntr));
361 local64_set(&event->hw.prev_count, cntrdata);
362
363 /* Set counter to event/category */
364 cntr_cfg = event_cat << CNTRCFG_CATEGORY_SHIFT;
365 cntr_cfg |= event_enc << CNTRCFG_EVENT_SHIFT;
366 /* Set interrupt on overflow and counter enable bits */
367 cntr_cfg |= (CNTRCFG_IRQ_OVERFLOW | CNTRCFG_ENABLE);
368
369 iowrite64(cntr_cfg, CNTRCFG_REG(idxd, cntr));
370 }
371

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]