Add Ethernet DTS for Actions Semi Owl S500 SoCs

PATCH Superseded Cristian Ciocaltea 2 participants 8 messages Jun 10, 2021 – Jun 11, 2021

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Device tree bindings Arm/actions semi architecture

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Cristian Ciocaltea

author

2021-06-10 21:10 UTC #0 lore raw

cover Add Ethernet DTS for Actions Semi Owl S500 SoCs

This patchset adds the required DTS changes for providing the ethernet functionality on the Actions S500 SoCs family.

For the moment I have been able to test the Ethernet MAC on the RoseaplePi SBC only.

Also, please note the patches depend on some clock changes that are currently under review:
https://lore.kernel.org/lkml/[email protected]/

Thanks,
Cristi

Cristian Ciocaltea (2):
ARM: dts: owl-s500: Add ethernet support
ARM: dts: owl-s500-roseapplepi: Add ethernet support

 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 arch/arm/boot/dts/owl-s500.dtsi            | 10 ++++
 2 files changed, 66 insertions(+)

Signature · 1 line

2.32.0

Cristian Ciocaltea

author

2021-06-10 21:09 UTC #1 lore raw

PATCH 1/2 ARM: dts: owl-s500: Add ethernet support

Add Ethernet MAC device tree node for Actions Semi S500 SoC.

Signed-off-by Cristian Ciocaltea <[email protected]>

---
 arch/arm/boot/dts/owl-s500.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

arch/arm/boot/dts/owl-s500.dtsi +10 -0

index cd635f222d26..739b4b9cec8c 100644
@@ -324,5 +324,15 @@ mmc2: mmc@b0238000 {
 			dma-names = "mmc";
 			status = "disabled";
 		};
+
+		ethernet: ethernet@b0310000 {
+			compatible = "actions,s500-emac", "actions,owl-emac";
+			reg = <0xb0310000 0x10000>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_ETHERNET>, <&cmu CLK_RMII_REF>;
+			clock-names = "eth", "rmii";
+			resets = <&cmu RESET_ETHERNET>;
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.32.0

Manivannan Sadhasivam

maintainer Reviewed-by on v1 1/2

2021-06-11 06:00 UTC #2 lore raw

Re: [PATCH 1/2] ARM: dts: owl-s500: Add ethernet support

Quoted 3 lines · Cristian Ciocaltea

Add Ethernet MAC device tree node for Actions Semi S500 SoC.
Signed-off-by Cristian Ciocaltea <[email protected]>

Reviewed-by Manivannan Sadhasivam <[email protected]>

Thanks,
Mani

Quoted 27 lines

---
 arch/arm/boot/dts/owl-s500.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

arch/arm/boot/dts/owl-s500.dtsi +10 -0

index cd635f222d26..739b4b9cec8c 100644
@@ -324,5 +324,15 @@ mmc2: mmc@b0238000 {
 			dma-names = "mmc";
 			status = "disabled";
 		};
+
+		ethernet: ethernet@b0310000 {
+			compatible = "actions,s500-emac", "actions,owl-emac";
+			reg = <0xb0310000 0x10000>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_ETHERNET>, <&cmu CLK_RMII_REF>;
+			clock-names = "eth", "rmii";
+			resets = <&cmu RESET_ETHERNET>;
+			status = "disabled";
+		};
 	};
 };

Signature · 1 line

2.32.0

Cristian Ciocaltea

author

2021-06-10 21:09 UTC #3 lore raw

PATCH 2/2 ARM: dts: owl-s500-roseapplepi: Add ethernet support

In reply to Cristian Ciocaltea

Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi SBC. Additionally, provide the necessary properties for the generic S500 ethernet node in order to setup PHY and MDIO.

Signed-off-by Cristian Ciocaltea <[email protected]>

---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)

arch/arm/boot/dts/owl-s500-roseapplepi.dts +56 -0

index b8c5db2344aa..bffabc7eaa50 100644
@@ -225,6 +225,38 @@ bias1-pinconf {
 			bias-pull-down;
 		};
 	};
+
+	ethernet_pins: ethernet-pins {
+		txd01-pinmux {
+			groups = "rmii_txd0_mfp", "rmii_txd1_mfp";
+			function = "eth_rmii";
+		};
+
+		rxd01-pinmux {
+			groups = "rmii_rxd0_mfp", "rmii_rxd1_mfp";
+			function = "eth_rmii";
+		};
+
+		txen_rxer-pinmux {
+			groups = "rmii_txen_mfp", "rmii_rxen_mfp";
+			function = "eth_rmii";
+		};
+
+		crs_dv_ref_clk-pinmux {
+			groups = "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
+			function = "eth_rmii";
+		};
+
+		ref_clk-pinconf {
+			groups = "rmii_ref_clk_drv";
+			drive-strength = <2>;
+		};
+
+		phy_clk-pinmux {
+			groups = "clko_25m_mfp";
+			function = "clko_25m";
+		};
+	};
 };
 
 /* uSD */

@@ -241,6 +273,30 @@ &mmc0 {
 	vqmmc-supply = <&sd_vcc>;
 };
 
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet_pins>;
+	phy-mode = "rmii";
+	phy-handle = <&eth_phy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;
+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };

Signature · 1 line

2.32.0

Manivannan Sadhasivam

maintainer

2021-06-11 05:56 UTC #4 lore raw

Re: [PATCH 2/2] ARM: dts: owl-s500-roseapplepi: Add ethernet support

Quoted 27 lines · Cristian Ciocaltea

Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi SBC. Additionally, provide the necessary properties for the generic S500 ethernet node in order to setup PHY and MDIO.
Signed-off-by Cristian Ciocaltea <[email protected]>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)
arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0
index b8c5db2344aa..bffabc7eaa50 100644
@@ -225,6 +225,38 @@ bias1-pinconf {
 			bias-pull-down;
 		};
 	};
+
+	ethernet_pins: ethernet-pins {
+		txd01-pinmux {
+			groups = "rmii_txd0_mfp", "rmii_txd1_mfp";
+			function = "eth_rmii";
+		};
+
+		rxd01-pinmux {
+			groups = "rmii_rxd0_mfp", "rmii_rxd1_mfp";
+			function = "eth_rmii";

arch/arm/boot/dts/owl-s500-roseapplepi.dts bias1-pinconf { · line 247

Quoted 10 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0

+		};
+
+		txen_rxer-pinmux {
+			groups = "rmii_txen_mfp", "rmii_rxen_mfp";
+			function = "eth_rmii";
+		};
+
+		crs_dv_ref_clk-pinmux {
+			groups = "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
+			function = "eth_rmii";

Since the function is same, just club all the groups together.

arch/arm/boot/dts/owl-s500-roseapplepi.dts bias1-pinconf { · line 258

Quoted 11 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +11 -0

+		};
+
+		ref_clk-pinconf {
+			groups = "rmii_ref_clk_drv";
+			drive-strength = <2>;
+		};
+
+		phy_clk-pinmux {
+			groups = "clko_25m_mfp";
+			function = "clko_25m";
+		};

Move this above node pinconf.

Quoted 12 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +5 -0

+	};
 };
 
 /* uSD */

@@ -241,6 +273,30 @@ &mmc0 {
 	vqmmc-supply = <&sd_vcc>;
 };
 
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet_pins>;
+	phy-mode = "rmii";

arch/arm/boot/dts/owl-s500-roseapplepi.dts &mmc0 { · line 289

Quoted 10 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0

+	phy-handle = <&eth_phy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;

reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes please run the dtbs_check and try to address the warnings.

Thanks,
Mani

Quoted 16 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0

+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };

Signature · 1 line

2.32.0

Cristian Ciocaltea

author

2021-06-11 06:32 UTC #5 lore raw

Re: [PATCH 2/2] ARM: dts: owl-s500-roseapplepi: Add ethernet support

Quoted 32 lines · Manivannan Sadhasivam

Quoted 31 lines · Cristian Ciocaltea
Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi SBC. Additionally, provide the necessary properties for the generic S500 ethernet node in order to setup PHY and MDIO.
Signed-off-by Cristian Ciocaltea <[email protected]>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)
arch/arm/boot/dts/owl-s500-roseapplepi.dts +14 -0
index b8c5db2344aa..bffabc7eaa50 100644
@@ -225,6 +225,38 @@ bias1-pinconf {
 			bias-pull-down;
 		};
 	};
+
+	ethernet_pins: ethernet-pins {
+		txd01-pinmux {
+			groups = "rmii_txd0_mfp", "rmii_txd1_mfp";
+			function = "eth_rmii";
+		};
+
+		rxd01-pinmux {
+			groups = "rmii_rxd0_mfp", "rmii_rxd1_mfp";
+			function = "eth_rmii";
+		};
+
+		txen_rxer-pinmux {
+			groups = "rmii_txen_mfp", "rmii_rxen_mfp";

Quoted 8 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts bias1-pinconf { · line 247
Quoted 6 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +6 -0
+			function = "eth_rmii";
+		};
+
+		crs_dv_ref_clk-pinmux {
+			groups = "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
+			function = "eth_rmii";
Since the function is same, just club all the groups together.

Sure.

Quoted 5 lines

Quoted 5 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +5 -0
+		};
+
+		ref_clk-pinconf {
+			groups = "rmii_ref_clk_drv";
+			drive-strength = <2>;

Quoted 8 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts bias1-pinconf { · line 258
Quoted 6 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +6 -0
+		};
+
+		phy_clk-pinmux {
+			groups = "clko_25m_mfp";
+			function = "clko_25m";
+		};
Move this above node pinconf.

Ok.

Quoted 17 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0

+	};
 };
 
 /* uSD */

@@ -241,6 +273,30 @@ &mmc0 {
 	vqmmc-supply = <&sd_vcc>;
 };
 
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet_pins>;
+	phy-mode = "rmii";
+	phy-handle = <&eth_phy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;

Quoted 8 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts &mmc0 { · line 289
Quoted 5 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +5 -0
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;
reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes please run the dtbs_check and try to address the warnings.

The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml The dtbs_check doesn't report any issues in my case, usually this happens when dtschema is not updated to the latest version. I always run the following command after rebasing to a new kernel version:

  pip3 install --upgrade dtschema

Thanks for the review,
Cristi

Quoted 19 lines

Thanks,
Mani

Quoted 16 lines

arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0

+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };

Signature · 1 line

2.32.0

Manivannan Sadhasivam

maintainer

2021-06-11 06:39 UTC #6 lore raw

Re: [PATCH 2/2] ARM: dts: owl-s500-roseapplepi: Add ethernet support

Quoted 15 lines · Cristian Ciocaltea

Quoted 14 lines · Manivannan Sadhasivam
Quoted 13 lines · Cristian Ciocaltea
Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi SBC. Additionally, provide the necessary properties for the generic S500 ethernet node in order to setup PHY and MDIO.
Signed-off-by Cristian Ciocaltea <[email protected]>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)
arch/arm/boot/dts/owl-s500-roseapplepi.dts +0 -0
index b8c5db2344aa..bffabc7eaa50 100644

[...]

Quoted 11 lines

Quoted 10 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts &mmc0 { · line 289
Quoted 7 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +7 -0
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;
reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes please run the dtbs_check and try to address the warnings.

Quoted 1 line

The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml

Do you mean the reset properties are applicable for all PHYs in this SoC?

Quoted 6 lines

The dtbs_check doesn't report any issues in my case, usually this happens when dtschema is not updated to the latest version. I always run the following command after rebasing to a new kernel version:
  pip3 install --upgrade dtschema

That's good!

Thanks,
Mani

Quoted 22 lines

Thanks for the review,
Cristi
Quoted 19 lines
Thanks,
Mani
Quoted 16 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0
+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };
Signature · 1 line
2.32.0

Cristian Ciocaltea

author

2021-06-11 07:14 UTC #7 lore raw

Re: [PATCH 2/2] ARM: dts: owl-s500-roseapplepi: Add ethernet support

Quoted 30 lines · Manivannan Sadhasivam

Quoted 15 lines · Cristian Ciocaltea
Quoted 14 lines · Manivannan Sadhasivam
Quoted 13 lines · Cristian Ciocaltea
Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi SBC. Additionally, provide the necessary properties for the generic S500 ethernet node in order to setup PHY and MDIO.
Signed-off-by Cristian Ciocaltea <[email protected]>
---
 arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)
arch/arm/boot/dts/owl-s500-roseapplepi.dts +0 -0
index b8c5db2344aa..bffabc7eaa50 100644
[...]
Quoted 11 lines
Quoted 10 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts &mmc0 { · line 289
Quoted 7 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +7 -0
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <150000>;
reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes please run the dtbs_check and try to address the warnings.

Quoted 3 lines

Quoted 1 line
The properties are those described in Documentation/devicetree/bindings/net/mdio.yaml
Do you mean the reset properties are applicable for all PHYs in this SoC?

Actually there is only one PHY connected. I've also checked the vendor code and didn't notice any special handling for the PHY reset.

Quoted 34 lines

Quoted 6 lines
The dtbs_check doesn't report any issues in my case, usually this happens when dtschema is not updated to the latest version. I always run the following command after rebasing to a new kernel version:
  pip3 install --upgrade dtschema
That's good!
Thanks,
Mani
Quoted 22 lines
Thanks for the review,
Cristi
Quoted 19 lines
Thanks,
Mani
Quoted 16 lines
arch/arm/boot/dts/owl-s500-roseapplepi.dts +10 -0
+
+		eth_phy: ethernet-phy@3 {
+			reg = <0x3>;
+			max-speed = <100>;
+			interrupt-parent = <&sirq>;
+			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		};
+	};
+};
+
 &twd_timer {
 	status = "okay";
 };
Signature · 1 line
2.32.0