DT schema changes for HiKey970 PCIe hardware to work
Subsystems (6)
Device tree bindings PCI Generic PHY framework PCI native host bridge and endpoint drivers +2 more subsystems
v4 cover DT schema changes for HiKey970 PCIe hardware to work
Hi Rob,
It follows the DT bindings for Kirin 970 PCIE and its corresponding PHY, rebased on the top of next-20210803.
It should apply cleanly on the top of:
https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/log/?h=dt/next
Note: you mentioned that patch 1 was already applied, but it is not there yet. I opted to keep it at the tree, in case someone wants to apply this series on the top of linux-next.
v4:
- Rebased and fixed a merge conflict
v3:
- Fixed a comment on patch 3: The Ethernet controller is at lane 6.
v2:
- removed the DTS file. I'll submit it in separate, once having
everything else merged;
- it now doesn't produce any warnings with:
make DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml DT_CHECKER_FLAGS=-m dt_binding_check
- added the upstream node;
- the clock enable now uses a new property (hisilicon,clken-gpios);
- the reg for the PCI devices are now properly filled;
- the pcie@x,y nodes now match the port number from table 4-1 from the datasheet.
Mauro Carvalho Chehab (4):
dt-bindings: PCI: kirin: Fix compatible string
dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml
dt-bindings: PCI: kirin: Add support for Kirin970
dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
.../bindings/pci/hisilicon,kirin-pcie.yaml | 160 ++++++++++++++++++ .../devicetree/bindings/pci/kirin-pcie.txt | 50 ------ .../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +- .../phy/hisilicon,phy-hi3670-pcie.yaml | 82 +++++++++ MAINTAINERS | 2 +- 5 files changed, 244 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml delete mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
Signature · 8 lines
2.31.1 -- linux-phy mailing list [email protected] https://lists.infradead.org/mailman/listinfo/linux-phy
PATCH v4 1/4 dt-bindings: PCI: kirin: Fix compatible string
The pcie-kirin driver doesn't declare a hisilicon,kirin-pcie. Also, remove the useless comment after the description, as other compat will be supported by the same driver in the future.
Acked-by Rob Herring <[email protected]>
Signed-off-by Mauro Carvalho Chehab <[email protected]>
--- Documentation/devicetree/bindings/pci/kirin-pcie.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/pci/kirin-pcie.txt +2 -2
@@ -9,7 +9,7 @@ Additional properties are described here: Required properties - compatible: - "hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC + "hisilicon,kirin960-pcie" - reg: Should contain rc_dbi, apb, phy, config registers location and length. - reg-names: Must include the following entries: "dbi": controller configuration registers;
@@ -23,7 +23,7 @@ Optional properties: Example based on kirin960: pcie@f4000000 { - compatible = "hisilicon,kirin-pcie"; + compatible = "hisilicon,kirin960-pcie"; reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>, <0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>; reg-names = "dbi","apb","phy", "config";
Signature · 1 line
2.31.1
PATCH v4 2/4 dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml
In reply to Mauro Carvalho ChehabConvert the file into a JSON description at the yaml format.
Signed-off-by Mauro Carvalho Chehab <[email protected]>
--- .../bindings/pci/hisilicon,kirin-pcie.yaml | 86 +++++++++++++++++++ .../devicetree/bindings/pci/kirin-pcie.txt | 50 ----------- .../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +- MAINTAINERS | 2 +- 4 files changed, 88 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml delete mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt
Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml new file +86 -0
@@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/hisilicon,kirin-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon Kirin SoCs PCIe host DT description + +maintainers: + - Xiaowei Song <[email protected]> + - Binghui Wang <[email protected]> + +description: | + Kirin PCIe host controller is based on the Synopsys DesignWare PCI core. + It shares common functions with the PCIe DesignWare core driver and + inherits common properties defined in + Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. + +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + +properties: + compatible: + contains: + enum: + - hisilicon,kirin960-pcie + + reg: + description: | + Should contain dbi, apb, config registers location and length. + For HiKey960, it should also contain phy. + minItems: 3 + maxItems: 4 + + reg-names: + minItems: 3 + maxItems: 4 + +required: + - compatible + - reg + - reg-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/hi3660-clock.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie@f4000000 { + compatible = "hisilicon,kirin960-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000>, + <0x0 0xff3fe000 0x0 0x1000>, + <0x0 0xf3f20000 0x0 0x40000>, + <0x0 0xf5000000 0x0 0x2000>; + reg-names = "dbi", "apb", "phy", "config"; + bus-range = <0x0 0x1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0x0 0x00000000 + 0x0 0xf6000000 + 0x0 0x02000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupts = <0 283 4>; + interrupt-names = "msi"; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x0 0 0 1 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 2 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 3 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 4 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&crg_ctrl HI3660_PCIEPHY_REF>, + <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3660_ACLK_GATE_PCIE>; + clock-names = "pcie_phy_ref", "pcie_aux", "pcie_apb_phy", + "pcie_apb_sys", "pcie_aclk"; + }; + };
Documentation/devicetree/bindings/pci/kirin-pcie.txt deleted +0 -50
50 lines not on this page · raw message
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +1 -1
@@ -35,7 +35,7 @@ properties: maxItems: 5 items: enum: [ dbi, dbi2, config, atu, app, elbi, mgmt, ctrl, parf, cfg, link, - ulreg, smu, mpu ] + ulreg, smu, mpu, phy ] num-lanes: description: |
MAINTAINERS +1 -1
@@ -14474,7 +14474,7 @@ M: Xiaowei Song <[email protected]> M: Binghui Wang <[email protected]> L: [email protected] S: Maintained -F: Documentation/devicetree/bindings/pci/kirin-pcie.txt +F: Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml F: drivers/pci/controller/dwc/pcie-kirin.c PCIE DRIVER FOR HISILICON STB
Signature · 1 line
2.31.1
Re: [PATCH v4 2/4] dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml
Quoted 12 lines · Mauro Carvalho Chehab
Convert the file into a JSON description at the yaml format.
Signed-off-by Mauro Carvalho Chehab <[email protected]>--- .../bindings/pci/hisilicon,kirin-pcie.yaml | 86 +++++++++++++++++++ .../devicetree/bindings/pci/kirin-pcie.txt | 50 ----------- .../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +- MAINTAINERS | 2 +- 4 files changed, 88 insertions(+), 52 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml delete mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt
Applied, thanks!
PATCH v4 3/4 dt-bindings: PCI: kirin: Add support for Kirin970
In reply to Mauro Carvalho ChehabAdd a new compatible, plus the new bindings needed by HiKey970 board.
Signed-off-by Mauro Carvalho Chehab <[email protected]>
--- .../bindings/pci/hisilicon,kirin-pcie.yaml | 76 ++++++++++++++++++- 1 file changed, 75 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml +75 -1
@@ -24,11 +24,12 @@ properties: contains: enum: - hisilicon,kirin960-pcie + - hisilicon,kirin970-pcie reg: description: | Should contain dbi, apb, config registers location and length. - For HiKey960, it should also contain phy. + For hisilicon,kirin960-pcie, it should also contain phy. minItems: 3 maxItems: 4
@@ -36,6 +37,11 @@ properties: minItems: 3 maxItems: 4 + hisilicon,clken-gpios: + description: | + Clock input enablement GPIOs from PCI devices like Ethernet, M.2 and + mini-PCIe slots. + required: - compatible - reg
@@ -47,6 +53,7 @@ examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/hi3660-clock.h> + #include <dt-bindings/clock/hi3670-clock.h> soc { #address-cells = <2>;
@@ -83,4 +90,71 @@ examples: clock-names = "pcie_phy_ref", "pcie_aux", "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk"; }; + + pcie@f5000000 { + compatible = "hisilicon,kirin970-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000000>, + <0x0 0xfc180000 0x0 0x1000>, + <0x0 0xf5000000 0x0 0x2000>; + reg-names = "dbi", "apb", "config"; + bus-range = <0x0 0x1>; + msi-parent = <&its_pcie>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + phys = <&pcie_phy>; + ranges = <0x02000000 0x0 0x00000000 + 0x0 0xf6000000 + 0x0 0x02000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0x0 0 0 1 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 2 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 3 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 4 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; + reset-gpios = <&gpio7 0 0>; + hisilicon,clken-gpios = <&gpio27 3 0>, <&gpio17 0 0>, <&gpio20 6 0>; + + pcie@0 { // Lane 0: PCIe switch: Bus 1, Device 0 + reg = <0 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + pcie@1,0 { // Lane 4: M.2 + reg = <0x800 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + reset-gpios = <&gpio3 1 0>; + clkreq-gpios = <&gpio27 3 0 >; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + pcie@5,0 { // Lane 5: Mini PCIe + reg = <0x2800 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + reset-gpios = <&gpio27 4 0 >; + clkreq-gpios = <&gpio17 0 0 >; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + pcie@7,0 { // Lane 6: Ethernet + reg = <0x3800 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + reset-gpios = <&gpio25 2 0 >; + clkreq-gpios = <&gpio20 6 0 >; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + }; };
Signature · 1 line
2.31.1
Re: [PATCH v4 3/4] dt-bindings: PCI: kirin: Add support for Kirin970
Quoted 8 lines · Mauro Carvalho Chehab
Add a new compatible, plus the new bindings needed by HiKey970 board.
Signed-off-by Mauro Carvalho Chehab <[email protected]>--- .../bindings/pci/hisilicon,kirin-pcie.yaml | 76 ++++++++++++++++++- 1 file changed, 75 insertions(+), 1 deletion(-)
Applied, thanks!
PATCH v4 4/4 dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
In reply to Mauro Carvalho ChehabDocument the bindings for HiKey 970 (hi3670) PCIe PHY interface, supported via the pcie-kirin driver.
Signed-off-by Mauro Carvalho Chehab <[email protected]>
--- .../phy/hisilicon,phy-hi3670-pcie.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml new file +82 -0
@@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon Kirin970 PCIe PHY + +maintainers: + - Mauro Carvalho Chehab <[email protected]> + +description: |+ + Bindings for PCIe PHY on HiSilicon Kirin 970. + +properties: + compatible: + const: hisilicon,hi970-pcie-phy + + "#phy-cells": + const: 0 + + reg: + maxItems: 1 + description: PHY Control registers + + phy-supply: + description: The PCIe PHY power supply + + clocks: + items: + - description: PCIe PHY clock + - description: PCIe AUX clock + - description: PCIe APB PHY clock + - description: PCIe APB SYS clock + - description: PCIe ACLK clock + + clock-names: + items: + - const: phy_ref + - const: aux + - const: apb_phy + - const: apb_sys + - const: aclk + + hisilicon,eye-diagram-param: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: Eye diagram for phy. + +required: + - "#phy-cells" + - compatible + - reg + - clocks + - clock-names + - hisilicon,eye-diagram-param + - phy-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/hi3670-clock.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + pcie_phy: pcie-phy@fc000000 { + compatible = "hisilicon,hi970-pcie-phy"; + reg = <0x0 0xfc000000 0x0 0x80000>; + #phy-cells = <0>; + phy-supply = <&ldo33>; + clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>, + <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3670_ACLK_GATE_PCIE>; + clock-names = "phy_ref", "aux", + "apb_phy", "apb_sys", "aclk"; + hisilicon,eye-diagram-param = <0xffffffff 0xffffffff + 0xffffffff 0xffffffff 0xffffffff>; + }; + };
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2.31.1 -- linux-phy mailing list [email protected] https://lists.infradead.org/mailman/listinfo/linux-phy
Re: [PATCH v4 4/4] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
Quoted 9 lines · Mauro Carvalho Chehab
Document the bindings for HiKey 970 (hi3670) PCIe PHY interface, supported via the pcie-kirin driver.
Signed-off-by Mauro Carvalho Chehab <[email protected]>--- .../phy/hisilicon,phy-hi3670-pcie.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
Applied, thanks!
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