i915/i915_pm_rps: Add fence-order and engine-order subtests

PATCH In review Karolina Drobnik 3 participants 7 messages Jul 28, 2022

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Karolina Drobnik

author

2022-07-28 15:07 UTC #0 lore raw

cover i915/i915_pm_rps: Add fence-order and engine-order subtests

This series adds two tests that check if the iteration order of fences has an impact on applying waitboost. These regression tests make sure that the heuristic works as expected, no matter the order in which we wait on fences. For more background, see [1] and [2].

In addition to this, the patchset also includes a simple fix for pm_rps_exit_handler, added in preparation for multi-gt support and per-test sysfs files initialization.

Following the review comments, the initial patch was split up into two. So, this series is actually v5 of the "i915/i915_pm_rps: Check impact of fence ordering on waitboosting" patch. The previous versions can be seen at [3].

v5:
- Added missing close() calls on sysfs handle
- Extracted pm_rps_exit_handler change into a dedicated patch
v4:
- Added test descriptions with igt_describe()
v3:
- Removed unnecessary calls to gem_write
v2:
- Introduced batch_create() with arbitration points to prevent hangs
- Added engine-order subtest
- Added reporting of GPU frequency
- Changed runtimes and switched prints from us to ms

[1] - https://lore.kernel.org/intel-gfx/[email protected]/
[2] - https://gitlab.freedesktop.org/drm/intel/-/issues/6284
[3] - https://patchwork.freedesktop.org/patch/493954

Chris Wilson (2):
i915/i915_pm_rps: Check impact of fence ordering on waitboosting i915/i915_pm_rps: Write values in pm_rps_exit_handler only for min-max
configs

 tests/i915/i915_pm_rps.c | 265 ++++++++++++++++++++++++++++++++++++++-
 1 file changed, 259 insertions(+), 6 deletions(-)

--
2.25.1

Karolina Drobnik

author

2022-07-28 15:07 UTC #1 lore raw

PATCH 1/2 i915/i915_pm_rps: Check impact of fence ordering on waitboosting

From: Chris Wilson <[email protected]>

Currently the wait boost heuristic is evaluated at the start of each fence wait for a series within dma-resv. There is no strict ordering of fences defined by dma-resv, and so it turns out that the same operation under different circumstances can result in different heuristics being applied, and dramatic performance variations in user applications.

Link https://gitlab.freedesktop.org/drm/intel/-/issues/6284

Signed-off-by Chris Wilson <[email protected]>

Signed-off-by Karolina Drobnik <[email protected]>

---
 tests/i915/i915_pm_rps.c | 251 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 251 insertions(+)

tests/i915/i915_pm_rps.c +251 -0

index b37f15c2..0af46038 100644
@@ -37,8 +37,10 @@
 #include <sys/wait.h>
 
 #include "i915/gem.h"
+#include "i915/gem_create.h"
 #include "igt.h"
 #include "igt_dummyload.h"
+#include "igt_perf.h"
 #include "igt_sysfs.h"
 
 IGT_TEST_DESCRIPTION("Render P-States tests - verify GPU frequency changes");

@@ -614,6 +616,247 @@ static void waitboost(int fd, bool reset)
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 }
 
+static uint32_t batch_create(int i915, uint64_t sz)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	const uint32_t chk = 0x5 << 23;
+	uint32_t handle = gem_create(i915, sz);
+
+	for (uint64_t pg = 4096; pg + 4096 < sz; pg += 4096)
+		gem_write(i915, handle, pg, &chk, sizeof(chk));
+
+	gem_write(i915, handle, sz - sizeof(bbe), &bbe, sizeof(bbe));
+
+	return handle;
+}
+
+static uint64_t __fence_order(int i915,
+			      struct drm_i915_gem_exec_object2 *obj,
+			      struct drm_i915_gem_execbuffer2 *eb,
+			      uint64_t flags0, uint64_t flags1,
+			      double *outf)
+{
+	uint64_t before[2], after[2];
+	struct timespec tv;
+	int fd;
+
+	gem_quiescent_gpu(i915);
+	fd = perf_i915_open(i915, I915_PMU_ACTUAL_FREQUENCY);
+
+	igt_gettime(&tv);
+
+	obj->flags = flags0;
+	gem_execbuf(i915, eb);
+
+	obj->flags = flags1;
+	gem_execbuf(i915, eb);
+
+	read(fd, before, sizeof(before));
+	gem_sync(i915, obj->handle);
+	read(fd, after, sizeof(after));
+	close(fd);
+
+	after[0] -= before[0];
+	after[1] -= before[1];
+
+	*outf = 1e9 * after[0] / after[1];
+	return igt_nsec_elapsed(&tv);
+}
+
+static void fence_order(int i915)
+{
+	const uint64_t sz = 512ull << 20;
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		{ .handle = gem_create(i915, 4096) },
+		{ .handle = batch_create(i915, sz) },
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(obj),
+		.buffer_count = ARRAY_SIZE(obj),
+	};
+	uint64_t wr, rw;
+	int min, max;
+	double freq;
+	int sysfs;
+
+	/*
+	 * Check the order of fences found during GEM_WAIT does not affect
+	 * waitboosting.
+	 *
+	 * Internally, implicit fences are tracked within a dma-resv which
+	 * imposes no order on the individually fences tracked within. Since
+	 * there is no defined order, the sequence of waits (and the associated
+	 * waitboosts) is also undefined, undermining the consistency of the
+	 * waitboost heuristic.
+	 *
+	 * In particular, we can influence the sequence of fence storage
+	 * within dma-resv by mixing read/write semantics for implicit fences.
+	 * We can exploit this property of dma-resv to exercise that no matter
+	 * the stored order, the heuristic is applied consistently for the
+	 * user's GEM_WAIT ioctl.
+	 */
+
+	sysfs = igt_sysfs_open(i915);
+	min = igt_sysfs_get_u32(sysfs, "gt_RPn_freq_mhz");
+	max = igt_sysfs_get_u32(sysfs, "gt_RP0_freq_mhz");
+	igt_require(max > min);
+
+	/* Only allow ourselves to upclock via waitboosting */
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_boost_freq_mhz", "%d", max);
+
+	/* Warm up to bind the vma */
+	__fence_order(i915, &obj[0], &execbuf, 0, 0, &freq);
+
+	wr = __fence_order(i915, &obj[0], &execbuf, EXEC_OBJECT_WRITE, 0, &freq);
+	igt_info("Write-then-read: %.2fms @ %.3fMHz\n", wr * 1e-6, freq);
+
+	rw = __fence_order(i915, &obj[0], &execbuf, 0, EXEC_OBJECT_WRITE, &freq);
+	igt_info("Read-then-write: %.2fms @ %.3fMHz\n", rw * 1e-6, freq);
+
+	gem_close(i915, obj[0].handle);
+	gem_close(i915, obj[1].handle);
+
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", max);
+
+	close(sysfs);
+
+	igt_assert(4 * rw > 3 * wr && 4 * wr > 3 * rw);
+}
+
+static uint64_t __engine_order(int i915,
+			       struct drm_i915_gem_exec_object2 *obj,
+			       struct drm_i915_gem_execbuffer2 *eb,
+			       unsigned int *engines0,
+			       unsigned int *engines1,
+			       unsigned int num_engines,
+			       double *outf)
+{
+	uint64_t before[2], after[2];
+	struct timespec tv;
+	int fd;
+
+	gem_quiescent_gpu(i915);
+	fd = perf_i915_open(i915, I915_PMU_ACTUAL_FREQUENCY);
+
+	igt_gettime(&tv);
+
+	obj->flags = EXEC_OBJECT_WRITE;
+	for (unsigned int n = 0; n < num_engines; n++) {
+		eb->flags &= ~63ull;
+		eb->flags |= engines0[n];
+		gem_execbuf_wr(i915, eb);
+	}
+
+	obj->flags = 0;
+	for (unsigned int n = 0; n < num_engines; n++) {
+		eb->flags &= ~63ull;
+		eb->flags |= engines1[n];
+		gem_execbuf(i915, eb);
+	}
+
+	read(fd, before, sizeof(before));
+	gem_sync(i915, obj->handle);
+	read(fd, after, sizeof(after));
+	close(fd);
+
+	after[0] -= before[0];
+	after[1] -= before[1];
+
+	*outf = 1e9 * after[0] / after[1];
+	return igt_nsec_elapsed(&tv);
+}
+
+static void engine_order(int i915)
+{
+	const uint64_t sz = 512ull << 20;
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		{ .handle = gem_create(i915, 4096) },
+		{ .handle = batch_create(i915, sz) },
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(obj),
+		.buffer_count = ARRAY_SIZE(obj),
+	};
+	const struct intel_execution_engine2 *e;
+	unsigned int engines[2], reverse[2];
+	uint64_t forward, backward, both;
+	unsigned int num_engines;
+	const intel_ctx_t *ctx;
+	int min, max;
+	double freq;
+	int sysfs;
+
+	/*
+	 * Check the order of fences found during GEM_WAIT does not affect
+	 * waitboosting. (See fence_order())
+	 *
+	 * Another way we can manipulate the order of fences within the
+	 * dma-resv is through repeated use of the same contexts.
+	 */
+
+	num_engines = 0;
+	ctx = intel_ctx_create_all_physical(i915);
+	for_each_ctx_engine(i915, ctx, e) {
+		/*
+		 * Avoid using the cmdparser as it will try to allocate
+		 * a new shadow batch for each submission -> oom
+		 */
+		if (!gem_engine_has_mutable_submission(i915, e->class))
+			continue;
+
+		engines[num_engines++] = e->flags;
+		if (num_engines == ARRAY_SIZE(engines))
+			break;
+	}
+	igt_require(num_engines > 1);
+	for (unsigned int n = 0; n < num_engines; n++)
+		reverse[n] = engines[num_engines - n - 1];
+	execbuf.rsvd1 = ctx->id;
+
+	sysfs = igt_sysfs_open(i915);
+	min = igt_sysfs_get_u32(sysfs, "gt_RPn_freq_mhz");
+	max = igt_sysfs_get_u32(sysfs, "gt_RP0_freq_mhz");
+	igt_require(max > min);
+
+	/* Only allow ourselves to upclock via waitboosting */
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_boost_freq_mhz", "%d", max);
+
+	/* Warm up to bind the vma */
+	gem_execbuf(i915, &execbuf);
+
+	forward = __engine_order(i915, &obj[0], &execbuf,
+				 engines, engines, num_engines,
+				 &freq);
+	igt_info("Forwards: %.2fms @ %.3fMhz\n", forward * 1e-6, freq);
+
+	backward = __engine_order(i915, &obj[0], &execbuf,
+				  reverse, reverse, num_engines,
+				  &freq);
+	igt_info("Backwards: %.2fms @ %.3fMhz\n", backward * 1e-6, freq);
+
+	both = __engine_order(i915, &obj[0], &execbuf,
+			      engines, reverse, num_engines,
+			      &freq);
+	igt_info("Bidirectional: %.2fms @ %.3fMhz\n", both * 1e-6, freq);
+
+	gem_close(i915, obj[0].handle);
+	gem_close(i915, obj[1].handle);
+	intel_ctx_destroy(i915, ctx);
+
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", max);
+
+	close(sysfs);
+
+	igt_assert(4 * forward > 3 * backward && 4 * backward > 3 * forward);
+	igt_assert(4 * forward > 3 * both && 4 * both > 3 * forward);
+}
+
 static void pm_rps_exit_handler(int sig)
 {
 	if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {

@@ -683,6 +926,14 @@ igt_main
 	igt_subtest("waitboost")
 		waitboost(drm_fd, false);
 
+	igt_describe("Check if the order of fences does not affect waitboosting");
+	igt_subtest("fence-order")
+		fence_order(drm_fd);
+
+	igt_describe("Check if context reuse does not affect waitboosting");
+	igt_subtest("engine-order")
+		engine_order(drm_fd);
+
 	/* Test boost frequency after GPU reset */
 	igt_subtest("reset") {
 		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);

Signature · 1 line

2.25.1

Karolina Drobnik

author

2022-07-28 15:07 UTC #3 lore raw

PATCH 2/2 i915/i915_pm_rps: Write values in pm_rps_exit_handler only for min-max configs

In reply to Karolina Drobnik

From: Chris Wilson <[email protected]>

pm_rps_exit_handler writes min and max frequencies to the corresponding sysfs files. In a situation where each test initializes only specific handlers, it's possible that the exit handler will dereference a NULL value in MIN and MAX file handlers.

To prevent this, check if the exit handler is called by a subtest that initialized handlers to files describing frequency constraints.

Signed-off-by Chris Wilson <[email protected]>

Signed-off-by Karolina Drobnik <[email protected]>

---
 tests/i915/i915_pm_rps.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

tests/i915/i915_pm_rps.c +8 -6

index 0af46038..a45a6905 100644
@@ -859,12 +859,14 @@ static void engine_order(int i915)
 
 static void pm_rps_exit_handler(int sig)
 {
-	if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {
-		writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
-		writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
-	} else {
-		writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
-		writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
+	if (sysfs_files[MAX].filp) {
+		if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {
+			writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
+			writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
+		} else {
+			writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
+			writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
+		}
 	}
 
 	if (lh.igt_proc.running)

--
2.25.1

Kamil Konieczny

Reviewed-by on v1 1/2

2022-07-28 15:33 UTC #2 lore raw

Re: [igt-dev] [PATCH i-g-t 1/2] i915/i915_pm_rps: Check impact of fence ordering on waitboosting

In reply to Karolina Drobnik

Quoted 11 lines · Karolina Drobnik

From: Chris Wilson <[email protected]>
Currently the wait boost heuristic is evaluated at the start of each fence wait for a series within dma-resv. There is no strict ordering of fences defined by dma-resv, and so it turns out that the same operation under different circumstances can result in different heuristics being applied, and dramatic performance variations in user applications.
Link https://gitlab.freedesktop.org/drm/intel/-/issues/6284
Signed-off-by Chris Wilson <[email protected]>
Signed-off-by Karolina Drobnik <[email protected]>

Reviewed-by Kamil Konieczny <[email protected]>

Quoted 285 lines

---
 tests/i915/i915_pm_rps.c | 251 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 251 insertions(+)

tests/i915/i915_pm_rps.c +251 -0

index b37f15c2..0af46038 100644
@@ -37,8 +37,10 @@
 #include <sys/wait.h>
 
 #include "i915/gem.h"
+#include "i915/gem_create.h"
 #include "igt.h"
 #include "igt_dummyload.h"
+#include "igt_perf.h"
 #include "igt_sysfs.h"
 
 IGT_TEST_DESCRIPTION("Render P-States tests - verify GPU frequency changes");

@@ -614,6 +616,247 @@ static void waitboost(int fd, bool reset)
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 }
 
+static uint32_t batch_create(int i915, uint64_t sz)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	const uint32_t chk = 0x5 << 23;
+	uint32_t handle = gem_create(i915, sz);
+
+	for (uint64_t pg = 4096; pg + 4096 < sz; pg += 4096)
+		gem_write(i915, handle, pg, &chk, sizeof(chk));
+
+	gem_write(i915, handle, sz - sizeof(bbe), &bbe, sizeof(bbe));
+
+	return handle;
+}
+
+static uint64_t __fence_order(int i915,
+			      struct drm_i915_gem_exec_object2 *obj,
+			      struct drm_i915_gem_execbuffer2 *eb,
+			      uint64_t flags0, uint64_t flags1,
+			      double *outf)
+{
+	uint64_t before[2], after[2];
+	struct timespec tv;
+	int fd;
+
+	gem_quiescent_gpu(i915);
+	fd = perf_i915_open(i915, I915_PMU_ACTUAL_FREQUENCY);
+
+	igt_gettime(&tv);
+
+	obj->flags = flags0;
+	gem_execbuf(i915, eb);
+
+	obj->flags = flags1;
+	gem_execbuf(i915, eb);
+
+	read(fd, before, sizeof(before));
+	gem_sync(i915, obj->handle);
+	read(fd, after, sizeof(after));
+	close(fd);
+
+	after[0] -= before[0];
+	after[1] -= before[1];
+
+	*outf = 1e9 * after[0] / after[1];
+	return igt_nsec_elapsed(&tv);
+}
+
+static void fence_order(int i915)
+{
+	const uint64_t sz = 512ull << 20;
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		{ .handle = gem_create(i915, 4096) },
+		{ .handle = batch_create(i915, sz) },
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(obj),
+		.buffer_count = ARRAY_SIZE(obj),
+	};
+	uint64_t wr, rw;
+	int min, max;
+	double freq;
+	int sysfs;
+
+	/*
+	 * Check the order of fences found during GEM_WAIT does not affect
+	 * waitboosting.
+	 *
+	 * Internally, implicit fences are tracked within a dma-resv which
+	 * imposes no order on the individually fences tracked within. Since
+	 * there is no defined order, the sequence of waits (and the associated
+	 * waitboosts) is also undefined, undermining the consistency of the
+	 * waitboost heuristic.
+	 *
+	 * In particular, we can influence the sequence of fence storage
+	 * within dma-resv by mixing read/write semantics for implicit fences.
+	 * We can exploit this property of dma-resv to exercise that no matter
+	 * the stored order, the heuristic is applied consistently for the
+	 * user's GEM_WAIT ioctl.
+	 */
+
+	sysfs = igt_sysfs_open(i915);
+	min = igt_sysfs_get_u32(sysfs, "gt_RPn_freq_mhz");
+	max = igt_sysfs_get_u32(sysfs, "gt_RP0_freq_mhz");
+	igt_require(max > min);
+
+	/* Only allow ourselves to upclock via waitboosting */
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_boost_freq_mhz", "%d", max);
+
+	/* Warm up to bind the vma */
+	__fence_order(i915, &obj[0], &execbuf, 0, 0, &freq);
+
+	wr = __fence_order(i915, &obj[0], &execbuf, EXEC_OBJECT_WRITE, 0, &freq);
+	igt_info("Write-then-read: %.2fms @ %.3fMHz\n", wr * 1e-6, freq);
+
+	rw = __fence_order(i915, &obj[0], &execbuf, 0, EXEC_OBJECT_WRITE, &freq);
+	igt_info("Read-then-write: %.2fms @ %.3fMHz\n", rw * 1e-6, freq);
+
+	gem_close(i915, obj[0].handle);
+	gem_close(i915, obj[1].handle);
+
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", max);
+
+	close(sysfs);
+
+	igt_assert(4 * rw > 3 * wr && 4 * wr > 3 * rw);
+}
+
+static uint64_t __engine_order(int i915,
+			       struct drm_i915_gem_exec_object2 *obj,
+			       struct drm_i915_gem_execbuffer2 *eb,
+			       unsigned int *engines0,
+			       unsigned int *engines1,
+			       unsigned int num_engines,
+			       double *outf)
+{
+	uint64_t before[2], after[2];
+	struct timespec tv;
+	int fd;
+
+	gem_quiescent_gpu(i915);
+	fd = perf_i915_open(i915, I915_PMU_ACTUAL_FREQUENCY);
+
+	igt_gettime(&tv);
+
+	obj->flags = EXEC_OBJECT_WRITE;
+	for (unsigned int n = 0; n < num_engines; n++) {
+		eb->flags &= ~63ull;
+		eb->flags |= engines0[n];
+		gem_execbuf_wr(i915, eb);
+	}
+
+	obj->flags = 0;
+	for (unsigned int n = 0; n < num_engines; n++) {
+		eb->flags &= ~63ull;
+		eb->flags |= engines1[n];
+		gem_execbuf(i915, eb);
+	}
+
+	read(fd, before, sizeof(before));
+	gem_sync(i915, obj->handle);
+	read(fd, after, sizeof(after));
+	close(fd);
+
+	after[0] -= before[0];
+	after[1] -= before[1];
+
+	*outf = 1e9 * after[0] / after[1];
+	return igt_nsec_elapsed(&tv);
+}
+
+static void engine_order(int i915)
+{
+	const uint64_t sz = 512ull << 20;
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		{ .handle = gem_create(i915, 4096) },
+		{ .handle = batch_create(i915, sz) },
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(obj),
+		.buffer_count = ARRAY_SIZE(obj),
+	};
+	const struct intel_execution_engine2 *e;
+	unsigned int engines[2], reverse[2];
+	uint64_t forward, backward, both;
+	unsigned int num_engines;
+	const intel_ctx_t *ctx;
+	int min, max;
+	double freq;
+	int sysfs;
+
+	/*
+	 * Check the order of fences found during GEM_WAIT does not affect
+	 * waitboosting. (See fence_order())
+	 *
+	 * Another way we can manipulate the order of fences within the
+	 * dma-resv is through repeated use of the same contexts.
+	 */
+
+	num_engines = 0;
+	ctx = intel_ctx_create_all_physical(i915);
+	for_each_ctx_engine(i915, ctx, e) {
+		/*
+		 * Avoid using the cmdparser as it will try to allocate
+		 * a new shadow batch for each submission -> oom
+		 */
+		if (!gem_engine_has_mutable_submission(i915, e->class))
+			continue;
+
+		engines[num_engines++] = e->flags;
+		if (num_engines == ARRAY_SIZE(engines))
+			break;
+	}
+	igt_require(num_engines > 1);
+	for (unsigned int n = 0; n < num_engines; n++)
+		reverse[n] = engines[num_engines - n - 1];
+	execbuf.rsvd1 = ctx->id;
+
+	sysfs = igt_sysfs_open(i915);
+	min = igt_sysfs_get_u32(sysfs, "gt_RPn_freq_mhz");
+	max = igt_sysfs_get_u32(sysfs, "gt_RP0_freq_mhz");
+	igt_require(max > min);
+
+	/* Only allow ourselves to upclock via waitboosting */
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_boost_freq_mhz", "%d", max);
+
+	/* Warm up to bind the vma */
+	gem_execbuf(i915, &execbuf);
+
+	forward = __engine_order(i915, &obj[0], &execbuf,
+				 engines, engines, num_engines,
+				 &freq);
+	igt_info("Forwards: %.2fms @ %.3fMhz\n", forward * 1e-6, freq);
+
+	backward = __engine_order(i915, &obj[0], &execbuf,
+				  reverse, reverse, num_engines,
+				  &freq);
+	igt_info("Backwards: %.2fms @ %.3fMhz\n", backward * 1e-6, freq);
+
+	both = __engine_order(i915, &obj[0], &execbuf,
+			      engines, reverse, num_engines,
+			      &freq);
+	igt_info("Bidirectional: %.2fms @ %.3fMhz\n", both * 1e-6, freq);
+
+	gem_close(i915, obj[0].handle);
+	gem_close(i915, obj[1].handle);
+	intel_ctx_destroy(i915, ctx);
+
+	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%d", min);
+	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%d", max);
+
+	close(sysfs);
+
+	igt_assert(4 * forward > 3 * backward && 4 * backward > 3 * forward);
+	igt_assert(4 * forward > 3 * both && 4 * both > 3 * forward);
+}
+
 static void pm_rps_exit_handler(int sig)
 {
 	if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {

@@ -683,6 +926,14 @@ igt_main
 	igt_subtest("waitboost")
 		waitboost(drm_fd, false);
 
+	igt_describe("Check if the order of fences does not affect waitboosting");
+	igt_subtest("fence-order")
+		fence_order(drm_fd);
+
+	igt_describe("Check if context reuse does not affect waitboosting");
+	igt_subtest("engine-order")
+		engine_order(drm_fd);
+
 	/* Test boost frequency after GPU reset */
 	igt_subtest("reset") {
 		igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);

Signature · 1 line

2.25.1

Kamil Konieczny

Reviewed-by on v1 2/2

2022-07-28 15:34 UTC #4 lore raw

Re: [igt-dev] [PATCH i-g-t 2/2] i915/i915_pm_rps: Write values in pm_rps_exit_handler only for min-max configs

In reply to Karolina Drobnik

Quoted 7 lines · Karolina Drobnik

From: Chris Wilson <[email protected]>
pm_rps_exit_handler writes min and max frequencies to the corresponding sysfs files. In a situation where each test initializes only specific handlers, it's possible that the exit handler will dereference a NULL value in MIN and MAX file handlers.

Quoted 5 lines

To prevent this, check if the exit handler is called by a subtest that initialized handlers to files describing frequency constraints.
Signed-off-by Chris Wilson <[email protected]>
Signed-off-by Karolina Drobnik <[email protected]>

Reviewed-by Kamil Konieczny <[email protected]>

Quoted 31 lines

---
 tests/i915/i915_pm_rps.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

tests/i915/i915_pm_rps.c +8 -7

index 0af46038..a45a6905 100644
@@ -859,12 +859,14 @@ static void engine_order(int i915)
 
 static void pm_rps_exit_handler(int sig)
 {
-	if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {
-		writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
-		writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
-	} else {
-		writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
-		writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
+	if (sysfs_files[MAX].filp) {
+		if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {
+			writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
+			writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
+		} else {
+			writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
+			writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
+		}
 	}
 
 	if (lh.igt_proc.running)
--

2.25.1

Patchwork

2022-07-28 15:42 UTC #5 lore raw

[igt-dev] ✓ Fi.CI.BAT: success for i915/i915_pm_rps: Add fence-order and engine-order subtests

In reply to Karolina Drobnik

== Series Details ==

Series: i915/i915_pm_rps: Add fence-order and engine-order subtests
URL : https://patchwork.freedesktop.org/series/106815/
State : success

== Summary ==

CI Bug Log - changes from IGT_6603 -> IGTPW_7579
====================================================

Summary
-------

**SUCCESS**

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/index.html

Participating hosts (42 -> 39)
------------------------------

Additional (1): bat-rplp-1
Missing (4): fi-cml-u2 fi-bxt-dsi fi-ivb-3770 fi-bdw-samus

Known issues
------------

Here are the changes found in IGTPW_7579 that come from known issues:

### IGT changes ###

#### Issues hit ####

* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770: NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#111827])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/fi-hsw-4770/igt@[email protected]

#### Possible fixes ####

* igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}: [DMESG-WARN][2] ([i915#2867]) -> [PASS][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/bat-adlm-1/igt@gem_exec_suspend@[email protected]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/bat-adlm-1/igt@gem_exec_suspend@[email protected]

* igt@gem_ringfill@basic-all:
- {bat-dg2-9}: [FAIL][4] ([i915#5886]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/bat-dg2-9/igt@[email protected]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/bat-dg2-9/igt@[email protected]

* igt@i915_selftest@live@gt_pm:
- {bat-rpls-1}: [INCOMPLETE][6] -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/bat-rpls-1/igt@i915_selftest@live@gt_pm.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/bat-rpls-1/igt@i915_selftest@live@gt_pm.html

* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][8] ([i915#4785]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/fi-hsw-4770/igt@i915_selftest@[email protected]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/fi-hsw-4770/igt@i915_selftest@[email protected]

* igt@i915_suspend@basic-s3-without-i915:
- {bat-dg2-9}: [DMESG-WARN][10] ([i915#5763]) -> [PASS][11] +8 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/bat-dg2-9/igt@[email protected]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/bat-dg2-9/igt@[email protected]

* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka: [FAIL][12] ([i915#6298]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes
-------------

* CI: CI-20190529 -> None
* IGT: IGT_6603 -> IGTPW_7579

CI-20190529: 20190529
CI_DRM_11946: 0e9c43d76a145712da46e935d429ce2a3eea80e8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_7579: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/index.html
IGT_6603: d851d950cf805f3021d67666db67e24fae1b99ee @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

Testlist changes
----------------

+igt@i915_pm_rps@engine-order
+igt@i915_pm_rps@fence-order

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/index.html

Patchwork

2022-07-28 22:18 UTC #6 lore raw

[igt-dev] ✓ Fi.CI.IGT: success for i915/i915_pm_rps: Add fence-order and engine-order subtests

In reply to Karolina Drobnik

== Series Details ==

Series: i915/i915_pm_rps: Add fence-order and engine-order subtests
URL : https://patchwork.freedesktop.org/series/106815/
State : success

== Summary ==

CI Bug Log - changes from IGT_6603_full -> IGTPW_7579_full
====================================================

Summary
-------

**SUCCESS**

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/index.html

Participating hosts (7 -> 10)
------------------------------

Additional (3): shard-rkl shard-dg1 shard-tglu

Possible new issues
-------------------

Here are the unknown changes that may have been introduced in IGTPW_7579_full:

### IGT changes ###

#### Possible regressions ####

* {igt@i915_pm_rps@fence-order} (NEW):
- {shard-rkl}: NOTRUN -> [TIMEOUT][1] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-rkl-1/igt@[email protected]

#### Suppressed ####

The following results come from untrusted machines, tests, or statuses. They do not affect the overall result.

* igt@kms_sysfs_edid_timing:
- {shard-dg1}: NOTRUN -> [FAIL][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-dg1-15/igt@kms_sysfs_edid_timing.html

New tests
---------

New tests have been introduced between IGT_6603_full and IGTPW_7579_full:

### New IGT tests (2) ###

* igt@i915_pm_rps@engine-order:
- Statuses : 6 pass(s) 1 timeout(s)
- Exec time: [2.43, 120.89] s

* igt@i915_pm_rps@fence-order:
- Statuses : 8 pass(s) 1 timeout(s)
- Exec time: [1.49, 120.30] s

Known issues
------------

Here are the changes found in IGTPW_7579_full that come from known issues:

### IGT changes ###

#### Issues hit ####

* igt@dumb_buffer@create-clear:
- shard-kbl: [PASS][3] -> [INCOMPLETE][4] ([i915#6353])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-kbl1/igt@[email protected]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl6/igt@[email protected]

* igt@gem_ctx_persistence@engines-hostile:
- shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-snb2/igt@[email protected]

* igt@gem_ctx_sseu@engines:
- shard-tglb: NOTRUN -> [SKIP][6] ([i915#280]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb3/igt@[email protected]

* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#4525])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb4/igt@[email protected]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]

* igt@gem_exec_balancer@parallel-ordering:
- shard-tglb: NOTRUN -> [FAIL][9] ([i915#6117])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb2/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][10] ([i915#4525]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]
- shard-kbl: NOTRUN -> [FAIL][11] ([i915#6117])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl6/igt@[email protected]

* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#2846])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-glk9/igt@[email protected]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk5/igt@[email protected]

* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@gem_exec_fair@[email protected]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl2/igt@gem_exec_fair@[email protected]

* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][16] -> [FAIL][17] ([i915#2842])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-tglb6/igt@gem_exec_fair@[email protected]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb1/igt@gem_exec_fair@[email protected]

* igt@gem_lmem_swapping@heavy-verify-multi-ccs:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#4613])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb2/igt@[email protected]
- shard-glk: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk2/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][20] ([i915#4613])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]
- shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl6/igt@[email protected]

* igt@gem_lmem_swapping@parallel-random-engines:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#4613]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl8/igt@[email protected]

* igt@gem_pxp@create-regular-context-2:
- shard-tglb: NOTRUN -> [SKIP][23] ([i915#4270])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb2/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][24] ([i915#4270])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb6/igt@[email protected]

* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-iclb: NOTRUN -> [SKIP][25] ([i915#768])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb8/igt@[email protected]

* igt@gen7_exec_parse@cmd-crossing-page:
- shard-tglb: NOTRUN -> [SKIP][26] ([fdo#109289]) +2 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb8/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][27] ([fdo#109289]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb8/igt@[email protected]

* igt@gen9_exec_parse@basic-rejected-ctx-param:
- shard-snb: NOTRUN -> [SKIP][28] ([fdo#109271]) +134 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-snb4/igt@[email protected]

* igt@gen9_exec_parse@unaligned-access:
- shard-tglb: NOTRUN -> [SKIP][29] ([i915#2527] / [i915#2856]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb3/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][30] ([i915#2856]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]

* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#1937])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl3/igt@i915_pm_lpsp@[email protected]
- shard-kbl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#1937])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl6/igt@i915_pm_lpsp@[email protected]

* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- shard-glk: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#1937])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk9/igt@i915_pm_lpsp@[email protected]

* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-apl: NOTRUN -> [WARN][34] ([i915#6405])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl2/igt@i915_pm_rc6_residency@[email protected]

* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-iclb: NOTRUN -> [SKIP][35] ([fdo#109293] / [fdo#109506])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@[email protected]
- shard-tglb: NOTRUN -> [SKIP][36] ([fdo#109506] / [i915#2411])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb6/igt@[email protected]

* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][37] ([i915#5286]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb7/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][38] ([i915#5286]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb4/igt@[email protected]

* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][39] ([fdo#111614]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb5/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][40] ([fdo#110725] / [fdo#111614]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb1/igt@[email protected]

* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- shard-iclb: NOTRUN -> [SKIP][41] ([fdo#110723]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@[email protected]

* igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
- shard-kbl: NOTRUN -> [SKIP][42] ([fdo#109271]) +103 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl4/igt@[email protected]

* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglb: NOTRUN -> [SKIP][43] ([fdo#111615]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

* igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][44] ([fdo#111615] / [i915#3689]) +4 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb6/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html

* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-iclb: NOTRUN -> [SKIP][45] ([fdo#109278]) +16 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb4/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html

* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109278] / [i915#3886]) +2 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
- shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886]) +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl6/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html

* igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#3886]) +5 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl4/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

* igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][49] ([i915#3689] / [i915#6095]) +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb5/igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_dg2_rc_ccs.html

* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][50] ([i915#3689] / [i915#3886]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
- shard-glk: NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#3886]) +2 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk3/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

* igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][52] ([i915#3689]) +1 similar issue
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb1/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_gen12_mc_ccs.html

* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][53] ([i915#6095]) +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb1/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html

* igt@kms_chamelium@dp-hpd-for-each-pipe:
- shard-glk: NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +9 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk5/igt@[email protected]

* igt@kms_chamelium@hdmi-edid-change-during-suspend:
- shard-snb: NOTRUN -> [SKIP][55] ([fdo#109271] / [fdo#111827]) +8 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-snb6/igt@[email protected]

* igt@kms_chamelium@hdmi-mode-timings:
- shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +12 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl4/igt@[email protected]

* igt@kms_color_chamelium@pipe-b-ctm-0-5:
- shard-iclb: NOTRUN -> [SKIP][57] ([fdo#109284] / [fdo#111827]) +7 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb1/igt@[email protected]

* igt@kms_color_chamelium@pipe-b-ctm-negative:
- shard-tglb: NOTRUN -> [SKIP][58] ([fdo#109284] / [fdo#111827]) +8 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb3/igt@[email protected]

* igt@kms_color_chamelium@pipe-d-ctm-negative:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109278] / [fdo#109284] / [fdo#111827])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb6/igt@[email protected]
- shard-kbl: NOTRUN -> [SKIP][60] ([fdo#109271] / [fdo#111827]) +8 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl7/igt@[email protected]

* igt@kms_content_protection@legacy:
- shard-apl: NOTRUN -> [TIMEOUT][61] ([i915#1319]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl6/igt@[email protected]
- shard-tglb: NOTRUN -> [SKIP][62] ([i915#1063]) +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb3/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][63] ([fdo#109300] / [fdo#111066]) +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]
- shard-kbl: NOTRUN -> [TIMEOUT][64] ([i915#1319]) +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl1/igt@[email protected]

* igt@kms_content_protection@uevent:
- shard-kbl: NOTRUN -> [FAIL][65] ([i915#2105])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl4/igt@[email protected]

* igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1:
- shard-apl: NOTRUN -> [DMESG-WARN][66] ([i915#180])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl8/igt@kms_cursor_crc@[email protected]

* igt@kms_cursor_legacy@cursorb-vs-flipa@varying-size:
- shard-tglb: NOTRUN -> [SKIP][67] ([fdo#109274] / [fdo#111825]) +6 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb7/igt@kms_cursor_legacy@[email protected]

* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [PASS][68] -> [FAIL][69] ([i915#2346])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-glk8/igt@kms_cursor_legacy@[email protected]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk2/igt@kms_cursor_legacy@[email protected]

* igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-4tiled:
- shard-tglb: NOTRUN -> [SKIP][70] ([i915#5287])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb3/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][71] ([i915#5287])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb3/igt@[email protected]

* igt@kms_flip@2x-absolute-wf_vblank:
- shard-tglb: NOTRUN -> [SKIP][72] ([fdo#109274] / [fdo#111825] / [i915#3637] / [i915#3966])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb3/igt@kms_flip@2x-absolute-wf_vblank.html

* igt@kms_flip@2x-flip-vs-panning:
- shard-iclb: NOTRUN -> [SKIP][73] ([fdo#109274]) +11 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]

* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
- shard-tglb: NOTRUN -> [SKIP][74] ([fdo#109274] / [fdo#111825] / [i915#3637]) +3 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb1/igt@[email protected]

* igt@kms_flip@flip-vs-expired-vblank@b-dp1:
- shard-apl: [PASS][75] -> [FAIL][76] ([i915#79]) +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl6/igt@kms_flip@[email protected]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl1/igt@kms_flip@[email protected]

* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [PASS][77] -> [DMESG-WARN][78] ([i915#180]) +5 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-kbl4/igt@kms_flip@[email protected]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl4/igt@kms_flip@[email protected]

* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][79] ([i915#2672]) +8 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode.html

* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][80] ([i915#2672]) +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html

* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][81] ([fdo#109280]) +14 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html

* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271]) +79 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][83] ([i915#6497]) +4 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb2/igt@[email protected]

* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-tglb: NOTRUN -> [SKIP][84] ([fdo#109280] / [fdo#111825]) +14 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html

* igt@kms_hdr@bpc-switch@pipe-a-dp-1:
- shard-kbl: [PASS][85] -> [FAIL][86] ([i915#1188])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-kbl1/igt@kms_hdr@[email protected]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl7/igt@kms_hdr@[email protected]

* igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][87] ([i915#265])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl7/igt@[email protected]
- shard-glk: NOTRUN -> [FAIL][88] ([i915#265])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk8/igt@[email protected]
- shard-kbl: NOTRUN -> [FAIL][89] ([i915#265])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl7/igt@[email protected]

* igt@kms_plane_alpha_blend@pipe-d-alpha-transparent-fb:
- shard-apl: NOTRUN -> [SKIP][90] ([fdo#109271]) +136 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl8/igt@[email protected]

* igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
- shard-iclb: NOTRUN -> [SKIP][91] ([i915#3536]) +2 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb5/igt@kms_plane_lowres@[email protected]

* igt@kms_plane_lowres@tiling-x@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [SKIP][92] ([i915#3536]) +3 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb2/igt@kms_plane_lowres@[email protected]

* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-tglb: NOTRUN -> [SKIP][93] ([i915#2920])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb7/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][94] ([i915#658])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb3/igt@[email protected]

* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-apl: NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#658]) +2 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl1/igt@[email protected]

* igt@kms_psr2_su@page_flip-nv12:
- shard-tglb: NOTRUN -> [SKIP][96] ([i915#1911])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb8/igt@kms_psr2_su@page_flip-nv12.html
- shard-glk: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#658]) +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk1/igt@kms_psr2_su@page_flip-nv12.html
- shard-iclb: NOTRUN -> [SKIP][98] ([fdo#109642] / [fdo#111068] / [i915#658])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb8/igt@kms_psr2_su@page_flip-nv12.html
- shard-kbl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#658])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl7/igt@kms_psr2_su@page_flip-nv12.html

* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][100] -> [SKIP][101] ([fdo#109441]) +3 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html

* igt@kms_psr@psr2_dpms:
- shard-tglb: NOTRUN -> [FAIL][102] ([i915#132] / [i915#3467])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb8/igt@kms_psr@psr2_dpms.html
- shard-iclb: NOTRUN -> [SKIP][103] ([fdo#109441])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb8/igt@kms_psr@psr2_dpms.html

* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-tglb: NOTRUN -> [SKIP][104] ([i915#5519])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb6/igt@[email protected]

* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: NOTRUN -> [DMESG-WARN][105] ([i915#180])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl4/igt@[email protected]

* igt@kms_vrr@flip-suspend:
- shard-tglb: NOTRUN -> [SKIP][106] ([i915#3555])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb2/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][107] ([i915#3555]) +1 similar issue
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]

* igt@kms_writeback@writeback-invalid-parameters:
- shard-apl: NOTRUN -> [SKIP][108] ([fdo#109271] / [i915#2437])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl2/igt@[email protected]
- shard-tglb: NOTRUN -> [SKIP][109] ([i915#2437])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb6/igt@[email protected]
- shard-glk: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#2437])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk7/igt@[email protected]
- shard-iclb: NOTRUN -> [SKIP][111] ([i915#2437])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb4/igt@[email protected]

* igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name:
- shard-tglb: NOTRUN -> [SKIP][112] ([fdo#109291]) +3 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb8/igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name.html
- shard-iclb: NOTRUN -> [SKIP][113] ([fdo#109291]) +3 similar issues
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb6/igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name.html

* igt@sysfs_clients@create:
- shard-apl: NOTRUN -> [SKIP][114] ([fdo#109271] / [i915#2994])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl7/igt@[email protected]

#### Possible fixes ####

* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][115] ([i915#658]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb8/igt@[email protected]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@[email protected]

* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [FAIL][117] ([i915#6268]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-tglb1/igt@[email protected]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb8/igt@[email protected]

* igt@gem_eio@in-flight-contexts-1us:
- shard-iclb: [TIMEOUT][119] ([i915#3070]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb5/igt@[email protected]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb3/igt@[email protected]

* igt@gem_exec_balancer@parallel:
- shard-iclb: [SKIP][121] ([i915#4525]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb7/igt@[email protected]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@[email protected]

* igt@gem_exec_fair@basic-pace@bcs0:
- shard-iclb: [FAIL][123] ([i915#2842]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb5/igt@gem_exec_fair@[email protected]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb8/igt@gem_exec_fair@[email protected]

* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [FAIL][125] ([i915#2842]) -> [PASS][126] +4 similar issues
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-kbl1/igt@gem_exec_fair@[email protected]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl7/igt@gem_exec_fair@[email protected]

* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][127] ([i915#2190]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-tglb6/igt@[email protected]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-tglb1/igt@[email protected]

* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [FAIL][129] ([i915#454]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb3/igt@[email protected]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb4/igt@[email protected]

* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [SKIP][131] ([i915#4281]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb3/igt@[email protected]
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb7/igt@[email protected]

* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- shard-apl: [TIMEOUT][133] ([i915#6168]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl3/igt@[email protected]
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl7/igt@[email protected]

* igt@i915_suspend@forcewake:
- shard-kbl: [DMESG-WARN][135] ([i915#180]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-kbl7/igt@[email protected]
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl1/igt@[email protected]

* igt@kms_atomic_transition@plane-all-modeset-transition-fencing@dp-1-pipe-a:
- shard-apl: [FAIL][137] -> [PASS][138]
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@kms_atomic_transition@[email protected]
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl4/igt@kms_atomic_transition@[email protected]

* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs:
- shard-apl: [DMESG-WARN][139] ([i915#62]) -> [PASS][140] +46 similar issues
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl7/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html

* igt@kms_color@ctm-green-to-red@pipe-c-dp-1:
- shard-apl: [DMESG-WARN][141] ([i915#180] / [i915#62]) -> [PASS][142] +3 similar issues
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@kms_color@[email protected]
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl4/igt@kms_color@[email protected]

* igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
- shard-glk: [FAIL][143] ([i915#5160]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-glk6/igt@[email protected]
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-glk7/igt@[email protected]

* igt@kms_flip@blocking-wf_vblank@a-dp1:
- shard-apl: [DMESG-WARN][145] ([i915#1982] / [i915#62]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@kms_flip@[email protected]
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl4/igt@kms_flip@[email protected]

* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: [DMESG-WARN][147] ([i915#180]) -> [PASS][148] +3 similar issues
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl1/igt@kms_flip@[email protected]
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl7/igt@kms_flip@[email protected]

* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-render:
- shard-snb: [SKIP][149] ([fdo#109271]) -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-snb6/igt@[email protected]
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-snb6/igt@[email protected]

* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1:
- shard-iclb: [SKIP][151] ([i915#5235]) -> [PASS][152] +2 similar issues
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb2/igt@kms_plane_scaling@[email protected]
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb1/igt@kms_plane_scaling@[email protected]

* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-iclb: [SKIP][153] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][154]
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb7/igt@kms_psr2_su@page_flip-xrgb8888.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@kms_psr2_su@page_flip-xrgb8888.html

* igt@kms_psr@psr2_primary_blt:
- shard-iclb: [SKIP][155] ([fdo#109441]) -> [PASS][156] +2 similar issues
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb3/igt@kms_psr@psr2_primary_blt.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb2/igt@kms_psr@psr2_primary_blt.html

* igt@kms_vblank@pipe-c-wait-busy-hang:
- shard-apl: [SKIP][157] ([fdo#109271]) -> [PASS][158] +10 similar issues
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@[email protected]
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl6/igt@[email protected]

#### Warnings ####

* igt@gem_exec_fair@basic-pace@vcs1:
- shard-kbl: [SKIP][159] ([fdo#109271]) -> [FAIL][160] ([i915#2842])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-kbl1/igt@gem_exec_fair@[email protected]
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-kbl7/igt@gem_exec_fair@[email protected]

* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [FAIL][161] ([i915#2849]) -> [FAIL][162] ([i915#2842])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb2/igt@gem_exec_fair@[email protected]
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb3/igt@gem_exec_fair@[email protected]

* igt@i915_suspend@forcewake:
- shard-apl: [DMESG-WARN][163] ([i915#62]) -> [DMESG-WARN][164] ([i915#180])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@[email protected]
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl3/igt@[email protected]

* igt@kms_content_protection@uevent:
- shard-apl: [SKIP][165] ([fdo#109271]) -> [FAIL][166] ([i915#2105])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-apl7/igt@[email protected]
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-apl4/igt@[email protected]

* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][167] ([i915#2920]) -> [SKIP][168] ([fdo#111068] / [i915#658]) +1 similar issue
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6603/shard-iclb2/igt@[email protected]
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/shard-iclb8/igt@[email protected]

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes
-------------

* CI: CI-20190529 -> None
* IGT: IGT_6603 -> IGTPW_7579

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7579/index.html