Add support for 800Gbps speed
Subsystems (6)
Petr Machata
maintainercover Add support for 800Gbps speed
Amit Cohen <[email protected]> writes:
The next Nvidia Spectrum ASIC will support 800Gbps speed. The IEEE 802 LAN/MAN Standards Committee already published standards for 800Gbps, see the last update [1] and the list of approved changes [2].
As first phase, add support for 800Gbps over 8 lanes (100Gbps/lane). In the future 800Gbps over 4 lanes can be supported also.
Extend ethtool to support the relevant PMDs and extend mlxsw and bonding drivers to support 800Gbps.
Patch set overview:
Patch #1 extends ethtool to support 800Gbps. Patch #2 extends mlxsw driver to support 800Gbps. Patch #3 extends bonding driver to support 800Gbps.
----
[1]: https://www.ieee802.org/3/df/public/22_10/22_1004/shrikhande_3df_01a_221004.pdf
[2]: https://ieee802.org/3/df/KeyMotions_3df_221005.pdf
Amit Cohen (3):
ethtool: Add support for 800Gbps link modes
mlxsw: Add support for 800Gbps link modes
bonding: 3ad: Add support for 800G speed
drivers/net/bonding/bond_3ad.c | 9 ++++++++ drivers/net/ethernet/mellanox/mlxsw/reg.h | 1 + .../mellanox/mlxsw/spectrum_ethtool.c | 21 +++++++++++++++++++ drivers/net/phy/phy-core.c | 11 +++++++++- include/uapi/linux/ethtool.h | 8 +++++++ net/ethtool/common.c | 14 +++++++++++++ 6 files changed, 63 insertions(+), 1 deletion(-)
Signature · 1 line
2.35.3
Petr Machata
maintainerPATCH 1/3 ethtool: Add support for 800Gbps link modes
From: Amit Cohen <[email protected]>
Add support for 800Gbps speed, link modes of 100Gbps per lane. As mentioned in slide 21 in IEEE documentation [1], all adopted 802.3df copper and optical PMDs baselines using 100G/lane will be supported.
Add the relevant PMDs which are mentioned in slide 5 in IEEE documentation [1] and were approved on 10-2022 [2]:
BP - KR8
Cu Cable - CR8
MMF 50m - VR8
MMF 100m - SR8
SMF 500m - DR8
SMF 2km - DR8-2
[1]: https://www.ieee802.org/3/df/public/22_10/22_1004/shrikhande_3df_01a_221004.pdf
[2]: https://ieee802.org/3/df/KeyMotions_3df_221005.pdf
--- drivers/net/phy/phy-core.c | 11 ++++++++++- include/uapi/linux/ethtool.h | 8 ++++++++ net/ethtool/common.c | 14 ++++++++++++++ 3 files changed, 32 insertions(+), 1 deletion(-)
drivers/net/phy/phy-core.c +10 -1
@@ -13,7 +13,7 @@*/ const char *phy_speed_to_str (int speed) { -BUILD_BUG_ON_MSG (__ETHTOOL_LINK_MODE_MASK_NBITS !=93 , +BUILD_BUG_ON_MSG (__ETHTOOL_LINK_MODE_MASK_NBITS !=99 ,"Enum ethtool_link_mode_bit_indices and phylib are out of sync. " "If a speed or mode has been added please update phy_speed_to_str " "and the PHY settings array.\n" );
@@ -49,6 +49,8 @@ const char *phy_speed_to_str(int speed)return "200Gbps" ;case SPEED_400000 :return "400Gbps" ; +case SPEED_800000 : +return "800Gbps" ;case SPEED_UNKNOWN :return "Unknown" ;default :
@@ -157,6 +159,13 @@ EXPORT_SYMBOL_GPL(phy_interface_num_ports); .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}static const struct phy_setting settings[] = { +/* 800G */ + PHY_SETTING( 800000, FULL, 800000baseCR8_Full ), + PHY_SETTING( 800000, FULL, 800000baseKR8_Full ), + PHY_SETTING( 800000, FULL, 800000baseDR8_Full ), + PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ), + PHY_SETTING( 800000, FULL, 800000baseSR8_Full ), + PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),/* 400G */ PHY_SETTING( 400000, FULL, 400000baseCR8_Full ), PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
include/uapi/linux/ethtool.h +8 -0
@@ -1737,6 +1737,13 @@ enum ethtool_link_mode_bit_indices { ETHTOOL_LINK_MODE_100baseFX_Half_BIT =90 , ETHTOOL_LINK_MODE_100baseFX_Full_BIT =91 , ETHTOOL_LINK_MODE_10baseT1L_Full_BIT =92 , + ETHTOOL_LINK_MODE_800000baseCR8_Full_BIT =93 , + ETHTOOL_LINK_MODE_800000baseKR8_Full_BIT =94 , + ETHTOOL_LINK_MODE_800000baseDR8_Full_BIT =95 , + ETHTOOL_LINK_MODE_800000baseDR8_2_Full_BIT =96 , + ETHTOOL_LINK_MODE_800000baseSR8_Full_BIT =97 , + ETHTOOL_LINK_MODE_800000baseVR8_Full_BIT =98 , +/* must be last entry */ __ETHTOOL_LINK_MODE_MASK_NBITS };
@@ -1848,6 +1855,7 @@ enum ethtool_link_mode_bit_indices {#define SPEED_100000 100000#define SPEED_200000 200000#define SPEED_400000 400000 +#define SPEED_800000 800000#define SPEED_UNKNOWN -1
net/ethtool/common.c +14 -0
@@ -202,6 +202,12 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {__DEFINE_LINK_MODE_NAME (100 ,FX , Half),__DEFINE_LINK_MODE_NAME (100 ,FX , Full),__DEFINE_LINK_MODE_NAME (10 ,T1L , Full), +__DEFINE_LINK_MODE_NAME (800000 ,CR8 , Full), +__DEFINE_LINK_MODE_NAME (800000 ,KR8 , Full), +__DEFINE_LINK_MODE_NAME (800000 ,DR8 , Full), +__DEFINE_LINK_MODE_NAME (800000 ,DR8_2 , Full), +__DEFINE_LINK_MODE_NAME (800000 ,SR8 , Full), +__DEFINE_LINK_MODE_NAME (800000 ,VR8 , Full), };static_assert (ARRAY_SIZE (link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
@@ -238,6 +244,8 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);#define __LINK_MODE_LANES_X 1#define __LINK_MODE_LANES_FX 1#define __LINK_MODE_LANES_T1L 1 +#define __LINK_MODE_LANES_VR8 8 +#define __LINK_MODE_LANES_DR8_2 8#define __DEFINE_LINK_MODE_PARAMS (_speed, _type, _duplex) \ [ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = { \
@@ -352,6 +360,12 @@ const struct link_mode_info link_mode_params[] = {__DEFINE_LINK_MODE_PARAMS (100 ,FX , Half),__DEFINE_LINK_MODE_PARAMS (100 ,FX , Full),__DEFINE_LINK_MODE_PARAMS (10 ,T1L , Full), +__DEFINE_LINK_MODE_PARAMS (800000 ,CR8 , Full), +__DEFINE_LINK_MODE_PARAMS (800000 ,KR8 , Full), +__DEFINE_LINK_MODE_PARAMS (800000 ,DR8 , Full), +__DEFINE_LINK_MODE_PARAMS (800000 ,DR8_2 , Full), +__DEFINE_LINK_MODE_PARAMS (800000 ,SR8 , Full), +__DEFINE_LINK_MODE_PARAMS (800000 ,VR8 , Full), };static_assert (ARRAY_SIZE (link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS);
Signature · 1 line
2.35.3
Petr Machata
maintainerPATCH 2/3 mlxsw: Add support for 800Gbps link modes
In reply to Petr MachataFrom: Amit Cohen <[email protected]>
Add support for 800Gbps speed, link modes of 100Gbps per lane.
--- drivers/net/ethernet/mellanox/mlxsw/reg.h | 1 + .../mellanox/mlxsw/spectrum_ethtool.c | 21 +++++++++++++++++++ 2 files changed, 22 insertions(+)
drivers/net/ethernet/mellanox/mlxsw/reg.h +1 -0
@@ -4620,6 +4620,7 @@ MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4);#define MLXSW_REG_PTYS_EXT_ETH_SPEED_100GAUI_2_100GBASE_CR2_KR2 BIT(10)#define MLXSW_REG_PTYS_EXT_ETH_SPEED_200GAUI_4_200GBASE_CR4_KR4 BIT(12)#define MLXSW_REG_PTYS_EXT_ETH_SPEED_400GAUI_8 BIT(15) +#define MLXSW_REG_PTYS_EXT_ETH_SPEED_800GAUI_8 BIT(19)/* reg_ptys_ext_eth_proto_cap * Extended Ethernet port supported speeds and protocols.
drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c +21 -0
@@ -1672,6 +1672,19 @@ mlxsw_sp2_mask_ethtool_400gaui_8[] = {#define MLXSW_SP2_MASK_ETHTOOL_400GAUI_8_LEN \ ARRAY_SIZE(mlxsw_sp2_mask_ethtool_400gaui_8) +static const enum ethtool_link_mode_bit_indices +mlxsw_sp2_mask_ethtool_800gaui_8[] = { + ETHTOOL_LINK_MODE_800000baseCR8_Full_BIT, + ETHTOOL_LINK_MODE_800000baseKR8_Full_BIT, + ETHTOOL_LINK_MODE_800000baseDR8_Full_BIT, + ETHTOOL_LINK_MODE_800000baseDR8_2_Full_BIT, + ETHTOOL_LINK_MODE_800000baseSR8_Full_BIT, + ETHTOOL_LINK_MODE_800000baseVR8_Full_BIT, +}; + +#define MLXSW_SP2_MASK_ETHTOOL_800GAUI_8_LEN \ + ARRAY_SIZE(mlxsw_sp2_mask_ethtool_800gaui_8) +#define MLXSW_SP_PORT_MASK_WIDTH_1X BIT(0)#define MLXSW_SP_PORT_MASK_WIDTH_2X BIT(1)#define MLXSW_SP_PORT_MASK_WIDTH_4X BIT(2)
@@ -1820,6 +1833,14 @@ static const struct mlxsw_sp2_port_link_mode mlxsw_sp2_port_link_mode[] = { .speed = SPEED_400000, .width = 8, }, + { + .mask = MLXSW_REG_PTYS_EXT_ETH_SPEED_800GAUI_8, + .mask_ethtool = mlxsw_sp2_mask_ethtool_800gaui_8, + .m_ethtool_len = MLXSW_SP2_MASK_ETHTOOL_800GAUI_8_LEN, + .mask_sup_width = MLXSW_SP_PORT_MASK_WIDTH_8X, + .speed = SPEED_800000, + .width = 8, + }, };#define MLXSW_SP2_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp2_port_link_mode)
Signature · 1 line
2.35.3
Petr Machata
maintainerPATCH 3/3 bonding: 3ad: Add support for 800G speed
In reply to Petr MachataFrom: Amit Cohen <[email protected]>
Add support for 800Gbps speed to allow using 3ad mode with 800G devices.
--- drivers/net/bonding/bond_3ad.c | 9 +++++++++ 1 file changed, 9 insertions(+)
drivers/net/bonding/bond_3ad.c +9 -0
@@ -75,6 +75,7 @@ enum ad_link_speed_type {AD_LINK_SPEED_100000MBPS ,AD_LINK_SPEED_200000MBPS ,AD_LINK_SPEED_400000MBPS , + AD_LINK_SPEED_800000MBPS, };/* compare MAC addresses */
@@ -251,6 +252,7 @@ static inline int __check_agg_selection_timer(struct port *port)* %AD_LINK_SPEED_100000MBPS * %AD_LINK_SPEED_200000MBPS * %AD_LINK_SPEED_400000MBPS +* %AD_LINK_SPEED_800000MBPS */ static u16 __get_link_speed (struct port *port) {
@@ -326,6 +328,10 @@ static u16 __get_link_speed(struct port *port) speed =AD_LINK_SPEED_400000MBPS ;break ; +case SPEED_800000 : + speed =AD_LINK_SPEED_800000MBPS ; +break ; +default :/* unknown speed value from ethtool. shouldn't happen */ if (slave->speed !=SPEED_UNKNOWN )
@@ -753,6 +759,9 @@ static u32 __get_agg_bandwidth(struct aggregator *aggregator)case AD_LINK_SPEED_400000MBPS : bandwidth = nports *400000 ;break ; +case AD_LINK_SPEED_800000MBPS : + bandwidth = nports *800000 ; +break ;default : bandwidth =0 ;/* to silence the compiler */ }
Signature · 1 line
2.35.3
Re: [PATCH net-next 3/3] bonding: 3ad: Add support for 800G speed
Quoted 7 lines · Petr Machata
From: Amit Cohen <[email protected]>
Add support for 800Gbps speed to allow using 3ad mode with 800G devices.
Signed-off-by Amit Cohen <[email protected]>Reviewed-by Ido Schimmel <[email protected]>Signed-off-by Petr Machata <[email protected]>
Quoted 48 lines
---
drivers/net/bonding/bond_3ad.c| 9 +++++++++1 file changed, 9 insertions(+)drivers/net/bonding/bond_3ad.c +9
-0@@ -75,6 +75,7 @@ enum ad_link_speed_type {AD_LINK_SPEED_100000MBPS ,AD_LINK_SPEED_200000MBPS ,AD_LINK_SPEED_400000MBPS , + AD_LINK_SPEED_800000MBPS, };/* compare MAC addresses */ @@ -251,6 +252,7 @@ static inline int __check_agg_selection_timer(struct port *port)* %AD_LINK_SPEED_100000MBPS * %AD_LINK_SPEED_200000MBPS * %AD_LINK_SPEED_400000MBPS +* %AD_LINK_SPEED_800000MBPS */ static u16 __get_link_speed (struct port *port) {@@ -326,6 +328,10 @@ static u16 __get_link_speed(struct port *port) speed =AD_LINK_SPEED_400000MBPS ;break ; +case SPEED_800000 : + speed =AD_LINK_SPEED_800000MBPS ; +break ; +default :/* unknown speed value from ethtool. shouldn't happen */ if (slave->speed !=SPEED_UNKNOWN )@@ -753,6 +759,9 @@ static u32 __get_agg_bandwidth(struct aggregator *aggregator)case AD_LINK_SPEED_400000MBPS : bandwidth = nports *400000 ;break ; +case AD_LINK_SPEED_800000MBPS : + bandwidth = nports *800000 ; +break ;default : bandwidth =0 ;/* to silence the compiler */ }Signature · 1 line
2.35.3
This series was applied to netdev/net-next.git (master) by David S. Miller <[email protected]>:
Hello:
This series was applied to netdev/net-next.git (master) by David S. Miller <[email protected]>:
Quoted 10 lines · On Thu, 20 Oct 2022 17:20:02 +0200 you wrote:
Amit Cohen <[email protected]> writes:
The next Nvidia Spectrum ASIC will support 800Gbps speed. The IEEE 802 LAN/MAN Standards Committee already published standards for 800Gbps, see the last update [1] and the list of approved changes [2].
As first phase, add support for 800Gbps over 8 lanes (100Gbps/lane). In the future 800Gbps over 4 lanes can be supported also.
[...]
Here is the summary with links:
- [net-next,1/3] ethtool: Add support for 800Gbps link modes
https://git.kernel.org/netdev/net-next/c/404c76783f32 - [net-next,2/3] mlxsw: Add support for 800Gbps link modes https://git.kernel.org/netdev/net-next/c/cceef209ddd7 - [net-next,3/3] bonding: 3ad: Add support for 800G speed https://git.kernel.org/netdev/net-next/c/41305d3781d7
You are awesome, thank you!
Signature · 2 lines
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