rtc: ls2x: Add support for the Loongson-2K/LS7A RTC

The LS2X RTC alarm depends on the associated registers in a separate power management domain.

In order to define the PM domain addresses of the different chips, a more detailed description of compatible is required.

Signed-off-by Binbin Zhou <[email protected]>

---
 Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -0

index a3603e638c37..2928811b83a0 100644

Quoted 5 lines · Binbin Zhou

The LS2X RTC alarm depends on the associated registers in a separate power management domain.

In order to define the PM domain addresses of the different chips, a more detailed description of compatible is required.

This does not match your diff at all.

Quoted 11 lines

Signed-off-by Binbin Zhou <[email protected]>

---
 Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -0

index a3603e638c37..2928811b83a0 100644

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml properties: · line 51

Quoted 5 lines

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -2

@@ -47,8 +47,11 @@ properties:
       - isil,isl1218
       # Intersil ISL12022 Real-time Clock
       - isil,isl12022
-      # Loongson-2K Socs/LS7A bridge Real-time Clock
-      - loongson,ls2x-rtc

Why removing it?

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml properties: · line 54

Quoted 5 lines

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +5 -0

+      # Loongson LS7A bridge Real-time Clock
+      - loongson,ls7a-rtc
+      # Loongson-2K Socs Real-time Clock
+      - loongson,ls2k0500-rtc
+      - loongson,ls2k1000-rtc

That's even more surprising...

I don't understand what you are doing here at all.

Best regards,
Krzysztof

Quoted 35 lines · Krzysztof Kozlowski

Quoted 5 lines · Binbin Zhou

The LS2X RTC alarm depends on the associated registers in a separate power management domain.

In order to define the PM domain addresses of the different chips, a more detailed description of compatible is required.

This does not match your diff at all.

Quoted 11 lines

Signed-off-by Binbin Zhou <[email protected]>

---
 Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -0

index a3603e638c37..2928811b83a0 100644

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml properties: · line 51

Quoted 5 lines

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -2

@@ -47,8 +47,11 @@ properties:
       - isil,isl1218
       # Intersil ISL12022 Real-time Clock
       - isil,isl12022
-      # Loongson-2K Socs/LS7A bridge Real-time Clock
-      - loongson,ls2x-rtc

Why removing it?

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml properties: · line 54

Quoted 5 lines

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +5 -0

+      # Loongson LS7A bridge Real-time Clock
+      - loongson,ls7a-rtc
+      # Loongson-2K Socs Real-time Clock
+      - loongson,ls2k0500-rtc
+      - loongson,ls2k1000-rtc

Quoted 3 lines

That's even more surprising...

I don't understand what you are doing here at all.

Hi Krzysztof:

Sorry, maybe my description was not accurate.

Looking back at my V2 patchset, the first patch was to add ls2x-rtc compatible.
(https://lore.kernel.org/linux-rtc/0288efeb4209e4a49af07de6399045aaa00a970c.1673227292.git.zhoubinbin@loongson.cn/)

In the process of modifying the V2 patchset, it was discovered that the ACPI domain offset addresses on some of the socs (LS2K1000) were different and I wanted to differentiate them by soc compatible. So I was going to drop the ls2x-rtc compatible directly from the V3 patch set.
However, when I rebased the V3 patchset, I found that the previous ls2x-rtc compatible patch had been merged (commit 473a8ce756fd). So I had to remove it and add soc compatible.

How about the following description:
Since commit 473a8ce756fd (dt-bindings: rtc: Add Loongson LS2X RTC support), the ls2x-rtc compatible has been added. But the specific soc compatible is needed to be used to define different ACPI domain offset addresses.

Quoted 47 lines · Binbin Zhou

Quoted 35 lines · Krzysztof Kozlowski

Quoted 5 lines · Binbin Zhou

The LS2X RTC alarm depends on the associated registers in a separate power management domain.

In order to define the PM domain addresses of the different chips, a more detailed description of compatible is required.

This does not match your diff at all.

Quoted 11 lines

Signed-off-by Binbin Zhou <[email protected]>

---
 Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -0

index a3603e638c37..2928811b83a0 100644

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml properties: · line 51

Quoted 5 lines

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +0 -2

@@ -47,8 +47,11 @@ properties:
       - isil,isl1218
       # Intersil ISL12022 Real-time Clock
       - isil,isl12022
-      # Loongson-2K Socs/LS7A bridge Real-time Clock
-      - loongson,ls2x-rtc

Why removing it?

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml properties: · line 54

Quoted 5 lines

Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +5 -0

+      # Loongson LS7A bridge Real-time Clock
+      - loongson,ls7a-rtc
+      # Loongson-2K Socs Real-time Clock
+      - loongson,ls2k0500-rtc
+      - loongson,ls2k1000-rtc

Quoted 3 lines

That's even more surprising...

I don't understand what you are doing here at all.

Hi Krzysztof:

Sorry, maybe my description was not accurate.

Looking back at my V2 patchset, the first patch was to add ls2x-rtc compatible.
(https://lore.kernel.org/linux-rtc/0288efeb4209e4a49af07de6399045aaa00a970c.1673227292.git.zhoubinbin@loongson.cn/)

Quoted 8 lines

In the process of modifying the V2 patchset, it was discovered that the ACPI domain offset addresses on some of the socs (LS2K1000) were different and I wanted to differentiate them by soc compatible. So I was going to drop the ls2x-rtc compatible directly from the V3 patch set.
However, when I rebased the V3 patchset, I found that the previous ls2x-rtc compatible patch had been merged (commit 473a8ce756fd). So I had to remove it and add soc compatible.

Can all folks in Loongson stop adding wildcards as compatibles? Several compatibles were acked, because we do not know what 'x' stands for. Now, it turns out it's a wildcard which is not allowed.

https://elixir.bootlin.com/linux/v6.1-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L42

Quoted 1 line

Quoted 6 lines

How about the following description:
Since commit 473a8ce756fd (dt-bindings: rtc: Add Loongson LS2X RTC support), the ls2x-rtc compatible has been added. But the specific soc compatible is needed to be used to define different ACPI domain offset addresses.

It's better. Anyway, SoC parts are rarely trivial devices, so this should be probably moved to its own schema.

Best regards,
Krzysztof

This RTC module is integrated into the Loongson-2K SoC and the LS7A bridge chip. This version is almost entirely rewritten to make use of current kernel API, and it supports both ACPI and DT.

This driver is shared by MIPS-based Loongson-3A4000 system (use FDT) and LoongArch-based Loongson-3A5000 system (use ACPI).

Signed-off-by Binbin Zhou <[email protected]>

Signed-off-by Huacai Chen <[email protected]>

Signed-off-by WANG Xuerui <[email protected]>

---
 drivers/rtc/Kconfig    |  11 ++
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rtc-ls2x.c | 345 +++++++++++++++++++++++++++++++++++++++++

 3 files changed, 357 insertions(+)
 create mode 100644 drivers/rtc/rtc-ls2x.c

drivers/rtc/Kconfig +11 -0

index 753872408615..e1b9d64d2678 100644
@@ -1706,6 +1706,17 @@ config RTC_DRV_LPC32XX
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-lpc32xx.
 
+config RTC_DRV_LS2X
+	tristate "Loongson LS2X RTC"
+	depends on MACH_LOONGSON64 || COMPILE_TEST
+	select REGMAP_MMIO
+	help
+	  If you say yes here you get support for the RTC on the Loongson-2K
+	  SoC and LS7A bridge, which first appeared on the Loongson-2H.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-ls2x.
+
 config RTC_DRV_PM8XXX
 	tristate "Qualcomm PMIC8XXX RTC"
 	depends on MFD_PM8XXX || MFD_SPMI_PMIC || COMPILE_TEST

drivers/rtc/Makefile +1 -0

index ea445d1ebb17..cff5df09fc60 100644
@@ -82,6 +82,7 @@ obj-$(CONFIG_RTC_DRV_LOONGSON1)	+= rtc-ls1x.o
 obj-$(CONFIG_RTC_DRV_LP8788)	+= rtc-lp8788.o
 obj-$(CONFIG_RTC_DRV_LPC24XX)	+= rtc-lpc24xx.o
 obj-$(CONFIG_RTC_DRV_LPC32XX)	+= rtc-lpc32xx.o
+obj-$(CONFIG_RTC_DRV_LS2X)	+= rtc-ls2x.o
 obj-$(CONFIG_RTC_DRV_M41T80)	+= rtc-m41t80.o
 obj-$(CONFIG_RTC_DRV_M41T93)	+= rtc-m41t93.o
 obj-$(CONFIG_RTC_DRV_M41T94)	+= rtc-m41t94.o

drivers/rtc/rtc-ls2x.c new file +127 -0

new file mode 100644
index 000000000000..c74dd88ae11b
@@ -0,0 +1,345 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Loongson-2K/LS7A RTC driver
+ *
+ * Based on the original out-of-tree Loongson-2H RTC driver for Linux 2.6.32,
+ * by Shaozong Liu <[email protected]>.
+ *
+ * Maintained out-of-tree by Huacai Chen <[email protected]>.
+ * Rewritten for mainline by WANG Xuerui <[email protected]>.
+ *                           Binbin Zhou <[email protected]>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+#include <linux/acpi.h>
+
+/* Time Of Year(TOY) counters registers */
+#define TOY_TRIM_REG		0x20 /* Must be initialized to 0 */
+#define TOY_WRITE0_REG		0x24 /* TOY low 32-bits value (write-only) */
+#define TOY_WRITE1_REG		0x28 /* TOY high 32-bits value (write-only) */
+#define TOY_READ0_REG		0x2c /* TOY low 32-bits value (read-only) */
+#define TOY_READ1_REG		0x30 /* TOY high 32-bits value (read-only) */
+#define TOY_MATCH0_REG		0x34 /* TOY timing interrupt 0 */
+#define TOY_MATCH1_REG		0x38 /* TOY timing interrupt 1 */
+#define TOY_MATCH2_REG		0x3c /* TOY timing interrupt 2 */
+
+/* RTC counters registers */
+#define RTC_CTRL_REG		0x40 /* TOY and RTC control register */
+#define RTC_TRIM_REG		0x60 /* Must be initialized to 0 */
+#define RTC_WRITE0_REG		0x64 /* RTC counters value (write-only) */
+#define RTC_READ0_REG		0x68 /* RTC counters value (read-only) */
+#define RTC_MATCH0_REG		0x6c /* RTC timing interrupt 0 */
+#define RTC_MATCH1_REG		0x70 /* RTC timing interrupt 1 */
+#define RTC_MATCH2_REG		0x74 /* RTC timing interrupt 2 */
+
+/* bitmask of TOY_WRITE0_REG */
+#define TOY_MON			GENMASK(31, 26)
+#define TOY_DAY			GENMASK(25, 21)
+#define TOY_HOUR		GENMASK(20, 16)
+#define TOY_MIN			GENMASK(15, 10)
+#define TOY_SEC			GENMASK(9, 4)
+#define TOY_MSEC		GENMASK(3, 0)
+
+/* bitmask of TOY_MATCH0/1/2_REG */
+#define TOY_MATCH_YEAR		GENMASK(31, 26)
+#define TOY_MATCH_MON		GENMASK(25, 22)
+#define TOY_MATCH_DAY		GENMASK(21, 17)
+#define TOY_MATCH_HOUR		GENMASK(16, 12)
+#define TOY_MATCH_MIN		GENMASK(11, 6)
+#define TOY_MATCH_SEC		GENMASK(5, 0)
+
+/* bitmask of RTC_CTRL_REG */
+#define RTC_ENABLE		BIT(13) /* 1: RTC counters enable */
+#define TOY_ENABLE		BIT(11) /* 1: TOY counters enable */
+#define OSC_ENABLE		BIT(8) /* 1: 32.768k crystal enable */
+#define TOY_ENABLE_MASK		(TOY_ENABLE | OSC_ENABLE)
+
+/* PM domain registers */
+#define PM1_STS_REG		0x0c /* Power management 1 status register */
+#define RTC_STS			BIT(10) /* RTC status */
+#define PM1_EN_REG		0x10 /* Power management 1 enable register */
+#define RTC_EN			BIT(10) /* RTC event enable */
+
+/* Offset of PM domain from RTC domain, for rtc alarm */
+enum ls2x_pm_offset {
+	GENERIC_OFFSET = 0x100,
+	LS2K1000_OFFSET = 0x800,
+};
+
+struct ls2x_rtc_priv {
+	spinlock_t lock; /* protects PM registers access */
+	int irq;
+	struct rtc_device *rtcdev;
+	struct regmap *regmap;
+	void __iomem *pm_base; /* PM domain base, for rtc alarm */
+};
+
+static const struct regmap_config ls2x_rtc_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+};
+
+/* IRQ Handlers */
+static irqreturn_t ls2x_rtc_isr(int irq, void *id)
+{
+	struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
+
+	rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
+	return IRQ_HANDLED;
+}
+
+static u32 ls2x_rtc_handler(void *id)
+{
+	u32 ret;
+	struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
+
+	spin_lock(&priv->lock);
+	/* Disable rtc event */
+	writel(readl(priv->pm_base + PM1_EN_REG) & ~RTC_EN,
+	       priv->pm_base + PM1_EN_REG);
+
+	/* Clear rtc interrupt status */
+	writel(RTC_STS, priv->pm_base + PM1_STS_REG);
+	spin_unlock(&priv->lock);
+
+	/*
+	 * The TOY_MATCH0_REG should be cleared 0 here,
+	 * otherwise the interrupt cannot be cleared.
+	 */
+	ret = regmap_write(priv->regmap, TOY_MATCH0_REG, 0);
+	if (ret < 0)
+		return ret;
+
+	rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
+	return 0;
+}
+
+static int ls2x_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	int ret;
+	u32 ctrl_data, rtc_data[2];
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);

drivers/rtc/rtc-ls2x.c new file +50 -0

+	if (ret < 0)
+		return ret;
+
+	tm->tm_sec = FIELD_GET(TOY_SEC, rtc_data[0]);
+	tm->tm_min = FIELD_GET(TOY_MIN, rtc_data[0]);
+	tm->tm_hour = FIELD_GET(TOY_HOUR, rtc_data[0]);
+	tm->tm_mday = FIELD_GET(TOY_DAY, rtc_data[0]);
+	tm->tm_mon = FIELD_GET(TOY_MON, rtc_data[0]) - 1;
+	tm->tm_year = rtc_data[1];
+
+	return 0;
+}
+
+static int ls2x_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	int ret;
+	u32 rtc_data[2];
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	rtc_data[0] = FIELD_PREP(TOY_SEC, tm->tm_sec)
+		    | FIELD_PREP(TOY_MIN, tm->tm_min)
+		    | FIELD_PREP(TOY_HOUR, tm->tm_hour)
+		    | FIELD_PREP(TOY_DAY, tm->tm_mday)
+		    | FIELD_PREP(TOY_MON, tm->tm_mon + 1);
+	rtc_data[1] = tm->tm_year;
+
+	ret = regmap_bulk_write(priv->regmap, TOY_WRITE0_REG, rtc_data,
+				ARRAY_SIZE(rtc_data));
+	if (ret < 0)
+		return ret;
+
+	/* Enable RTC TOY counters and crystal */
+	return regmap_update_bits(priv->regmap, RTC_CTRL_REG, TOY_ENABLE_MASK,
+				  TOY_ENABLE_MASK);
+}
+
+static int ls2x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	int ret;
+	u32 alarm_data;
+	struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+	ret = regmap_read(priv->regmap, TOY_MATCH0_REG, &alarm_data);
+	if (ret < 0)
+		return ret;
+
+	alrm->time.tm_sec = FIELD_GET(TOY_MATCH_SEC, alarm_data);
+	alrm->time.tm_min = FIELD_GET(TOY_MATCH_MIN, alarm_data);
+	alrm->time.tm_hour = FIELD_GET(TOY_MATCH_HOUR, alarm_data);
+	alrm->time.tm_mday = FIELD_GET(TOY_MATCH_DAY, alarm_data);

Quoted 7 lines · Binbin Zhou

This RTC module is integrated into the Loongson-2K SoC and the LS7A bridge chip. This version is almost entirely rewritten to make use of current kernel API, and it supports both ACPI and DT.

This driver is shared by MIPS-based Loongson-3A4000 system (use FDT) and LoongArch-based Loongson-3A5000 system (use ACPI).

Quoted 7 lines

Signed-off-by Binbin Zhou <[email protected]>

Signed-off-by Huacai Chen <[email protected]>

Signed-off-by WANG Xuerui <[email protected]>

---
 drivers/rtc/Kconfig    |  11 ++
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rtc-ls2x.c | 345 +++++++++++++++++++++++++++++++++++++++++

This is v3 and this is still not merged in rtc-ls1x.c.

Quoted 176 lines

 3 files changed, 357 insertions(+)
 create mode 100644 drivers/rtc/rtc-ls2x.c

drivers/rtc/Kconfig +11 -0

index 753872408615..e1b9d64d2678 100644
@@ -1706,6 +1706,17 @@ config RTC_DRV_LPC32XX
        This driver can also be built as a module. If so, the module
        will be called rtc-lpc32xx.
 
+config RTC_DRV_LS2X
+     tristate "Loongson LS2X RTC"
+     depends on MACH_LOONGSON64 || COMPILE_TEST
+     select REGMAP_MMIO
+     help
+       If you say yes here you get support for the RTC on the Loongson-2K
+       SoC and LS7A bridge, which first appeared on the Loongson-2H.
+
+       This driver can also be built as a module. If so, the module
+       will be called rtc-ls2x.
+
 config RTC_DRV_PM8XXX
      tristate "Qualcomm PMIC8XXX RTC"
      depends on MFD_PM8XXX || MFD_SPMI_PMIC || COMPILE_TEST

drivers/rtc/Makefile +1 -0

index ea445d1ebb17..cff5df09fc60 100644
@@ -82,6 +82,7 @@ obj-$(CONFIG_RTC_DRV_LOONGSON1)     += rtc-ls1x.o
 obj-$(CONFIG_RTC_DRV_LP8788) += rtc-lp8788.o
 obj-$(CONFIG_RTC_DRV_LPC24XX)        += rtc-lpc24xx.o
 obj-$(CONFIG_RTC_DRV_LPC32XX)        += rtc-lpc32xx.o
+obj-$(CONFIG_RTC_DRV_LS2X)   += rtc-ls2x.o
 obj-$(CONFIG_RTC_DRV_M41T80) += rtc-m41t80.o
 obj-$(CONFIG_RTC_DRV_M41T93) += rtc-m41t93.o
 obj-$(CONFIG_RTC_DRV_M41T94) += rtc-m41t94.o

drivers/rtc/rtc-ls2x.c new file +132 -0

new file mode 100644
index 000000000000..c74dd88ae11b
@@ -0,0 +1,345 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Loongson-2K/LS7A RTC driver
+ *
+ * Based on the original out-of-tree Loongson-2H RTC driver for Linux 2.6.32,
+ * by Shaozong Liu <[email protected]>.
+ *
+ * Maintained out-of-tree by Huacai Chen <[email protected]>.
+ * Rewritten for mainline by WANG Xuerui <[email protected]>.
+ *                           Binbin Zhou <[email protected]>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+#include <linux/acpi.h>
+
+/* Time Of Year(TOY) counters registers */
+#define TOY_TRIM_REG         0x20 /* Must be initialized to 0 */
+#define TOY_WRITE0_REG               0x24 /* TOY low 32-bits value (write-only) */
+#define TOY_WRITE1_REG               0x28 /* TOY high 32-bits value (write-only) */
+#define TOY_READ0_REG                0x2c /* TOY low 32-bits value (read-only) */
+#define TOY_READ1_REG                0x30 /* TOY high 32-bits value (read-only) */
+#define TOY_MATCH0_REG               0x34 /* TOY timing interrupt 0 */
+#define TOY_MATCH1_REG               0x38 /* TOY timing interrupt 1 */
+#define TOY_MATCH2_REG               0x3c /* TOY timing interrupt 2 */
+
+/* RTC counters registers */
+#define RTC_CTRL_REG         0x40 /* TOY and RTC control register */
+#define RTC_TRIM_REG         0x60 /* Must be initialized to 0 */
+#define RTC_WRITE0_REG               0x64 /* RTC counters value (write-only) */
+#define RTC_READ0_REG                0x68 /* RTC counters value (read-only) */
+#define RTC_MATCH0_REG               0x6c /* RTC timing interrupt 0 */
+#define RTC_MATCH1_REG               0x70 /* RTC timing interrupt 1 */
+#define RTC_MATCH2_REG               0x74 /* RTC timing interrupt 2 */
+
+/* bitmask of TOY_WRITE0_REG */
+#define TOY_MON                      GENMASK(31, 26)
+#define TOY_DAY                      GENMASK(25, 21)
+#define TOY_HOUR             GENMASK(20, 16)
+#define TOY_MIN                      GENMASK(15, 10)
+#define TOY_SEC                      GENMASK(9, 4)
+#define TOY_MSEC             GENMASK(3, 0)
+
+/* bitmask of TOY_MATCH0/1/2_REG */
+#define TOY_MATCH_YEAR               GENMASK(31, 26)
+#define TOY_MATCH_MON                GENMASK(25, 22)
+#define TOY_MATCH_DAY                GENMASK(21, 17)
+#define TOY_MATCH_HOUR               GENMASK(16, 12)
+#define TOY_MATCH_MIN                GENMASK(11, 6)
+#define TOY_MATCH_SEC                GENMASK(5, 0)
+
+/* bitmask of RTC_CTRL_REG */
+#define RTC_ENABLE           BIT(13) /* 1: RTC counters enable */
+#define TOY_ENABLE           BIT(11) /* 1: TOY counters enable */
+#define OSC_ENABLE           BIT(8) /* 1: 32.768k crystal enable */
+#define TOY_ENABLE_MASK              (TOY_ENABLE | OSC_ENABLE)
+
+/* PM domain registers */
+#define PM1_STS_REG          0x0c /* Power management 1 status register */
+#define RTC_STS                      BIT(10) /* RTC status */
+#define PM1_EN_REG           0x10 /* Power management 1 enable register */
+#define RTC_EN                       BIT(10) /* RTC event enable */
+
+/* Offset of PM domain from RTC domain, for rtc alarm */
+enum ls2x_pm_offset {
+     GENERIC_OFFSET = 0x100,
+     LS2K1000_OFFSET = 0x800,
+};
+
+struct ls2x_rtc_priv {
+     spinlock_t lock; /* protects PM registers access */
+     int irq;
+     struct rtc_device *rtcdev;
+     struct regmap *regmap;
+     void __iomem *pm_base; /* PM domain base, for rtc alarm */
+};
+
+static const struct regmap_config ls2x_rtc_regmap_config = {
+     .reg_bits = 32,
+     .val_bits = 32,
+     .reg_stride = 4,
+};
+
+/* IRQ Handlers */
+static irqreturn_t ls2x_rtc_isr(int irq, void *id)
+{
+     struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
+
+     rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
+     return IRQ_HANDLED;
+}
+
+static u32 ls2x_rtc_handler(void *id)
+{
+     u32 ret;
+     struct ls2x_rtc_priv *priv = (struct ls2x_rtc_priv *)id;
+
+     spin_lock(&priv->lock);
+     /* Disable rtc event */
+     writel(readl(priv->pm_base + PM1_EN_REG) & ~RTC_EN,
+            priv->pm_base + PM1_EN_REG);
+
+     /* Clear rtc interrupt status */
+     writel(RTC_STS, priv->pm_base + PM1_STS_REG);
+     spin_unlock(&priv->lock);
+
+     /*
+      * The TOY_MATCH0_REG should be cleared 0 here,
+      * otherwise the interrupt cannot be cleared.
+      */
+     ret = regmap_write(priv->regmap, TOY_MATCH0_REG, 0);
+     if (ret < 0)
+             return ret;
+
+     rtc_update_irq(priv->rtcdev, 1, RTC_AF | RTC_IRQF);
+     return 0;
+}
+
+static int ls2x_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+     int ret;
+     u32 ctrl_data, rtc_data[2];
+     struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+     ret = regmap_read(priv->regmap, RTC_CTRL_REG, &ctrl_data);
+     if (ret < 0)
+             return ret;
+

drivers/rtc/rtc-ls2x.c line 137

Quoted 5 lines

drivers/rtc/rtc-ls2x.c new file +5 -0

+     if (!(ctrl_data & TOY_ENABLE_MASK))
+             return -EINVAL;
+
+     ret = regmap_bulk_read(priv->regmap, TOY_READ0_REG, rtc_data,
+                            ARRAY_SIZE(rtc_data));

There is still no answer on whether the TOY_READ0_REG and TOY_READ1_REG are latched.

Quoted 56 lines

drivers/rtc/rtc-ls2x.c new file +56 -0

+     if (ret < 0)
+             return ret;
+
+     tm->tm_sec = FIELD_GET(TOY_SEC, rtc_data[0]);
+     tm->tm_min = FIELD_GET(TOY_MIN, rtc_data[0]);
+     tm->tm_hour = FIELD_GET(TOY_HOUR, rtc_data[0]);
+     tm->tm_mday = FIELD_GET(TOY_DAY, rtc_data[0]);
+     tm->tm_mon = FIELD_GET(TOY_MON, rtc_data[0]) - 1;
+     tm->tm_year = rtc_data[1];
+
+     return 0;
+}
+
+static int ls2x_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+     int ret;
+     u32 rtc_data[2];
+     struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+     rtc_data[0] = FIELD_PREP(TOY_SEC, tm->tm_sec)
+                 | FIELD_PREP(TOY_MIN, tm->tm_min)
+                 | FIELD_PREP(TOY_HOUR, tm->tm_hour)
+                 | FIELD_PREP(TOY_DAY, tm->tm_mday)
+                 | FIELD_PREP(TOY_MON, tm->tm_mon + 1);
+     rtc_data[1] = tm->tm_year;
+
+     ret = regmap_bulk_write(priv->regmap, TOY_WRITE0_REG, rtc_data,
+                             ARRAY_SIZE(rtc_data));
+     if (ret < 0)
+             return ret;
+
+     /* Enable RTC TOY counters and crystal */
+     return regmap_update_bits(priv->regmap, RTC_CTRL_REG, TOY_ENABLE_MASK,
+                               TOY_ENABLE_MASK);
+}
+
+static int ls2x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+     int ret;
+     u32 alarm_data;
+     struct ls2x_rtc_priv *priv = dev_get_drvdata(dev);
+
+     ret = regmap_read(priv->regmap, TOY_MATCH0_REG, &alarm_data);
+     if (ret < 0)
+             return ret;
+
+     alrm->time.tm_sec = FIELD_GET(TOY_MATCH_SEC, alarm_data);
+     alrm->time.tm_min = FIELD_GET(TOY_MATCH_MIN, alarm_data);
+     alrm->time.tm_hour = FIELD_GET(TOY_MATCH_HOUR, alarm_data);
+     alrm->time.tm_mday = FIELD_GET(TOY_MATCH_DAY, alarm_data);
+     alrm->time.tm_mon = FIELD_GET(TOY_MATCH_MON, alarm_data) - 1;
+     /*
+      * This is a hardware bug.
+      * The year field in the SYS_TOYMATCH has only 6 bits(bits[31:26]),
+      * so it can only be set from 1900 to 1963.
+      * In order to avoid an invalid alarm value during booting, we manually

drivers/rtc/rtc-ls2x.c line 197

Quoted 4 lines

drivers/rtc/rtc-ls2x.c new file +4 -0

+      * add 64 after reading the year field (equivalent to filling in the
+      * high bits).
+      */
+     alrm->time.tm_year = FIELD_GET(TOY_MATCH_YEAR, alarm_data) + 64;

This is restricting to the 1964 to 2027 range whereas you claim the RTC has a 2000 to 2099 range. Why don't you simply do 2000 to 2063 which would at least match most of it.

I am very very disappointed. I had all these comments on v1 and v2, you are sending v3 with the exact same issues. How can I trust this is ever going to progress in the right direction?

--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

This is now supported, enable for Loongson-2K systems. Other systems are unaffected.

Signed-off-by WANG Xuerui <[email protected]>

Signed-off-by Binbin Zhou <[email protected]>

Hi all:

The initial DT-base ls2x rtc driver was written by Wang Xuerui, He has released five versions of patchset before, and all related mail records are shown below if you are interested:

https://lore.kernel.org/all/?q=ls2x-rtc

In this series of patches, based on the code above, I have added the following support:

1. Add ACPI-related support, as Loongson-3A5000 + LS7A is now ACPI-base by default under LoongArch architecture;
2. Add rtc alarm/walarm related functions.

I have tested on Loongson-3A5000LA+LS7A1000/LS7A2000, Loongson-2K1000LA and Loongson-2K0500.

BTW:
As LS1X does not support DT, we will merge LS2X and LS1X after keguang has completed DT support for LS1X.

-------
Changes since v2:
- Rebase on the top of rtc-next.
patch(1/7):
- The new patch.
patch(2/7):
- Check patchset with "checkpatch.pl --strict";
- Drop static inline functions which are used only once, such as ls2x_rtc_regs_to_time;
- Remove the suruct ls2x_rtc_regs and regmap_bulk_xxx() is used to read and write rtc registers;
- Clear the RTC wakeup interrupt manually;
- Enable the RTC in set_time() and check in read_time();
- device_get_match_data() is used to get ls2x_pm_offset, for LS2k1000 has the different value;
- Remove some inexact CONFIG_ACPI;
- remove()->remove_new().

Changes since v1:
1. Rebased on top of latest loongarch-next;
2. Add interrupt descriptions to the ls2k and ls7a DTS files to avoid errors when the driver gets the IRQ number, Thanks to Qing Zhang for testing;
3. Remove some inexact CONFIG_ACPI.

Thanks.

Binbin Zhou (7):
dt-bindings: rtc: Subdivision of LS2X RTC compatible
rtc: Add support for the Loongson-2K/LS7A RTC
LoongArch: Enable LS2X RTC in loongson3_defconfig
MIPS: Loongson64: DTS: Add RTC support to LS7A
MIPS: Loongson: Enable LS2X RTC in loongson3_defconfig
MIPS: Loongson64: DTS: Add RTC support to Loongson-2K
MIPS: Loongson: Enable LS2X RTC in loongson2k_defconfig

 .../devicetree/bindings/rtc/trivial-rtc.yaml  |   7 +-
 arch/loongarch/configs/loongson3_defconfig    |   1 +
 .../boot/dts/loongson/loongson64-2k1000.dtsi  |   7 +
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi     |   7 +
 arch/mips/configs/loongson2k_defconfig        |   1 +
 arch/mips/configs/loongson3_defconfig         |   1 +
 drivers/rtc/Kconfig                           |  11 +
 drivers/rtc/Makefile                          |   1 +
 drivers/rtc/rtc-ls2x.c                        | 345 ++++++++++++++++++
 9 files changed, 379 insertions(+), 2 deletions(-)
 create mode 100644 drivers/rtc/rtc-ls2x.c

Signature · 1 line

2.39.1