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AMD Pstate Fixes And Enhancements

PATCH Superseded Perry Yuan 3 participants 16 messages Jan 31, 2024 – Feb 2, 2024

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v1 of 12 Superseded Latest is v12 →

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Perry Yuan

author reviewer
#0 lore raw

cover AMD Pstate Fixes And Enhancements

The patch series adds some fixes and enhancements to the AMD pstate driver. It enables CPPC v2 for certain processors in the family 17H, as requested by TR40 processor users who expect improved performance and lower system temperature.

Additionally, it fixes the initialization of nominal_freq for each cpudata and changes latency and delay values to be read from platform firmware firstly for more accurate timing.

A new quirk is also added for legacy processors that lack CPPC capabilities, which caused the pstate driver to fail loading.

I would greatly appreciate any feedbacks.

Thank you!

Perry Yuan (6):
ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors cpufreq:amd-pstate: fix the nominal freq value set cpufreq:amd-pstate: initialize nominal_freq of each cpudata cpufreq:amd-pstate: get pstate transition delay and latency value from
ACPI tables
cppc_acpi: print error message if CPPC is unsupported cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

 arch/x86/kernel/acpi/cppc.c  |   2 +-
 drivers/acpi/cppc_acpi.c     |   6 +-
 drivers/cpufreq/amd-pstate.c | 112 ++++++++++++++++++++++++++++-------
 include/linux/amd-pstate.h   |   6 ++
 4 files changed, 102 insertions(+), 24 deletions(-)
Signature · 1 line
2.34.1
author reviewer
#1 lore raw

PATCH 1/6 ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors

As there are some AMD processors which only support CPPC V2 firmware and BIOS implementation, the amd_pstate driver will be failed to load when system booting with below kernel warning message:

[    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled

To make the amd_pstate driver can be loaded on those TR40 processors, it needs to match x86_model from 0x30 to 0x7F for family 17H. With the change, the system can load amd_pstate driver as expected.

Issue: https://bugzilla.kernel.org/show_bug.cgi?id=218171

Fixes fbd74d1689 ("ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory")
---
 arch/x86/kernel/acpi/cppc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/kernel/acpi/cppc.c +1 -1
index 8d8752b44f11..ff8f25faca3d 100644
@@ -20,7 +20,7 @@ bool cpc_supported_by_cpu(void)
 		    (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f)))
 			return true;
 		else if (boot_cpu_data.x86 == 0x17 &&
-			 boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f)
+			 boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f)
 			return true;
 		return boot_cpu_has(X86_FEATURE_CPPC);
 	}
Signature · 1 line
2.34.1
author reviewer
#3 lore raw

PATCH 2/6 cpufreq:amd-pstate: fix the nominal freq value set

In reply to Perry Yuan

Address an untested error where the nominal_freq was returned in KHz instead of the correct MHz units, this oversight led to a wrong nominal_freq set and resued, it will cause the max frequency of core to be initialized with a wrong frequency value.

Fixes ec437d71db7 ("cpufreq: amd-pstate: Introduce a new AMD P-State driver to support future processors")
---
 drivers/cpufreq/amd-pstate.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/cpufreq/amd-pstate.c +1 -2
index 2f8656f75a1d..9291a22bd3cc 100644
@@ -625,8 +625,7 @@ static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	/* Switch to khz */
-	return cppc_perf.nominal_freq * 1000;
+	return cppc_perf.nominal_freq;
 }
 
 static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
Signature · 1 line
2.34.1
author reviewer
#5 lore raw

PATCH 3/6 cpufreq:amd-pstate: initialize nominal_freq of each cpudata

In reply to Perry Yuan

Optimizes the process of retrieving the nominal frequency by utilizing 'cpudata->nominal_freq' instead of repeatedly accessing the cppc_acpi interface.

To enhance efficiency and reduce the CPU load, shifted to using 'cpudata->nominal_freq'. It allows for the nominal frequency to be accessed directly from the cached data in 'cpudata' of each CPU.
It will also slightly reduce the frequency change latency while using pstate driver passive mode.

---
 drivers/cpufreq/amd-pstate.c | 26 ++++++++++++++------------
 1 file changed, 14 insertions(+), 12 deletions(-)
drivers/cpufreq/amd-pstate.c +14 -12
index 9291a22bd3cc..db7b36afdce2 100644
@@ -600,7 +600,7 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	nominal_freq = cppc_perf.nominal_freq;
+	nominal_freq = READ_ONCE(cpudata->nominal_freq);
 	nominal_perf = READ_ONCE(cpudata->nominal_perf);
 	max_perf = READ_ONCE(cpudata->highest_perf);
 
@@ -639,7 +639,7 @@ static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	nominal_freq = cppc_perf.nominal_freq;
+	nominal_freq = READ_ONCE(cpudata->nominal_freq);
 	nominal_perf = READ_ONCE(cpudata->nominal_perf);
 
 	lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
@@ -712,13 +712,15 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	amd_pstate_boost_init(cpudata);
 
 	min_freq = amd_get_min_freq(cpudata);
-	max_freq = amd_get_max_freq(cpudata);
 	nominal_freq = amd_get_nominal_freq(cpudata);
+	cpudata->nominal_freq = nominal_freq;
+	max_freq = amd_get_max_freq(cpudata);
 	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
 
-	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
-			min_freq, max_freq);
+	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
+		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
+			value is incorrect\n",	\
+			min_freq, max_freq, nominal_freq);
 		ret = -EINVAL;
 		goto free_cpudata1;
 	}
@@ -755,7 +757,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	/* Initial processor data capability frequencies */
 	cpudata->max_freq = max_freq;
 	cpudata->min_freq = min_freq;
-	cpudata->nominal_freq = nominal_freq;
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
@@ -1266,12 +1267,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
 	amd_pstate_boost_init(cpudata);
 
 	min_freq = amd_get_min_freq(cpudata);
-	max_freq = amd_get_max_freq(cpudata);
 	nominal_freq = amd_get_nominal_freq(cpudata);
+	cpudata->nominal_freq = nominal_freq;
+	max_freq = amd_get_max_freq(cpudata);
 	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
-	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
-				min_freq, max_freq);
+	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
+		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
+				value is incorrect\n",	\
+				min_freq, max_freq, nominal_freq);
 		ret = -EINVAL;
 		goto free_cpudata1;
 	}
@@ -1284,7 +1287,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
 	/* Initial processor data capability frequencies */
 	cpudata->max_freq = max_freq;
 	cpudata->min_freq = min_freq;
-	cpudata->nominal_freq = nominal_freq;
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
Signature · 1 line
2.34.1
author reviewer
#7 lore raw

PATCH 4/6 cpufreq:amd-pstate: get pstate transition delay and latency value from ACPI tables

In reply to Perry Yuan

make pstate driver initially retrieve the P-state transition delay and latency values from the BIOS ACPI tables which has more reasonable delay and latency values according to the platform design and requirements.

Previously there values were hardcoded at specific value which may have conflicted with platform and it might not reflect the most accurate or optimized setting for the processor.

[054h 0084   8]                Preserve Mask : FFFFFFFF00000000
[05Ch 0092   8]                   Write Mask : 0000000000000001
[064h 0100   4]              Command Latency : 00000FA0
[068h 0104   4]          Maximum Access Rate : 0000EA60
[06Ch 0108   2]      Minimum Turnaround Time : 0000
---
 drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)
drivers/cpufreq/amd-pstate.c +32 -2
index db7b36afdce2..eea2e192d748 100644
@@ -683,6 +683,36 @@ static void amd_perf_ctl_reset(unsigned int cpu)
 	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
 }
 
+/**
+ * Get pstate transition delay time from ACPI tables that firmware set
+ * instead of using hardcode value directly.
+ */
+static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
+{
+	u32 transition_delay_ns;
+
+	transition_delay_ns= cppc_get_transition_latency(cpu);
+	if (transition_delay_ns == CPUFREQ_ETERNAL)
+		return AMD_PSTATE_TRANSITION_DELAY;
+
+	return transition_delay_ns / NSEC_PER_USEC;
+}
+
+/**
+ * Get pstate transition latency value from ACPI tables that firmware set
+ * instead of using hardcode value directly.
+ */
+static u32 amd_pstate_get_transition_latency(unsigned int cpu)
+{
+	u32 transition_latency;
+
+	transition_latency = cppc_get_transition_latency(cpu);
+	if (transition_latency  == CPUFREQ_ETERNAL)
+		return AMD_PSTATE_TRANSITION_LATENCY;
+
+	return transition_latency;
+}
+
 static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 {
 	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
@@ -725,8 +755,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 		goto free_cpudata1;
 	}
 
-	policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY;
-	policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY;
+	policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu);
+	policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu);
 
 	policy->min = min_freq;
 	policy->max = max_freq;
Signature · 1 line
2.34.1
author reviewer
#9 lore raw

PATCH 5/6 cppc_acpi: print error message if CPPC is unsupported

In reply to Perry Yuan

to be more clear what is wrong with CPPC when pstate driver failed to load which has dependency on the CPPC capabilities.

Add one more debug message to notify user if CPPC is not supported by the CPU, then it will be easy to find out what need to fix for pstate driver loading issue.

[    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled

Above message is not clear enough to verify whether CPPC is not supported.

---
 drivers/acpi/cppc_acpi.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/acpi/cppc_acpi.c +4 -2
index 7ff269a78c20..217c11c12b57 100644
@@ -676,8 +676,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
 
 	if (!osc_sb_cppc2_support_acked) {
 		pr_debug("CPPC v2 _OSC not acked\n");
-		if (!cpc_supported_by_cpu())
-			return -ENODEV;
+		if (!cpc_supported_by_cpu()) {
+				pr_debug("CPPC is not supported\n");
+				return -ENODEV;
+			}
 	}
 
 	/* Parse the ACPI _CPC table for this CPU. */
Signature · 1 line
2.34.1
author reviewer
#11 lore raw

PATCH 6/6 cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

In reply to Perry Yuan

Add quirk table to get CPPC capabilities issue fixed by providing correct perf or frequency values while driver loading.

If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those issues fixed with correct workaround values to make pstate driver can be loaded even though there are CPPC capabilities errors.

---
 drivers/cpufreq/amd-pstate.c | 51 +++++++++++++++++++++++++++++++-----
 include/linux/amd-pstate.h   |  6 +++++
 2 files changed, 51 insertions(+), 6 deletions(-)
drivers/cpufreq/amd-pstate.c +45 -6
index eea2e192d748..cbc415af0f08 100644
@@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver;
 static struct cpufreq_driver amd_pstate_epp_driver;
 static int cppc_state = AMD_PSTATE_UNDEFINED;
 static bool cppc_enabled;
+static struct quirk_entry *quirks;
 
 /**
  * struct global_params - Global parameters, mostly tunable via sysfs.
@@ -121,6 +122,32 @@ static unsigned int epp_values[] = {
 
 typedef int (*cppc_mode_transition_fn)(int);
 
+static struct quirk_entry quirk_amd_7k62 = {
+	.nominal_freq = 2600,
+	.lowest_freq = 550,
+};
+
+static int __init dmi_matched(const struct dmi_system_id *dmi)
+{
+	quirks = dmi->driver_data;
+
+	return 1;
+}
+
+static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {
+	{
+		.callback = dmi_matched,
+		.ident = "AMD EPYC 7K62",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_VERSION, "C1"),
+			DMI_MATCH(DMI_PRODUCT_SERIAL, "FX19911000028"),
+		},
+		.driver_data = &quirk_amd_7k62,
+	},
+	{}
+};
+MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);
+
 static inline int get_mode_idx_from_str(const char *str, size_t size)
 {
 	int i;
@@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
 static int amd_get_min_freq(struct amd_cpudata *cpudata)
 {
 	struct cppc_perf_caps cppc_perf;
+	u32 lowest_freq;
 
 	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
 	if (ret)
 		return ret;
 
+	if (quirks && quirks->lowest_freq)
+		lowest_freq = quirks->lowest_freq;
+	else
+		lowest_freq = cppc_perf.lowest_freq;
+
 	/* Switch to khz */
-	return cppc_perf.lowest_freq * 1000;
+	return lowest_freq * 1000;
 }
 
 static int amd_get_max_freq(struct amd_cpudata *cpudata)
@@ -619,13 +652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
 
 static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
 {
-	struct cppc_perf_caps cppc_perf;
+	u32 nominal_freq;
 
-	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
-	if (ret)
-		return ret;
+	if (quirks && quirks->nominal_freq)
+		nominal_freq = quirks->nominal_freq;
+	else
+		nominal_freq = READ_ONCE(cpudata->nominal_freq);
 
-	return cppc_perf.nominal_freq;
+	return nominal_freq;
 }
 
 static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
@@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void)
 	if (cpufreq_get_current_driver())
 		return -EEXIST;
 
+	quirks = NULL;
+
+	/* check if this machine need CPPC quirks */
+	dmi_check_system(amd_pstate_quirks_table);
+
 	switch (cppc_state) {
 	case AMD_PSTATE_UNDEFINED:
 		/* Disable on the following configs by default:
include/linux/amd-pstate.h +6 -0
index 446394f84606..ea80f961607d 100644
@@ -110,4 +110,10 @@ static const char * const amd_pstate_mode_string[] = {
 	[AMD_PSTATE_GUIDED]      = "guided",
 	NULL,
 };
+
+struct quirk_entry {
+	u32 nominal_freq;
+	u32 lowest_freq;
+};
+
 #endif /* _LINUX_AMD_PSTATE_H */
Signature · 1 line
2.34.1
#14 lore raw
In reply to Perry Yuan
Quoted 5 lines · Perry Yuan

The patch series adds some fixes and enhancements to the AMD pstate driver. It enables CPPC v2 for certain processors in the family 17H, as requested by TR40 processor users who expect improved performance and lower system temperature.

Quoted 9 lines

Additionally, it fixes the initialization of nominal_freq for each cpudata and changes latency and delay values to be read from platform firmware firstly for more accurate timing.

A new quirk is also added for legacy processors that lack CPPC capabilities, which caused the pstate driver to fail loading.

I would greatly appreciate any feedbacks.

Hi Perry,

Which tree or patchset is this based on?
It doesn't apply cleanly onto either 6.7 or 6.8.

First I had to revert [1], then apply [2] before applying this patchset and finally reapply [1]. I did not apply the "prefcore" patchset which I keep in a separate branch.

Is this correct or did I mess up something with my branches?

---
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v6.8-rc2&id=febab20caebac959fdc3d7520bc52de8b1184455

[2] https://lore.kernel.org/linux-pm/[email protected]/

Cheers,
Tor Vic

Quoted 18 lines

Thank you!

Perry Yuan (6):
ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors cpufreq:amd-pstate: fix the nominal freq value set cpufreq:amd-pstate: initialize nominal_freq of each cpudata cpufreq:amd-pstate: get pstate transition delay and latency value from
ACPI tables
cppc_acpi: print error message if CPPC is unsupported cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

  arch/x86/kernel/acpi/cppc.c  |   2 +-
  drivers/acpi/cppc_acpi.c     |   6 +-
  drivers/cpufreq/amd-pstate.c | 112 ++++++++++++++++++++++++++++-------
  include/linux/amd-pstate.h   |   6 ++
  4 files changed, 102 insertions(+), 24 deletions(-)
maintainer Reviewed-by on v1 1/6
#2 lore raw

Re: [PATCH 1/6] ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors

In reply to Perry Yuan
Quoted 4 lines · Perry Yuan

As there are some AMD processors which only support CPPC V2 firmware and BIOS implementation, the amd_pstate driver will be failed to load when system booting with below kernel warning message:

Quoted 8 lines
[    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled

To make the amd_pstate driver can be loaded on those TR40 processors, it needs to match x86_model from 0x30 to 0x7F for family 17H. With the change, the system can load amd_pstate driver as expected.

Issue: https://bugzilla.kernel.org/show_bug.cgi?id=218171

s/Issue/Closes/

Quoted 2 lines
Fixes fbd74d1689 ("ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory")

One minor change above.

Quoted 17 lines
---
  arch/x86/kernel/acpi/cppc.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/kernel/acpi/cppc.c +1 -1
index 8d8752b44f11..ff8f25faca3d 100644
@@ -20,7 +20,7 @@ bool cpc_supported_by_cpu(void)
  		    (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f)))
  			return true;
  		else if (boot_cpu_data.x86 == 0x17 &&
-			 boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f)
+			 boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f)
  			return true;
  		return boot_cpu_has(X86_FEATURE_CPPC);
  	}
maintainer Reviewed-by on v1 2/6
#4 lore raw

Re: [PATCH 2/6] cpufreq:amd-pstate: fix the nominal freq value set

In reply to Perry Yuan
Quoted 3 lines · Perry Yuan

Address an untested error where the nominal_freq was returned in KHz instead of the correct MHz units, this oversight led to a wrong nominal_freq set and resued, it will cause the max frequency of core to

s/resued/reused/

Quoted 5 lines

be initialized with a wrong frequency value.

Fixes ec437d71db7 ("cpufreq: amd-pstate: Introduce a new AMD P-State driver to support future processors")

One minor change above.

Quoted 18 lines
---
  drivers/cpufreq/amd-pstate.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
drivers/cpufreq/amd-pstate.c +1 -2
index 2f8656f75a1d..9291a22bd3cc 100644
@@ -625,8 +625,7 @@ static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
  	if (ret)
  		return ret;
 
-	/* Switch to khz */
-	return cppc_perf.nominal_freq * 1000;
+	return cppc_perf.nominal_freq;
  }
 
  static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
maintainer Reviewed-by on v1 3/6
#6 lore raw

Re: [PATCH 3/6] cpufreq:amd-pstate: initialize nominal_freq of each cpudata

In reply to Perry Yuan
Quoted 10 lines · Perry Yuan

Optimizes the process of retrieving the nominal frequency by utilizing 'cpudata->nominal_freq' instead of repeatedly accessing the cppc_acpi interface.

To enhance efficiency and reduce the CPU load, shifted to using 'cpudata->nominal_freq'. It allows for the nominal frequency to be accessed directly from the cached data in 'cpudata' of each CPU.
It will also slightly reduce the frequency change latency while using pstate driver passive mode.

Quoted 81 lines
---
  drivers/cpufreq/amd-pstate.c | 26 ++++++++++++++------------
  1 file changed, 14 insertions(+), 12 deletions(-)
drivers/cpufreq/amd-pstate.c +14 -12
index 9291a22bd3cc..db7b36afdce2 100644
@@ -600,7 +600,7 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
  	if (ret)
  		return ret;
 
-	nominal_freq = cppc_perf.nominal_freq;
+	nominal_freq = READ_ONCE(cpudata->nominal_freq);
  	nominal_perf = READ_ONCE(cpudata->nominal_perf);
  	max_perf = READ_ONCE(cpudata->highest_perf);
 
@@ -639,7 +639,7 @@ static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
  	if (ret)
  		return ret;
 
-	nominal_freq = cppc_perf.nominal_freq;
+	nominal_freq = READ_ONCE(cpudata->nominal_freq);
  	nominal_perf = READ_ONCE(cpudata->nominal_perf);
 
  	lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
@@ -712,13 +712,15 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
  	amd_pstate_boost_init(cpudata);
 
  	min_freq = amd_get_min_freq(cpudata);
-	max_freq = amd_get_max_freq(cpudata);
  	nominal_freq = amd_get_nominal_freq(cpudata);
+	cpudata->nominal_freq = nominal_freq;
+	max_freq = amd_get_max_freq(cpudata);
  	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
 
-	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
-			min_freq, max_freq);
+	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
+		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
+			value is incorrect\n",	\
+			min_freq, max_freq, nominal_freq);
  		ret = -EINVAL;
  		goto free_cpudata1;
  	}
@@ -755,7 +757,6 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
  	/* Initial processor data capability frequencies */
  	cpudata->max_freq = max_freq;
  	cpudata->min_freq = min_freq;
-	cpudata->nominal_freq = nominal_freq;
  	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
  	policy->driver_data = cpudata;
@@ -1266,12 +1267,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
  	amd_pstate_boost_init(cpudata);
 
  	min_freq = amd_get_min_freq(cpudata);
-	max_freq = amd_get_max_freq(cpudata);
  	nominal_freq = amd_get_nominal_freq(cpudata);
+	cpudata->nominal_freq = nominal_freq;
+	max_freq = amd_get_max_freq(cpudata);
  	lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata);
-	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) {
-		dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n",
-				min_freq, max_freq);
+	if (min_freq < 0 || max_freq < 0 || min_freq > max_freq || nominal_freq == 0) {
+		dev_err(dev, "min_freq(%d) or max_freq(%d) or nominal_freq(%d)	\
+				value is incorrect\n",	\
+				min_freq, max_freq, nominal_freq);
  		ret = -EINVAL;
  		goto free_cpudata1;
  	}
@@ -1284,7 +1287,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
  	/* Initial processor data capability frequencies */
  	cpudata->max_freq = max_freq;
  	cpudata->min_freq = min_freq;
-	cpudata->nominal_freq = nominal_freq;
  	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
  	policy->driver_data = cpudata;
maintainer Reviewed-by on v1 4/6
#8 lore raw

Re: [PATCH 4/6] cpufreq:amd-pstate: get pstate transition delay and latency value from ACPI tables

In reply to Perry Yuan
Quoted 8 lines · Perry Yuan

make pstate driver initially retrieve the P-state transition delay and latency values from the BIOS ACPI tables which has more reasonable delay and latency values according to the platform design and requirements.

Previously there values were hardcoded at specific value which may have conflicted with platform and it might not reflect the most accurate or optimized setting for the processor.

Quoted 7 lines
[054h 0084   8]                Preserve Mask : FFFFFFFF00000000
[05Ch 0092   8]                   Write Mask : 0000000000000001
[064h 0100   4]              Command Latency : 00000FA0
[068h 0104   4]          Maximum Access Rate : 0000EA60
[06Ch 0108   2]      Minimum Turnaround Time : 0000

One comment below.

Quoted 11 lines
---
  drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++--
  1 file changed, 32 insertions(+), 2 deletions(-)
drivers/cpufreq/amd-pstate.c +0 -0
index db7b36afdce2..eea2e192d748 100644
@@ -683,6 +683,36 @@ static void amd_perf_ctl_reset(unsigned int cpu)
  	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
  }

drivers/cpufreq/amd-pstate.c static void amd_perf_ctl_reset(unsigned int cpu) · line 694

Quoted 10 lines
drivers/cpufreq/amd-pstate.c +9 -0
 
+/**
+ * Get pstate transition delay time from ACPI tables that firmware set
+ * instead of using hardcode value directly.
+ */
+static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)
+{
+	u32 transition_delay_ns;
+
+	transition_delay_ns= cppc_get_transition_latency(cpu);

space before the =

Quoted 35 lines
drivers/cpufreq/amd-pstate.c +23 -2
+	if (transition_delay_ns == CPUFREQ_ETERNAL)
+		return AMD_PSTATE_TRANSITION_DELAY;
+
+	return transition_delay_ns / NSEC_PER_USEC;
+}
+
+/**
+ * Get pstate transition latency value from ACPI tables that firmware set
+ * instead of using hardcode value directly.
+ */
+static u32 amd_pstate_get_transition_latency(unsigned int cpu)
+{
+	u32 transition_latency;
+
+	transition_latency = cppc_get_transition_latency(cpu);
+	if (transition_latency  == CPUFREQ_ETERNAL)
+		return AMD_PSTATE_TRANSITION_LATENCY;
+
+	return transition_latency;
+}
+
  static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
  {
  	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
@@ -725,8 +755,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
  		goto free_cpudata1;
  	}
 
-	policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY;
-	policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY;
+	policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu);
+	policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu);
 
  	policy->min = min_freq;
  	policy->max = max_freq;
#10 lore raw

Re: [PATCH 5/6] cppc_acpi: print error message if CPPC is unsupported

In reply to Perry Yuan
Quoted 21 lines · Perry Yuan

to be more clear what is wrong with CPPC when pstate driver failed to load which has dependency on the CPPC capabilities.

Add one more debug message to notify user if CPPC is not supported by the CPU, then it will be easy to find out what need to fix for pstate driver loading issue.

[    0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled

Above message is not clear enough to verify whether CPPC is not supported.

---
  drivers/acpi/cppc_acpi.c | 6 ++++--
  1 file changed, 4 insertions(+), 2 deletions(-)
drivers/acpi/cppc_acpi.c +0 -0
index 7ff269a78c20..217c11c12b57 100644

drivers/acpi/cppc_acpi.c int acpi_cppc_processor_probe(struct acpi_processor *pr) · line 680

Quoted 7 lines
drivers/acpi/cppc_acpi.c +2 -2
@@ -676,8 +676,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
 
  	if (!osc_sb_cppc2_support_acked) {
  		pr_debug("CPPC v2 _OSC not acked\n");
-		if (!cpc_supported_by_cpu())
-			return -ENODEV;
+		if (!cpc_supported_by_cpu()) {
+				pr_debug("CPPC is not supported\n");

I would argue this doesn't add any value to a user. To help a user it should be "CPPC is not supported by the CPU".

drivers/acpi/cppc_acpi.c int acpi_cppc_processor_probe(struct acpi_processor *pr) · line 682

Quoted 2 lines
drivers/acpi/cppc_acpi.c +2 -0
+				return -ENODEV;
+			}

This whitespace is wrong

Quoted 3 lines
drivers/acpi/cppc_acpi.c +0 -0
  	}
 
  	/* Parse the ACPI _CPC table for this CPU. */
#12 lore raw

Re: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

In reply to Perry Yuan
Quoted 5 lines · Perry Yuan

Add quirk table to get CPPC capabilities issue fixed by providing correct perf or frequency values while driver loading.

If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those

s/quick/quirk/

Quoted 1 line

issues fixed with correct workaround values to make pstate driver

to allow the pstate driver

Quoted 22 lines

can be loaded even though there are CPPC capabilities errors.

---
  drivers/cpufreq/amd-pstate.c | 51 +++++++++++++++++++++++++++++++-----
  include/linux/amd-pstate.h   |  6 +++++
  2 files changed, 51 insertions(+), 6 deletions(-)
drivers/cpufreq/amd-pstate.c +1 -0
index eea2e192d748..cbc415af0f08 100644
@@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver;
  static struct cpufreq_driver amd_pstate_epp_driver;
  static int cppc_state = AMD_PSTATE_UNDEFINED;
  static bool cppc_enabled;
+static struct quirk_entry *quirks;
 
  /**
   * struct global_params - Global parameters, mostly tunable via sysfs.
@@ -121,6 +122,32 @@ static unsigned int epp_values[] = {
 

drivers/cpufreq/amd-pstate.c static unsigned int epp_values[] = { · line 132

Quoted 10 lines
drivers/cpufreq/amd-pstate.c +8 -0
  typedef int (*cppc_mode_transition_fn)(int);
 
+static struct quirk_entry quirk_amd_7k62 = {
+	.nominal_freq = 2600,
+	.lowest_freq = 550,
+};
+
+static int __init dmi_matched(const struct dmi_system_id *dmi)
+{
+	quirks = dmi->driver_data; > +

Under the presumption that the quirk list will grow as more buggy older machines are identified, maybe it's worth having a dyndbg or info statement here to indicate that it's using quirked values for dmi->ident.

drivers/cpufreq/amd-pstate.c static unsigned int epp_values[] = { · line 143

Quoted 10 lines
drivers/cpufreq/amd-pstate.c +10 -0
+	return 1;
+}
+
+static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {
+	{
+		.callback = dmi_matched,
+		.ident = "AMD EPYC 7K62",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_VERSION, "C1"),
+			DMI_MATCH(DMI_PRODUCT_SERIAL, "FX19911000028"),

This is way too specific isn't it? It would only load on that single system I would expect. But I think you want to have an entry that matches the DMI_PRODUCT_NAME or DMI_FAMILY_NAME instead most likely.

Quoted 32 lines
drivers/cpufreq/amd-pstate.c +14 -1
+		},
+		.driver_data = &quirk_amd_7k62,
+	},
+	{}
+};
+MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);
+
  static inline int get_mode_idx_from_str(const char *str, size_t size)
  {
  	int i;
@@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
  static int amd_get_min_freq(struct amd_cpudata *cpudata)
  {
  	struct cppc_perf_caps cppc_perf;
+	u32 lowest_freq;
 
  	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
  	if (ret)
  		return ret;
 
+	if (quirks && quirks->lowest_freq)
+		lowest_freq = quirks->lowest_freq;
+	else
+		lowest_freq = cppc_perf.lowest_freq;
+
  	/* Switch to khz */
-	return cppc_perf.lowest_freq * 1000;
+	return lowest_freq * 1000;
  }
 
  static int amd_get_max_freq(struct amd_cpudata *cpudata)

drivers/cpufreq/amd-pstate.c static int amd_get_max_freq(struct amd_cpudata *cpudata) · line 626

Quoted 9 lines
drivers/cpufreq/amd-pstate.c +1 -4
@@ -619,13 +652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
 
  static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
  {
-	struct cppc_perf_caps cppc_perf;
+	u32 nominal_freq;
 
-	int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
-	if (ret)
-		return ret;

I think this hunk should be earlier in your series. Conceptually it seems to match what patch 3 does to me.

Quoted 37 lines
drivers/cpufreq/amd-pstate.c +10 -1
+	if (quirks && quirks->nominal_freq)
+		nominal_freq = quirks->nominal_freq;
+	else
+		nominal_freq = READ_ONCE(cpudata->nominal_freq);
 
-	return cppc_perf.nominal_freq;
+	return nominal_freq;
  }
 
  static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata)
@@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void)
  	if (cpufreq_get_current_driver())
  		return -EEXIST;
 
+	quirks = NULL;
+
+	/* check if this machine need CPPC quirks */
+	dmi_check_system(amd_pstate_quirks_table);
+
  	switch (cppc_state) {
  	case AMD_PSTATE_UNDEFINED:
  		/* Disable on the following configs by default:
include/linux/amd-pstate.h +6 -0
index 446394f84606..ea80f961607d 100644
@@ -110,4 +110,10 @@ static const char * const amd_pstate_mode_string[] = {
  	[AMD_PSTATE_GUIDED]      = "guided",
  	NULL,
  };
+
+struct quirk_entry {
+	u32 nominal_freq;
+	u32 lowest_freq;
+};
+
  #endif /* _LINUX_AMD_PSTATE_H */
author reviewer
#13 lore raw

RE: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

[AMD Official Use Only - General]

Hi Mario,

Quoted 53 lines

-----Original Message-----
From: Limonciello, Mario <[email protected]>
Sent: Thursday, February 1, 2024 6:00 AM
To: Yuan, Perry <[email protected]>; [email protected]; [email protected]; Huang, Ray <[email protected]>; Shenoy, Gautham Ranjal <[email protected]>; Petkov, Borislav <[email protected]>
Cc: Deucher, Alexander <[email protected]>; Huang, Shimmer <[email protected]>; Du, Xiaojian <[email protected]>; Meng, Li (Jassmine) <[email protected]>; [email protected]; linux- [email protected]
Subject: Re: [PATCH 6/6] cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities missing

Quoted 5 lines · Perry Yuan

Add quirk table to get CPPC capabilities issue fixed by providing correct perf or frequency values while driver loading.

If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those

s/quick/quirk/

Quoted 1 line

issues fixed with correct workaround values to make pstate driver

to allow the pstate driver

Quoted 5 lines

can be loaded even though there are CPPC capabilities errors.

---
  drivers/cpufreq/amd-pstate.c | 51

+++++++++++++++++++++++++++++++-----

Quoted 5 lines
  include/linux/amd-pstate.h   |  6 +++++
  2 files changed, 51 insertions(+), 6 deletions(-)
(quoted diff) +0 -0

b/drivers/cpufreq/amd-pstate.c index eea2e192d748..cbc415af0f08

100644

Quoted 14 lines
drivers/cpufreq/amd-pstate.c +1 -0
@@ -64,6 +64,7 @@ static struct cpufreq_driver amd_pstate_driver;
  static struct cpufreq_driver amd_pstate_epp_driver;
  static int cppc_state = AMD_PSTATE_UNDEFINED;
  static bool cppc_enabled;
+static struct quirk_entry *quirks;
 
  /**
   * struct global_params - Global parameters, mostly tunable via sysfs.
@@ -121,6 +122,32 @@ static unsigned int epp_values[] = {
 
  typedef int (*cppc_mode_transition_fn)(int);
 
Quoted 11 lines

drivers/cpufreq/amd-pstate.c static unsigned int epp_values[] = {

Quoted 7 lines
drivers/cpufreq/amd-pstate.c +7 -0
+static struct quirk_entry quirk_amd_7k62 = {
+   .nominal_freq = 2600,
+   .lowest_freq = 550,
+};
+
+static int __init dmi_matched(const struct dmi_system_id *dmi) {
+   quirks = dmi->driver_data; > +

Under the presumption that the quirk list will grow as more buggy older machines are identified, maybe it's worth having a dyndbg or info statement here to indicate that it's using quirked values for dmi->ident.

Added a debug line in V2.

Quoted 13 lines

drivers/cpufreq/amd-pstate.c static unsigned int epp_values[] = {

Quoted 11 lines
drivers/cpufreq/amd-pstate.c +10 -0
+   return 1;
+}
+
+static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = {
+   {
+           .callback = dmi_matched,
+           .ident = "AMD EPYC 7K62",
+           .matches = {
+                   DMI_MATCH(DMI_PRODUCT_VERSION, "C1"),
+                   DMI_MATCH(DMI_PRODUCT_SERIAL,

"FX19911000028"),

Quoted 3 lines

This is way too specific isn't it? It would only load on that single system I would expect. But I think you want to have an entry that matches the DMI_PRODUCT_NAME or DMI_FAMILY_NAME instead most likely.

Yes, nominally we use DMI_PRODUCT_NAME or DMI_FAMILY_NAME,
Current quirk for 7K62 is special added for a AMD customer I did not get permission to exposure the product information. It is used by a specific system which has broken BIOS, there are lots of server nodes that cannot upgrade BIOS. So we match the system with version and serial number for the special fix.

If users have other products for quirks fix, we still can use DMI_PRODUCT_NAME or DMI_FAMILY_NAME in the next matches.

Perry.

Quoted 40 lines

drivers/cpufreq/amd-pstate.c static void amd_pstate_adjust_perf(unsigned int

Quoted 12 lines
drivers/cpufreq/amd-pstate.c +7 -0
+           },
+           .driver_data = &quirk_amd_7k62,
+   },
+   {}
+};
+MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table);
+
  static inline int get_mode_idx_from_str(const char *str, size_t size)
  {
    int i;
@@ -581,13 +608,19 @@ static void amd_pstate_adjust_perf(unsigned int

cpu,

Quoted 27 lines
drivers/cpufreq/amd-pstate.c +9 -2
  static int amd_get_min_freq(struct amd_cpudata *cpudata)
  {
    struct cppc_perf_caps cppc_perf;
+   u32 lowest_freq;
 
    int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
    if (ret)
            return ret;
 
+   if (quirks && quirks->lowest_freq)
+           lowest_freq = quirks->lowest_freq;
+   else
+           lowest_freq = cppc_perf.lowest_freq;
+
    /* Switch to khz */
-   return cppc_perf.lowest_freq * 1000;
+   return lowest_freq * 1000;
  }
 
  static int amd_get_max_freq(struct amd_cpudata *cpudata) @@ -619,13
+652,14 @@ static int amd_get_max_freq(struct amd_cpudata *cpudata)
 
  static int amd_get_nominal_freq(struct amd_cpudata *cpudata)
  {
-   struct cppc_perf_caps cppc_perf;
+   u32 nominal_freq;
Quoted 6 lines

drivers/cpufreq/amd-pstate.c static int amd_get_max_freq(struct amd_cpudata *cpudata) · line 626

Quoted 3 lines
drivers/cpufreq/amd-pstate.c +0 -3
-   int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf);
-   if (ret)
-           return ret;

I think this hunk should be earlier in your series. Conceptually it seems to match what patch 3 does to me.

It is a mistake that remove the code here.
I have fixed it in the V2 and tested the patches work as expected.

Quoted 39 lines

include/linux/amd-pstate.h static const char * const

Quoted 28 lines
drivers/cpufreq/amd-pstate.c +5 -1
+   if (quirks && quirks->nominal_freq)
+           nominal_freq = quirks->nominal_freq;
+   else
+           nominal_freq = READ_ONCE(cpudata->nominal_freq);
 
-   return cppc_perf.nominal_freq;
+   return nominal_freq;
  }
 
  static int amd_get_lowest_nonlinear_freq(struct amd_cpudata

*cpudata) @@ -1623,6 +1657,11 @@ static int __init amd_pstate_init(void)

    if (cpufreq_get_current_driver())
            return -EEXIST;
drivers/cpufreq/amd-pstate.c +5 -0
+   quirks = NULL;
+
+   /* check if this machine need CPPC quirks */
+   dmi_check_system(amd_pstate_quirks_table);
+
    switch (cppc_state) {
    case AMD_PSTATE_UNDEFINED:
            /* Disable on the following configs by default:
include/linux/amd-pstate.h +0 -0
index 446394f84606..ea80f961607d 100644
@@ -110,4 +110,10 @@ static const char * const

amd_pstate_mode_string[] = {

Quoted 10 lines
include/linux/amd-pstate.h +6 -0
    [AMD_PSTATE_GUIDED]      = "guided",
    NULL,
  };
+
+struct quirk_entry {
+   u32 nominal_freq;
+   u32 lowest_freq;
+};
+
  #endif /* _LINUX_AMD_PSTATE_H */
author reviewer
#15 lore raw
In reply to Tor Vic

[AMD Official Use Only - General]

Hi Vic

Quoted 33 lines

-----Original Message-----
From: Tor Vic <[email protected]>
Sent: Wednesday, January 31, 2024 7:37 PM
To: Yuan, Perry <[email protected]>; [email protected]; Limonciello, Mario <[email protected]>; [email protected]; Huang, Ray <[email protected]>; Shenoy, Gautham Ranjal <[email protected]>; Petkov, Borislav <[email protected]>
Cc: Deucher, Alexander <[email protected]>; Huang, Shimmer <[email protected]>; Du, Xiaojian <[email protected]>; Meng, Li (Jassmine) <[email protected]>; [email protected]; linux- [email protected]
Subject: Re: [PATCH 0/6] AMD Pstate Fixes And Enhancements

Quoted 5 lines · Perry Yuan

The patch series adds some fixes and enhancements to the AMD pstate driver. It enables CPPC v2 for certain processors in the family 17H, as requested by TR40 processor users who expect improved performance and lower system temperature.

Quoted 9 lines

Additionally, it fixes the initialization of nominal_freq for each cpudata and changes latency and delay values to be read from platform firmware firstly for more accurate timing.

A new quirk is also added for legacy processors that lack CPPC capabilities, which caused the pstate driver to fail loading.

I would greatly appreciate any feedbacks.

Hi Perry,

Quoted 8 lines

Which tree or patchset is this based on?
It doesn't apply cleanly onto either 6.7 or 6.8.

First I had to revert [1], then apply [2] before applying this patchset and finally reapply [1].
I did not apply the "prefcore" patchset which I keep in a separate branch.

Is this correct or did I mess up something with my branches?

Hi Tor,

I have rebased the series to Linux-pm 6.8 rc2, you can pull the Linux-pm/bleeding-edge and apply the patches on top of that. The part 1 prefer core patches are already merged into Linux-pm tree, so you can just merge this series Here is the V2 https://lore.kernel.org/lkml/[email protected]/

git clone https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
git checkout bleeding-edge

Perry.

Quoted 31 lines

---
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v6.
8-rc2&id=febab20caebac959fdc3d7520bc52de8b1184455

[2]
https://lore.kernel.org/linux-pm/[email protected]/

Cheers,
Tor Vic

Quoted 19 lines

Thank you!

Perry Yuan (6):
ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors cpufreq:amd-pstate: fix the nominal freq value set cpufreq:amd-pstate: initialize nominal_freq of each cpudata cpufreq:amd-pstate: get pstate transition delay and latency value from
ACPI tables
cppc_acpi: print error message if CPPC is unsupported cpufreq:amd-pstate: add quirk for the pstate CPPC capabilities
missing

  arch/x86/kernel/acpi/cppc.c  |   2 +-
  drivers/acpi/cppc_acpi.c     |   6 +-
  drivers/cpufreq/amd-pstate.c | 112 ++++++++++++++++++++++++++++-------
  include/linux/amd-pstate.h   |   6 ++
  4 files changed, 102 insertions(+), 24 deletions(-)