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Add add spi-nand flash controller driver for EN7581

PATCH In review Lorenzo Bianconi 3 participants 9 messages May 1, 2024 – May 3, 2024

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Lorenzo Bianconi

author maintainer
#0 lore raw

v6 cover Add add spi-nand flash controller driver for EN7581

Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM EN7581 SoCs.

Changes since v5:
- modify patch commit logs
- cosmetic rework
Changes since v4:
- rely on devm_platform_ioremap_resource() routine
- rework airoha_snand_is_page_ops() routine
Changes since v3:
- rely on devm_kzalloc() to allocate airoha_snand_dev buffers
- rely on dev_err_probe()
- cosmetic rework
Changes since v2:
- Fix compilation warnings
- Remove interrupt entry in dts since it is not connected so far Changes since v1:
- Introduce spi clock dependency

Lorenzo Bianconi (3):
spi: dt-bindings: Add binding doc for spi-airoha-snfi
arm64: dts: airoha: en7581: Add spi-nand node
spi: airoha: Add spi-nand flash controller driver

 .../bindings/spi/airoha,en7581-snand.yaml     |   65 +
 MAINTAINERS                                   |    9 +
 arch/arm64/boot/dts/airoha/en7581.dtsi        |   19 +
 drivers/spi/Kconfig                           |   10 +
 drivers/spi/Makefile                          |    1 +
 drivers/spi/spi-airoha-snfi.c                 | 1124 +++++++++++++++++
 6 files changed, 1228 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
 create mode 100644 drivers/spi/spi-airoha-snfi.c
Signature · 1 line
2.44.0
author maintainer
#1 lore raw

PATCH v6 1/3 spi: dt-bindings: Add binding doc for spi-airoha-snfi

Introduce device-tree binding documentation for Airoha EN7581 SPI-NAND Flash Interface.

---
 .../bindings/spi/airoha,en7581-snand.yaml     | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml new file +65 -0
new file mode 100644
index 000000000000..b820c5613dcc
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/airoha,en7581-snand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI-NAND flash controller for Airoha ARM SoCs
+
+maintainers:
+  - Lorenzo Bianconi <[email protected]>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    const: airoha,en7581-snand
+
+  reg:
+    items:
+      - description: spi base address
+      - description: nfi2spi base address
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: spi
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/en7523-clk.h>
+
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      spi@1fa10000 {
+        compatible = "airoha,en7581-snand";
+        reg = <0x0 0x1fa10000 0x0 0x140>,
+              <0x0 0x1fa11000 0x0 0x160>;
+
+        clocks = <&scuclk EN7523_CLK_SPI>;
+        clock-names = "spi";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        flash@0 {
+          compatible = "spi-nand";
+          reg = <0>;
+          spi-tx-bus-width = <1>;
+          spi-rx-bus-width = <2>;
+        };
+      };
+    };
Signature · 1 line
2.44.0
author maintainer
#2 lore raw

PATCH v6 2/3 arm64: dts: airoha: en7581: Add spi-nand node

In reply to Lorenzo Bianconi

Introduce the Airoha EN7581 spi-nand node in Airoha EN7581 dtsi

---
 arch/arm64/boot/dts/airoha/en7581.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/airoha/en7581.dtsi +19 -0
index 5c4bfe3e1e5a..98c2a86086e1 100644
@@ -159,5 +159,24 @@ scuclk: clock-controller@1fa20000 {
 			      <0x0 0x1fbe3400 0x0 0xfc>;
 			#clock-cells = <1>;
 		};
+
+		snfi: spi@1fa10000 {
+			compatible = "airoha,en7581-snand";
+			reg = <0x0 0x1fa10000 0x0 0x140>,
+			      <0x0 0x1fa11000 0x0 0x160>;
+
+			clocks = <&scuclk EN7523_CLK_SPI>;
+			clock-names = "spi";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spi_nand: nand@0 {
+				compatible = "spi-nand";
+				reg = <0>;
+				spi-max-frequency = <50000000>;
+				spi-tx-bus-width = <1>;
+				spi-rx-bus-width = <2>;
+			};
+		};
 	};
 };
Signature · 1 line
2.44.0
author maintainer
#3 lore raw

PATCH v6 3/3 spi: airoha: Add spi-nand flash controller driver

In reply to Lorenzo Bianconi

Introduce support for spi-nand driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

---
 MAINTAINERS                   |    9 +
 drivers/spi/Kconfig           |   10 +
 drivers/spi/Makefile          |    1 +
 drivers/spi/spi-airoha-snfi.c | 1124 +++++++++++++++++++++++++++++++++
 4 files changed, 1144 insertions(+)
 create mode 100644 drivers/spi/spi-airoha-snfi.c
MAINTAINERS +9 -0
index aa3b947fb080..ce9fac46f741 100644
@@ -653,6 +653,15 @@ S:	Supported
 F:	fs/aio.c
 F:	include/linux/*aio*.h
 
+AIROHA SPI SNFI DRIVER
+M:	Lorenzo Bianconi <[email protected]>
+M:	Ray Liu <[email protected]>
+L:	[email protected] (moderated for non-subscribers)
+L:	[email protected]
+S:	Maintained
+F:	Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
+F:	drivers/spi/spi-airoha.c
+
 AIRSPY MEDIA DRIVER
 L:	[email protected]
 S:	Orphan
drivers/spi/Kconfig +10 -0
index bc7021da2fe9..6fa91775f334 100644
@@ -57,6 +57,16 @@ config SPI_MEM
 
 comment "SPI Master Controller Drivers"
 
+config SPI_AIROHA_SNFI
+	tristate "Airoha SPI NAND Flash Interface"
+	depends on ARCH_AIROHA || COMPILE_TEST
+	depends on SPI_MASTER
+	select REGMAP_MMIO
+	help
+	  This enables support for SPI-NAND mode on the Airoha NAND
+	  Flash Interface found on Airoha ARM SoCs. This controller
+	  is implemented as a SPI-MEM controller.
+
 config SPI_ALTERA
 	tristate "Altera SPI Controller platform driver"
 	select SPI_ALTERA_CORE
drivers/spi/Makefile +1 -0
index 4ff8d725ba5e..e694254dec04 100644
@@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_SPIDEV)		+= spidev.o
 obj-$(CONFIG_SPI_LOOPBACK_TEST)		+= spi-loopback-test.o
 
 # SPI master controller drivers (bus)
+obj-$(CONFIG_SPI_AIROHA_SNFI)		+= spi-airoha-snfi.o
 obj-$(CONFIG_SPI_ALTERA)		+= spi-altera-platform.o
 obj-$(CONFIG_SPI_ALTERA_CORE)		+= spi-altera-core.o
 obj-$(CONFIG_SPI_ALTERA_DFL)		+= spi-altera-dfl.o
drivers/spi/spi-airoha-snfi.c new file +1124 -0

1,124 lines not on this page · raw message

Signature · 1 line
2.44.0
maintainer
#4 lore raw

Re: [PATCH v6 3/3] spi: airoha: Add spi-nand flash controller driver

Quoted 2 lines · Lorenzo Bianconi

Introduce support for spi-nand driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

This doesn't apply against current code, please check and resend.

author maintainer
#5 lore raw

Re: [PATCH v6 3/3] spi: airoha: Add spi-nand flash controller driver

Quoted 5 lines · Lorenzo Bianconi
Quoted 2 lines

Introduce support for spi-nand driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

This doesn't apply against current code, please check and resend.

Hi Mark,

patch v6 3/3 has just a couple of cosmetic changes requested by Andy with respect to v5 3/3.

@Andy: do you think we can drop these changes or do you prefer to add them? (in the latter case I can post an incremental patch).

Regards,
Lorenzo

#6 lore raw

Re: [PATCH v6 3/3] spi: airoha: Add spi-nand flash controller driver

Quoted 7 lines · Lorenzo Bianconi
Quoted 6 lines · Lorenzo Bianconi
Quoted 2 lines

Introduce support for spi-nand driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

This doesn't apply against current code, please check and resend.

Quoted 7 lines

Hi Mark,

patch v6 3/3 has just a couple of cosmetic changes requested by Andy with respect to v5 3/3.

@Andy: do you think we can drop these changes or do you prefer to add them? (in the latter case I can post an incremental patch).

I am not sure what this is about, do you mean the changes asked by me made this driver not applicable?

Signature · 2 lines
With Best Regards,
Andy Shevchenko
author maintainer
#7 lore raw

Re: [PATCH v6 3/3] spi: airoha: Add spi-nand flash controller driver

Quoted 10 lines · Lorenzo Bianconi
Quoted 9 lines
Quoted 6 lines · Lorenzo Bianconi
Quoted 2 lines

Introduce support for spi-nand driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

This doesn't apply against current code, please check and resend.

Hi Mark,

Quoted 9 lines
Quoted 5 lines

patch v6 3/3 has just a couple of cosmetic changes requested by Andy with respect to v5 3/3.

@Andy: do you think we can drop these changes or do you prefer to add them? (in the latter case I can post an incremental patch).

I am not sure what this is about, do you mean the changes asked by me made this driver not applicable?

These are the only changes between patch v5 3/3 (applied by Mark) and patch v6 3/3:

spi/spi-airoha-snfi.c renamed from tmp/spi-airoha-snfi.c +13 -18
@@ -638,9 +638,9 @@
 					u64 offs, size_t len, void *buf)
 {
 	struct spi_device *spi = desc->mem->spi;
+	struct airoha_snand_ctrl *as_ctrl = spi_controller_get_devdata(spi->controller);
 	struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
 	struct spi_mem_op *op = &desc->info.op_tmpl;
-	struct airoha_snand_ctrl *as_ctrl;
 	u32 val, rd_mode;
 	int err;
 
@@ -661,7 +661,6 @@
 		break;
 	}
 
-	as_ctrl = spi_controller_get_devdata(spi->controller);
 	err = airoha_snand_set_mode(as_ctrl, SPI_MODE_DMA);
 	if (err < 0)
 		return err;
@@ -768,13 +767,12 @@
 					 u64 offs, size_t len, const void *buf)
 {
 	struct spi_device *spi = desc->mem->spi;
+	struct airoha_snand_ctrl *as_ctrl = spi_controller_get_devdata(spi->controller);
 	struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
 	struct spi_mem_op *op = &desc->info.op_tmpl;
-	struct airoha_snand_ctrl *as_ctrl;
 	u32 wr_mode, val;
 	int err;
 
-	as_ctrl = spi_controller_get_devdata(spi->controller);
 	err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL);
 	if (err < 0)
 		return err;
@@ -885,12 +883,12 @@
 static int airoha_snand_exec_op(struct spi_mem *mem,
 				const struct spi_mem_op *op)
 {
-	struct airoha_snand_dev *as_dev = spi_get_ctldata(mem->spi);
+	struct spi_device *spi = mem->spi;
+	struct airoha_snand_ctrl *as_ctrl = spi_controller_get_devdata(spi->controller);
+	struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
 	u8 data[8], cmd, opcode = op->cmd.opcode;
-	struct airoha_snand_ctrl *as_ctrl;
 	int i, err;
 
-	as_ctrl = spi_controller_get_devdata(mem->spi->controller);
 	if (opcode == SPI_NAND_OP_PROGRAM_EXECUTE &&
 	    op->addr.val == as_dev->cur_page_num) {
 		as_dev->data_need_update = true;
@@ -965,11 +963,9 @@
 
 static int airoha_snand_setup(struct spi_device *spi)
 {
-	struct airoha_snand_ctrl *as_ctrl;
+	struct airoha_snand_ctrl *as_ctrl = spi_controller_get_devdata(spi->controller);
 	struct airoha_snand_dev *as_dev;
 
-	as_ctrl = spi_controller_get_devdata(spi->controller);
-
 	as_dev = devm_kzalloc(as_ctrl->dev, sizeof(*as_dev), GFP_KERNEL);
 	if (!as_dev)
 		return -ENOMEM;
@@ -994,10 +990,9 @@
 
 static void airoha_snand_cleanup(struct spi_device *spi)
 {
+	struct airoha_snand_ctrl *as_ctrl = spi_controller_get_devdata(spi->controller);
 	struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
-	struct airoha_snand_ctrl *as_ctrl;
 
-	as_ctrl = spi_controller_get_devdata(spi->controller);
 	dma_unmap_single(as_ctrl->dev, as_dev->dma_addr,
 			 as_dev->buf_len, DMA_BIDIRECTIONAL);
 	spi_set_ctldata(spi, NULL);
@@ -1049,12 +1044,6 @@
 	.max_register	= REG_SPI_NFI_SNF_NFI_CNFG,
 };
 
-static const struct of_device_id airoha_snand_ids[] = {
-	{ .compatible	= "airoha,en7581-snand" },
-	{ /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, airoha_snand_ids);
-
 static int airoha_snand_probe(struct platform_device *pdev)
 {
 	struct airoha_snand_ctrl *as_ctrl;
@@ -1114,6 +1103,12 @@
 	return devm_spi_register_controller(dev, ctrl);
 }
 
+static const struct of_device_id airoha_snand_ids[] = {
+	{ .compatible	= "airoha,en7581-snand" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, airoha_snand_ids);
+
 static struct platform_driver airoha_snand_driver = {
 	.driver = {
 		.name = "airoha-spi",

As you can see the only differences are your comments about patch v5 3/3:
- initialize struct airoha_snand_ctrl *as_ctrl initialization as we did for struct airoha_snand_dev *as_dev pointer.
- move struct of_device_id airoha_snand_ids below airoha_snand_probe routine.

My question is if we can drop those changes (they are just cosmetics) or do you prefer to add them as incremental patch.

Regards,
Lorenzo

Quoted 4 lines
Signature · 3 lines
-- 
With Best Regards,
Andy Shevchenko
#8 lore raw

Re: [PATCH v6 3/3] spi: airoha: Add spi-nand flash controller driver

Quoted 14 lines · Lorenzo Bianconi
Quoted 14 lines · Lorenzo Bianconi
Quoted 12 lines
Quoted 6 lines · Lorenzo Bianconi
Quoted 2 lines

Introduce support for spi-nand driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

This doesn't apply against current code, please check and resend.

Hi Mark,

patch v6 3/3 has just a couple of cosmetic changes requested by Andy with respect to v5 3/3.

Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

@Andy: do you think we can drop these changes or do you prefer to add them? (in the latter case I can post an incremental patch).

I am not sure what this is about, do you mean the changes asked by me made this driver not applicable?

These are the only changes between patch v5 3/3 (applied by Mark) and patch v6 3/3:

I see now, so v5 was applied, and of course v6 can't be as most of it is already there.
Yes, please send a follow up(s) to address my comments.

Signature · 2 lines
With Best Regards,
Andy Shevchenko