arm64: dts: rockchip: Improve gmac phy setup for QNAP-TS433

Hello,

as suggested by Heiko I split the patch to improve the phy setup of the gmac ethernet into two patches. The initial patch can be found at
https://lore.kernel.org/linux-arm-kernel/[email protected]/ .

Heiko also suggested to add Fixes tags. I'm unsure these are justified because while these patches are an improvement the old devicetree is working fine. I suggest Heiko to add the tags if he feels strongly enough about these.

Best regards
Uwe

Uwe Kleine-König (2):
arm64: dts: rockchip: Correct gmac phy address
arm64: dts: rockchip: Add gmac phy reset GPIO

 .../arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b

2.47.1

The Motorcomm Phy can be talked to on mdio broadcast address 0, but the actuall address is 3. Adapt the reg property and node name accordingly.

---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

index 7bd32d230ad2..70e88769e21c 100644
@@ -481,9 +481,10 @@ eeprom@56 {
 };
 
 &mdio0 {
-	rgmii_phy0: ethernet-phy@0 {
+	rgmii_phy0: ethernet-phy@3 {
+		/* Motorcomm YT8521 phy */
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <0x0>;
+		reg = <0x3>;
 	};
 };
 

2.47.1

While looking through the vendor U-Boot code Heiko spotted that a SoC GPIO is connected to the ethernet phy's reset pin. Add the respective reset-gpios property with pinmuxing for the GPIO to the phy node.

---
 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

index 70e88769e21c..411f8ac7994b 100644
@@ -485,6 +485,10 @@ rgmii_phy0: ethernet-phy@3 {
 		/* Motorcomm YT8521 phy */
 		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <0x3>;
+		pinctrl-0 = <&eth_phy0_reset_pin>;
+		pinctrl-names = "default";
+		reset-assert-us = <10000>;
+		reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
 	};
 };
 

@@ -557,6 +561,12 @@ &pcie3x2 {
 };
 
 &pinctrl {
+	gmac0 {
+		eth_phy0_reset_pin: eth-phy0-reset-pin {
+			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
 	keys {
 		copy_button_pin: copy-button-pin {
 			rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;

2.47.1

Andrew

Applied, thanks!

[1/2] arm64: dts: rockchip: Correct gmac phy address

      commit: 831263a4164e189c47e3a9ea189cb4b5bc078b1e
[2/2] arm64: dts: rockchip: Add gmac phy reset GPIO
      commit: d01e09a9f7cd4fb5a947e3dc718242b51b581615

Best regards,

Heiko Stuebner <[email protected]>