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Add MMC support for Mobileye EyeQ5 and EyeQ6 SoCs

PATCH Applied Benoît Monin 4 participants 13 messages Jun 17, 2025 – Jul 2, 2025

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Benoît Monin

author maintainer
#0 lore raw

cover Add MMC support for Mobileye EyeQ5 and EyeQ6 SoCs

The MMC/SDHCI controller found in Mobileye EyeQ5 and EyeQ6 SoCs is based on Cadence cdns sd4hc IP. It supports up to HS400HS mode. The only peculiarity of the hardware is that it needs the preset value quirk to configure the clock properly at speed slower than HS200.

This patchset adds a compatible device tree binding to cdns sdhci for mobileye then uses it in the sdhci-cadence driver.

It also adds an emmc entry in the dtsi of each SoC and the config options in each defconfig to allow using an eMMC for the rootfs.

Benoît Monin (6):
dt-bindings: mmc: cdns: add Mobileye EyeQ MMC/SDHCI controller
mmc: sdhci-cadence: add Mobileye eyeQ support
MIPS: mobileye: dts: eyeq6h: add the emmc controller
MIPS: eyeq6_defconfig: add cadence MMC/SDHCI driver
MIPS: mobileye: dts: eyeq5: add the emmc controller
MIPS: eyeq5_defconfig: add cadence MMC/SDHCI driver

 .../devicetree/bindings/mmc/cdns,sdhci.yaml   |  1 +
 arch/mips/boot/dts/mobileye/eyeq5.dtsi        | 22 +++++++++++++++++++
 arch/mips/boot/dts/mobileye/eyeq6h.dtsi       | 22 +++++++++++++++++++
 arch/mips/configs/eyeq5_defconfig             |  2 ++
 arch/mips/configs/eyeq6_defconfig             |  2 ++
 drivers/mmc/host/sdhci-cadence.c              | 11 ++++++++++
 6 files changed, 60 insertions(+)
author maintainer
#1 lore raw

PATCH 1/6 dt-bindings: mmc: cdns: add Mobileye EyeQ MMC/SDHCI controller

The MMC/SD controller from Mobileye is compatible with cdns,sd4hc, but will need the preset broken value quirk for speed slower than HS200.

---
 Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +1 -0
index 0432cc96f7ca..ac75d694611a 100644
@@ -16,6 +16,7 @@ properties:
           - amd,pensando-elba-sd4hc
           - microchip,mpfs-sd4hc
           - microchip,pic64gx-sd4hc
+          - mobileye,eyeq-sd4hc
           - socionext,uniphier-sd4hc
       - const: cdns,sd4hc
 
author maintainer
#2 lore raw

PATCH 2/6 mmc: sdhci-cadence: add Mobileye eyeQ support

In reply to Benoît Monin

The MMC/SDHCI controller implemented by Mobileye needs the preset value quirks to configure the clock properly at speed slower than HS200. It otherwise works as a standard sd4hc controller.

---
 drivers/mmc/host/sdhci-cadence.c | 11 +++++++++++
 1 file changed, 11 insertions(+)
drivers/mmc/host/sdhci-cadence.c +11 -0
index a94b297fcf2a..60ca09780da3 100644
@@ -433,6 +433,13 @@ static const struct sdhci_cdns_drv_data sdhci_elba_drv_data = {
 	},
 };
 
+static const struct sdhci_cdns_drv_data sdhci_eyeq_drv_data = {
+	.pltfm_data = {
+		.ops = &sdhci_cdns_ops,
+		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
+	},
+};
+
 static const struct sdhci_cdns_drv_data sdhci_cdns_drv_data = {
 	.pltfm_data = {
 		.ops = &sdhci_cdns_ops,
@@ -595,6 +602,10 @@ static const struct of_device_id sdhci_cdns_match[] = {
 		.compatible = "amd,pensando-elba-sd4hc",
 		.data = &sdhci_elba_drv_data,
 	},
+	{
+		.compatible = "mobileye,eyeq-sd4hc",
+		.data = &sdhci_eyeq_drv_data,
+	},
 	{ .compatible = "cdns,sd4hc" },
 	{ /* sentinel */ }
 };
author maintainer
#3 lore raw

PATCH 3/6 MIPS: mobileye: dts: eyeq6h: add the emmc controller

In reply to Benoît Monin

Add the MMC/SDHCI controller found in the eyeQ6 SoC. It is based on the cadence sd4hc controller and support modes up to HS400 enhanced strobe.

---
 arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/mips/boot/dts/mobileye/eyeq6h.dtsi +22 -0
index dabd5ed778b7..bbd463435ad6 100644
@@ -109,6 +109,28 @@ olb_east: system-controller@d3358000 {
 			clock-names = "ref";
 		};
 
+		emmc: sdhci@d8010000 {
+			compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";
+			reg = <0 0xd8010000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 91 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&olb_south EQ6HC_SOUTH_DIV_EMMC>;
+			bus-width = <8>;
+			max-frequency = <200000000>;
+			mmc-ddr-1_8v;
+			sd-uhs-ddr50;
+			mmc-hs200-1_8v;
+			mmc-hs400-1_8v;
+			mmc-hs400-enhanced-strobe;
+
+			cdns,phy-input-delay-legacy = <4>;
+			cdns,phy-input-delay-mmc-highspeed = <2>;
+			cdns,phy-input-delay-mmc-ddr = <3>;
+			cdns,phy-dll-delay-sdclk = <32>;
+			cdns,phy-dll-delay-sdclk-hsmmc = <32>;
+			cdns,phy-dll-delay-strobe = <32>;
+		};
+
 		olb_south: system-controller@d8013000 {
 			compatible = "mobileye,eyeq6h-south-olb", "syscon";
 			reg = <0x0 0xd8013000 0x0 0x1000>;
maintainer Acked-by on v1 3/6
#4 lore raw

Re: [PATCH 3/6] MIPS: mobileye: dts: eyeq6h: add the emmc controller

Hello Benoît,

Quoted 4 lines

Add the MMC/SDHCI controller found in the eyeQ6 SoC. It is based on the cadence sd4hc controller and support modes up to HS400 enhanced strobe.

As the binding had been accpeted and merged:

Thanks,

Gregory

Quoted 37 lines
---
 arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/mips/boot/dts/mobileye/eyeq6h.dtsi +22 -0
index dabd5ed778b7..bbd463435ad6 100644
@@ -109,6 +109,28 @@ olb_east: system-controller@d3358000 {
 			clock-names = "ref";
 		};
 
+		emmc: sdhci@d8010000 {
+			compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";
+			reg = <0 0xd8010000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 91 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&olb_south EQ6HC_SOUTH_DIV_EMMC>;
+			bus-width = <8>;
+			max-frequency = <200000000>;
+			mmc-ddr-1_8v;
+			sd-uhs-ddr50;
+			mmc-hs200-1_8v;
+			mmc-hs400-1_8v;
+			mmc-hs400-enhanced-strobe;
+
+			cdns,phy-input-delay-legacy = <4>;
+			cdns,phy-input-delay-mmc-highspeed = <2>;
+			cdns,phy-input-delay-mmc-ddr = <3>;
+			cdns,phy-dll-delay-sdclk = <32>;
+			cdns,phy-dll-delay-sdclk-hsmmc = <32>;
+			cdns,phy-dll-delay-strobe = <32>;
+		};
+
 		olb_south: system-controller@d8013000 {
 			compatible = "mobileye,eyeq6h-south-olb", "syscon";
 			reg = <0x0 0xd8013000 0x0 0x1000>;
Signature · 3 lines
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
author maintainer
#5 lore raw

PATCH 4/6 MIPS: eyeq6_defconfig: add cadence MMC/SDHCI driver

In reply to Benoît Monin

Enable MMC support on eyeQ6 platform so it can be used as the root partition.

---
 arch/mips/configs/eyeq6_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/configs/eyeq6_defconfig +2 -0
index 0afbb45a78e8..0a00a201937b 100644
@@ -82,6 +82,8 @@ CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_CADENCE=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_RESET_CONTROLLER=y
 # CONFIG_NVMEM is not set
maintainer Acked-by on v1 4/6
#6 lore raw

Re: [PATCH 4/6] MIPS: eyeq6_defconfig: add cadence MMC/SDHCI driver

Hello Benoît,

Quoted 4 lines

Enable MMC support on eyeQ6 platform so it can be used as the root partition.

Thanks,

Gregory

Quoted 17 lines
---
 arch/mips/configs/eyeq6_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/configs/eyeq6_defconfig +2 -0
index 0afbb45a78e8..0a00a201937b 100644
@@ -82,6 +82,8 @@ CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_CADENCE=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_RESET_CONTROLLER=y
 # CONFIG_NVMEM is not set
Signature · 3 lines
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
author maintainer
#7 lore raw

PATCH 5/6 MIPS: mobileye: dts: eyeq5: add the emmc controller

In reply to Benoît Monin

Add the MMC/SDHCI controller found in the eyeQ5 SoC. It is based on the cadence sd4hc controller and support modes up to HS400 enhanced strobe.

---
 arch/mips/boot/dts/mobileye/eyeq5.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/mips/boot/dts/mobileye/eyeq5.dtsi +22 -0
index a84e6e720619..e15d9ce0bdf4 100644
@@ -178,6 +178,28 @@ timer {
 				clocks = <&olb EQ5C_CPU_CORE0>;
 			};
 		};
+
+		emmc: sdhci@2200000 {
+			compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";
+			reg = <0 0x2200000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 10 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&olb EQ5C_PER_EMMC>;
+			bus-width = <8>;
+			max-frequency = <200000000>;
+			mmc-ddr-1_8v;
+			sd-uhs-ddr50;
+			mmc-hs200-1_8v;
+			mmc-hs400-1_8v;
+			mmc-hs400-enhanced-strobe;
+
+			cdns,phy-input-delay-legacy = <4>;
+			cdns,phy-input-delay-mmc-highspeed = <2>;
+			cdns,phy-input-delay-mmc-ddr = <3>;
+			cdns,phy-dll-delay-sdclk = <32>;
+			cdns,phy-dll-delay-sdclk-hsmmc = <32>;
+			cdns,phy-dll-delay-strobe = <32>;
+		};
 	};
 };
 
maintainer Acked-by on v1 5/6
#8 lore raw

Re: [PATCH 5/6] MIPS: mobileye: dts: eyeq5: add the emmc controller

Hello Benoît,

Quoted 4 lines

Add the MMC/SDHCI controller found in the eyeQ5 SoC. It is based on the cadence sd4hc controller and support modes up to HS400 enhanced strobe.

The binding being accepted,

Thanks,

Gregory

Quoted 37 lines
---
 arch/mips/boot/dts/mobileye/eyeq5.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/mips/boot/dts/mobileye/eyeq5.dtsi +22 -0
index a84e6e720619..e15d9ce0bdf4 100644
@@ -178,6 +178,28 @@ timer {
 				clocks = <&olb EQ5C_CPU_CORE0>;
 			};
 		};
+
+		emmc: sdhci@2200000 {
+			compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";
+			reg = <0 0x2200000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 10 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&olb EQ5C_PER_EMMC>;
+			bus-width = <8>;
+			max-frequency = <200000000>;
+			mmc-ddr-1_8v;
+			sd-uhs-ddr50;
+			mmc-hs200-1_8v;
+			mmc-hs400-1_8v;
+			mmc-hs400-enhanced-strobe;
+
+			cdns,phy-input-delay-legacy = <4>;
+			cdns,phy-input-delay-mmc-highspeed = <2>;
+			cdns,phy-input-delay-mmc-ddr = <3>;
+			cdns,phy-dll-delay-sdclk = <32>;
+			cdns,phy-dll-delay-sdclk-hsmmc = <32>;
+			cdns,phy-dll-delay-strobe = <32>;
+		};
 	};
 };
 
Signature · 3 lines
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
author maintainer
#9 lore raw

PATCH 6/6 MIPS: eyeq5_defconfig: add cadence MMC/SDHCI driver

In reply to Benoît Monin

Enable MMC support on eyeQ5 platform so it can be used as the root partition.

---
 arch/mips/configs/eyeq5_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/configs/eyeq5_defconfig +2 -0
index ff7af5dc6d9d..328016c1c6f4 100644
@@ -79,6 +79,8 @@ CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_CADENCE=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_RESET_CONTROLLER=y
 # CONFIG_NVMEM is not set
maintainer Acked-by on v1 6/6
#10 lore raw

Re: [PATCH 6/6] MIPS: eyeq5_defconfig: add cadence MMC/SDHCI driver

Helo Benoît,

Quoted 4 lines

Enable MMC support on eyeQ5 platform so it can be used as the root partition.

Thanks,

Gregory

Quoted 17 lines
---
 arch/mips/configs/eyeq5_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/configs/eyeq5_defconfig +2 -0
index ff7af5dc6d9d..328016c1c6f4 100644
@@ -79,6 +79,8 @@ CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_CADENCE=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_RESET_CONTROLLER=y
 # CONFIG_NVMEM is not set
Signature · 3 lines
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
#11 lore raw
In reply to Benoît Monin
Quoted 20 lines · Benoît Monin

The MMC/SDHCI controller found in Mobileye EyeQ5 and EyeQ6 SoCs is based on Cadence cdns sd4hc IP. It supports up to HS400HS mode. The only peculiarity of the hardware is that it needs the preset value quirk to configure the clock properly at speed slower than HS200.

This patchset adds a compatible device tree binding to cdns sdhci for mobileye then uses it in the sdhci-cadence driver.

It also adds an emmc entry in the dtsi of each SoC and the config options in each defconfig to allow using an eMMC for the rootfs.

Benoît Monin (6):
dt-bindings: mmc: cdns: add Mobileye EyeQ MMC/SDHCI controller
mmc: sdhci-cadence: add Mobileye eyeQ support
MIPS: mobileye: dts: eyeq6h: add the emmc controller
MIPS: eyeq6_defconfig: add cadence MMC/SDHCI driver
MIPS: mobileye: dts: eyeq5: add the emmc controller
MIPS: eyeq5_defconfig: add cadence MMC/SDHCI driver

Quoted 8 lines
 .../devicetree/bindings/mmc/cdns,sdhci.yaml   |  1 +
 arch/mips/boot/dts/mobileye/eyeq5.dtsi        | 22 +++++++++++++++++++
 arch/mips/boot/dts/mobileye/eyeq6h.dtsi       | 22 +++++++++++++++++++
 arch/mips/configs/eyeq5_defconfig             |  2 ++
 arch/mips/configs/eyeq6_defconfig             |  2 ++
 drivers/mmc/host/sdhci-cadence.c              | 11 ++++++++++
 6 files changed, 60 insertions(+)

Patch1 and patch2 applied for next, thanks!

Kind regards
Uffe

maintainer Applied
#12 lore raw
In reply to Benoît Monin
Quoted 19 lines · Benoît Monin

The MMC/SDHCI controller found in Mobileye EyeQ5 and EyeQ6 SoCs is based on Cadence cdns sd4hc IP. It supports up to HS400HS mode. The only peculiarity of the hardware is that it needs the preset value quirk to configure the clock properly at speed slower than HS200.

This patchset adds a compatible device tree binding to cdns sdhci for mobileye then uses it in the sdhci-cadence driver.

It also adds an emmc entry in the dtsi of each SoC and the config options in each defconfig to allow using an eMMC for the rootfs.

Benoît Monin (6):
dt-bindings: mmc: cdns: add Mobileye EyeQ MMC/SDHCI controller
mmc: sdhci-cadence: add Mobileye eyeQ support
MIPS: mobileye: dts: eyeq6h: add the emmc controller
MIPS: eyeq6_defconfig: add cadence MMC/SDHCI driver
MIPS: mobileye: dts: eyeq5: add the emmc controller
MIPS: eyeq5_defconfig: add cadence MMC/SDHCI driver

Quoted 7 lines
 .../devicetree/bindings/mmc/cdns,sdhci.yaml   |  1 +
 arch/mips/boot/dts/mobileye/eyeq5.dtsi        | 22 +++++++++++++++++++
 arch/mips/boot/dts/mobileye/eyeq6h.dtsi       | 22 +++++++++++++++++++
 arch/mips/configs/eyeq5_defconfig             |  2 ++
 arch/mips/configs/eyeq6_defconfig             |  2 ++
 drivers/mmc/host/sdhci-cadence.c              | 11 ++++++++++
 6 files changed, 60 insertions(+)

applied patches 3-6 to mips-next.

Thomas.

Signature · 2 lines
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