Add pin control driver for BCM2712 SoC
Subsystems (5)
cover Add pin control driver for BCM2712 SoC
Hi,
The following patches add a pin control driver for the BCM2712 SoC and few pin/gpio Devicetree nodes for Raspberry Pi 5.
Device driver is follow up version on what Andrea posted in April [1].
It is based on sources from here [2]. I just made few cosmetic changes and addressed review comments from earlier submission. I don't have documentation for this controller.
Patch 4 wire up power button on RPi5.
Patch 5 adds WiFi Devicetree node for RPi5.
Patch 6 adds Bluetooth Devicetree node for RPi5.
All this have been tested as kernel was directly booted RPi5 via kernel= config.txt option and cmdline.txt file with following content (Note I am using Tumbleweed RPi raw images)
# cat /boot/efi/cmdline.txt root=/dev/mmcblk0p3 rootwait rw systemd.show_status=1 console=tty ignore_loglevel earlycon console=ttyAMA10,115200
With all these patches Bluetooth and Wifi are working fine (tm) with firmware files provided by openSUSE Tumbleweed.
All comments and suggestions are welcome!
Happy hacking!
Ivan and Andrea
[1] https://lore.kernel.org/lkml/[email protected]/
[2] https://github.com/raspberrypi/linux/blob/rpi-6.6.y/drivers/pinctrl/bcm/pinctrl-bcm2712.c
[3] https://lore.kernel.org/lkml/[email protected]/#t
[4] https://lore.kernel.org/all/[email protected]/
CHANGES in V2: (all patchset is based upon linux-next/master)
--- PINCTRL DRIVER ---
- dropped bcm2712_c0_aon_sgpio_pin_funcs[] and bcm2712_d0_aon_sgpio_pin_funcs[] struct array definitions since they are not used anywhere.
- dropped 'arg' variable in brcmstb_pinconf_set() as it's not used.
- updated copyright info at the top.
- several changes in the declared macros. Renaming the macro name and the macro parameters to better reflect the semantic.
- reworked MUX_BIT() macro to be more streamlined and easy to understand.
- added PAD_BIT() macro to avoid code duplication.
- renamed 'lock' variable to 'fsel_lock'.
- added some comments about non-existent pins on D0 silicon revision pin declarations.
- brcmstb_pinctrl_fsel_set(), brcmstb_pull_config_set() and brcmstb_pinconf_set() (and functions that call them) can now return -EINVAL as error.
- added myself as MODULE_AUTHOR.
- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
--- DTS ---
- moved 'clock-frequency' property from (uarta) board dts node to SoC dtsi node.
- added 'brcm,sdhci-brcmstb' compatible and 'clock-names' property to mmc node to avoid dt_binding_check errors.
- added 'brcm,bcm7445-gpio' compatible to gpio node to avoid dt_binding_check errors.
- renamed all pinctrl pin nodes as per yaml schema (*-state and *-pins).
- changed 'brcm,bcm2712-*pinctrl' to 'brcm,bcm2712c0-*pinctrl' since the former was more of a fallback and does not reflect a real silicon revision.
- moved status="okay" to the last entry in 'uarta' node.
- removed 'local-*-address' property from everywhere.
- dropped 'skip-init' property in 'uarta' node since it does not apply to linux kernel.
- renamed 'pwr-button' node to 'gpio-keys' and 'pwr_key' node to 'power_button'.
- dropped an userspace related 'brcm,gpio-direct' property from gpio node.
--- DT BINDINGS ---
- binding schema file renamed to 'brcm,bcm2712c0-pinctrl.yaml' to reflect the compatible name.
- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
- added example section.
- moved allOf: block at the beginning of the schema.
- dropped some unnecessary new lines.
- replaced current layout to describe the pin subnodes with patternProperties (nodes now end with -state and -pins).
- expanded the schema description to give some context about STB family of pin controller and added some details about C0 and D0 silicon variants. This is also reflected in the commit message.
--- MISC ---
- enabled CONFIG_PINCTRL_BRCMSTB in arm64 defconfig.
Andrea della Porta (1):
arm64: defconfig: Enable BCM2712 on-chip pin controller driver
Ivan T. Ivanov (6):
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: bcm: Add STB family pin controller driver
arm64: dts: broadcom: bcm2712: Add pin controller nodes
arm64: dts: broadcom: bcm2712: Add one more GPIO node
arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
arm64: dts: broadcom: bcm2712: Add UARTA controller node
.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++ .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 134 ++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 48 + arch/arm64/configs/defconfig | 1 + drivers/pinctrl/bcm/Kconfig | 13 + drivers/pinctrl/bcm/Makefile | 1 + drivers/pinctrl/bcm/pinctrl-brcmstb.c | 1195 +++++++++++++++++ 7 files changed, 1515 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.c
Signature · 1 line
2.35.3
PATCH 1/7 dt-bindings: pinctrl: Add support for Broadcom STB pin controller
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
---
This patch is based on linux-next/master
.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml new file +123 -0
@@ -0,0 +1,123 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,brcmstb-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom STB family pin controller + +maintainers: + - Ivan T. Ivanov <[email protected]> + - A. della Porta <[email protected]> + +description: + Broadcom's STB family of memory-mapped pin controllers. + This includes the pin controllers inside the BCM2712 SoC which + are instances of the STB family and has two silicon variants, + C0 and D0, which differs slightly in terms of registers layout. + The -aon- (Always On) variant is the same IP block but differs + in the number of pins that are associated and the pinmux functions + for each of those pins. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - brcm,bcm2712c0-pinctrl + - brcm,bcm2712c0-aon-pinctrl + - brcm,bcm2712d0-pinctrl + - brcm,bcm2712d0-aon-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '-state$': + oneOf: + - $ref: '#/$defs/brcmstb-pinctrl-state' + - patternProperties: + '-pins$': + $ref: '#/$defs/brcmstb-pinctrl-state' + additionalProperties: false + +$defs: + brcmstb-pinctrl-state: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + Pin controller client devices use pin configuration subnodes (children + and grandchildren) for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode (either this or "groups" must be specified). + items: + pattern: '^((aon_)?s?gpio[0-6]?[0-9])|(emmc_(clk|cmd|dat[0-7]|ds))$' + + function: + enum: [ gpio, alt1, alt2, alt3, alt4, alt5, alt6, alt7, alt8, + aon_cpu_standbyb, aon_fp_4sec_resetb, aon_gpclk, aon_pwm, + arm_jtag, aud_fs_clk0, avs_pmu_bsc, bsc_m0, bsc_m1, bsc_m2, + bsc_m3, clk_observe, ctl_hdmi_5v, enet0, enet0_mii, enet0_rgmii, + ext_sc_clk, fl0, fl1, gpclk0, gpclk1, gpclk2, hdmi_tx0_auto_i2c, + hdmi_tx0_bsc, hdmi_tx1_auto_i2c, hdmi_tx1_bsc, i2s_in, i2s_out, + ir_in, mtsif, mtsif_alt, mtsif_alt1, pdm, pkt, pm_led_out, sc0, + sd0, sd2, sd_card_a, sd_card_b, sd_card_c, sd_card_d, sd_card_e, + sd_card_f, sd_card_g, spdif_out, spi_m, spi_s, sr_edm_sense, te0, + te1, tsio, uart0, uart1, uart2, usb_pwr, usb_vbus, uui, vc_i2c0, + vc_i2c3, vc_i2c4, vc_i2c5, vc_i2csl, vc_pcm, vc_pwm0, vc_pwm1, + vc_spi0, vc_spi3, vc_spi4, vc_spi5, vc_uart0, vc_uart2, vc_uart3, + vc_uart4 ] + + description: + Specify the alternative function to be configured for the specified + pins. + + bias-disable: true + bias-pull-down: true + bias-pull-up: true + + required: + - function + - pins + + additionalProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + brcm_pinctrl: pinctrl@7d504100 { + compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + + bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29"; + }; + + uarta-default-state { + rts-tx-pins { + function = "uart0"; + pins = "gpio24", "gpio26"; + bias-disable; + }; + + cts-rx-pins { + function = "uart0"; + pins = "gpio25", "gpio27"; + bias-pull-up; + }; + }; + };
Signature · 1 line
2.35.3
Rob Herring (Arm)
maintainerRe: [PATCH 1/7] dt-bindings: pinctrl: Add support for Broadcom STB pin controller
Quoted 13 lines · Andrea della Porta
From: "Ivan T. Ivanov" <[email protected]>
The STB pin controller represents a family whose silicon instances are found e.g. on BCM2712 SoC.
In particular, on RaspberryPi 5, there are two separate instantiations of the same IP block which differ in the number of pins that are associated and the pinmux functions for each of those pins. The -aon- variant stands for 'Always On'.
Depending on the revision of the BCM2712 (CO or D0), the pin controller instance has slight differences in the register layout.
Quoted 9 lines
Signed-off-by Ivan T. Ivanov <[email protected]>Signed-off-by Andrea della Porta <[email protected]>---
This patch is based on linux-next/master.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename
$id: http://devicetree.org/schemas/pinctrl/brcm,brcmstb-pinctrl.yaml
file: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml
doc reference errors (make refcheckdocs):
The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
PATCH 2/7 pinctrl: bcm: Add STB family pin controller driver
In reply to Andrea della PortaFrom: "Ivan T. Ivanov" <[email protected]>
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line.
[1] https://lore.kernel.org/lkml/[email protected]/
---
This patch is based on linux-next/master
drivers/pinctrl/bcm/Kconfig | 13 + drivers/pinctrl/bcm/Makefile | 1 + drivers/pinctrl/bcm/pinctrl-brcmstb.c | 1195 +++++++++++++++++++++++++ 3 files changed, 1209 insertions(+) create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.c
drivers/pinctrl/bcm/Kconfig +13 -0
@@ -3,6 +3,19 @@ # Broadcom pinctrl drivers # +config PINCTRL_BRCMSTB + tristate "Broadcom STB product line pin controller driver" + depends on OF && (ARCH_BRCMSTB || COMPILE_TEST) + select PINMUX + select PINCONF + select GENERIC_PINCONF + help + This driver provide pin muxing and configuration functionality + for Broadcom STB product line chipsets. BCM2712 SoC is one of these + chipsets. + + If M is selected the module will be called pinctrl-brcmstb. + config PINCTRL_BCM281XX bool "Broadcom BCM281xx pinctrl driver" depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
drivers/pinctrl/bcm/Makefile +1 -0
@@ -11,6 +11,7 @@ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o +obj-$(CONFIG_PINCTRL_BRCMSTB) += pinctrl-brcmstb.o obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o
drivers/pinctrl/bcm/pinctrl-brcmstb.c new file +1195 -0
1,195 lines not on this page · raw message
Signature · 1 line
2.35.3
PATCH 3/7 arm64: dts: broadcom: bcm2712: Add pin controller nodes
In reply to Andrea della PortaFrom: "Ivan T. Ivanov" <[email protected]>
Add pin-control devicetree nodes and used them to explicitly define uSD card interface pin configuration.
---
This patch is based on linux-next/master
.../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 18 ++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 10 ++++++++++ 2 files changed, 28 insertions(+)
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +18 -0
@@ -53,6 +53,21 @@ sd_vcc_reg: sd-vcc-reg { }; }; +&pinctrl { + emmc_sd_default: emmc-sd-default-state { + pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; + bias-pull-up; + }; +}; + +&pinctrl_aon { + emmc_aon_cd_default: emmc-aon-cd-default-state { + function = "sd_card_g"; + pins = "aon_gpio5"; + bias-pull-up; + }; +}; + /* The Debug UART, on Rpi5 it's on JST-SH 1.0mm 3-pin connector * labeled "UART", i.e. the interface with the system console. */
@@ -62,12 +77,15 @@ &uart10 { /* SDIO1 is used to drive the SD card */ &sdio1 { + pinctrl-0 = <&emmc_sd_default>, <&emmc_aon_cd_default>; + pinctrl-names = "default"; vqmmc-supply = <&sd_io_1v8_reg>; vmmc-supply = <&sd_vcc_reg>; bus-width = <4>; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; + cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; }; &soc {
arch/arm64/boot/dts/broadcom/bcm2712.dtsi +10 -0
@@ -243,6 +243,16 @@ uart10: serial@7d001000 { status = "disabled"; }; + pinctrl: pinctrl@7d504100 { + compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + }; + + pinctrl_aon: pinctrl@7d510700 { + compatible = "brcm,bcm2712c0-aon-pinctrl"; + reg = <0x7d510700 0x20>; + }; + interrupt-controller@7d517000 { compatible = "brcm,bcm7271-l2-intc"; reg = <0x7d517000 0x10>;
Signature · 1 line
2.35.3
PATCH 4/7 arm64: dts: broadcom: bcm2712: Add one more GPIO node
In reply to Andrea della PortaFrom: "Ivan T. Ivanov" <[email protected]>
Add GPIO and related interrupt controller nodes and wire one of the lines to power button.
---
This patch is based on linux-next/master
.../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 21 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 12 +++++++++++ 2 files changed, 33 insertions(+)
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +21 -0
@@ -2,6 +2,7 @@ /dts-v1/; #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include "bcm2712.dtsi" / {
@@ -29,6 +30,20 @@ memory@0 { reg = <0 0 0 0x28000000>; }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_button_default>; + status = "okay"; + + power_button: power-button { + label = "pwr_button"; + linux,code = <KEY_POWER>; + gpios = <&gio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; + }; + }; + sd_io_1v8_reg: sd-io-1v8-reg { compatible = "regulator-gpio"; regulator-name = "vdd-sd-io";
@@ -58,6 +73,12 @@ emmc_sd_default: emmc-sd-default-state { pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; bias-pull-up; }; + + pwr_button_default: pwr-button-default-state { + function = "gpio"; + pins = "gpio20"; + bias-pull-up; + }; }; &pinctrl_aon {
arch/arm64/boot/dts/broadcom/bcm2712.dtsi +12 -0
@@ -248,6 +248,18 @@ pinctrl: pinctrl@7d504100 { reg = <0x7d504100 0x30>; }; + gio: gpio@7d508500 { + compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio"; + reg = <0x7d508500 0x40>; + interrupt-parent = <&main_irq>; + interrupts = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + brcm,gpio-bank-widths = <32 22>; + }; + pinctrl_aon: pinctrl@7d510700 { compatible = "brcm,bcm2712c0-aon-pinctrl"; reg = <0x7d510700 0x20>;
Signature · 1 line
2.35.3
PATCH 5/7 arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
In reply to Andrea della PortaFrom: "Ivan T. Ivanov" <[email protected]>
Add SDIO2 node. On RPi5 it is connected to WiFi chip. Add related pin, gpio and regulator definitions and add WiFi node. With this and firmware already provided by distributions, at least on openSUSE Tumbleweed, this is sufficient to make WiFi operational on RPi5 \o/.
---
This patch is based on linux-next/master
.../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 52 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 15 ++++++ 2 files changed, 67 insertions(+)
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +52 -0
@@ -66,6 +66,18 @@ sd_vcc_reg: sd-vcc-reg { enable-active-high; gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; }; + + wl_on_reg: wl-on-reg { + compatible = "regulator-fixed"; + regulator-name = "wl-on-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-0 = <&wl_on_default>; + pinctrl-names = "default"; + gpio = <&gio 28 GPIO_ACTIVE_HIGH>; + startup-delay-us = <150000>; + enable-active-high; + }; }; &pinctrl {
@@ -79,6 +91,29 @@ pwr_button_default: pwr-button-default-state { pins = "gpio20"; bias-pull-up; }; + + sdio2_30_default: sdio2-30-default-state { + clk-pins { + function = "sd2"; + pins = "gpio30"; + bias-disable; + }; + cmd-pins { + function = "sd2"; + pins = "gpio31"; + bias-pull-up; + }; + dat-pins { + function = "sd2"; + pins = "gpio32", "gpio33", "gpio34", "gpio35"; + bias-pull-up; + }; + }; + + wl_on_default: wl-on-default-state { + function = "gpio"; + pins = "gpio28"; + }; }; &pinctrl_aon {
@@ -109,6 +144,23 @@ &sdio1 { cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; }; +&sdio2 { + pinctrl-0 = <&sdio2_30_default>; + pinctrl-names = "default"; + bus-width = <4>; + vmmc-supply = <&wl_on_reg>; + sd-uhs-ddr50; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + &soc { firmware: firmware { compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
arch/arm64/boot/dts/broadcom/bcm2712.dtsi +15 -0
@@ -285,6 +285,21 @@ gio_aon: gpio@7d517c00 { */ }; + sdio2: mmc@1100000 { + compatible = "brcm,bcm2712-sdhci", + "brcm,sdhci-brcmstb"; + reg = <0x01100000 0x260>, + <0x01100400 0x200>; + reg-names = "host", "cfg"; + interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_emmc2>; + clock-names = "sw_sdio"; + sdhci-caps-mask = <0x0000C000 0x0>; + sdhci-caps = <0x0 0x0>; + mmc-ddr-3_3v; + status = "disabled"; + }; + gicv2: interrupt-controller@7fff9000 { compatible = "arm,gic-400"; reg = <0x7fff9000 0x1000>,
Signature · 1 line
2.35.3
PATCH 6/7 arm64: dts: broadcom: bcm2712: Add UARTA controller node
In reply to Andrea della PortaFrom: "Ivan T. Ivanov" <[email protected]>
On RPi5 device Bluetooth chips is connected to UARTA port. Add Bluetooth chips and related pin definitions.
With this and firmware already provided by distributions, at least on openSUSE Tumbleweed, this is sufficient to make Bluetooth operational on RPi5 \o/.
---
This patch is based on linux-next/master
.../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 43 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 11 +++++ 2 files changed, 54 insertions(+)
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +43 -0
@@ -81,6 +81,11 @@ wl_on_reg: wl-on-reg { }; &pinctrl { + bt_shutdown_default: bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29"; + }; + emmc_sd_default: emmc-sd-default-state { pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; bias-pull-up;
@@ -110,6 +115,29 @@ dat-pins { }; }; + uarta_24_default: uarta-24-default-state { + rts-pins { + function = "uart0"; + pins = "gpio24"; + bias-disable; + }; + cts-pins { + function = "uart0"; + pins = "gpio25"; + bias-pull-up; + }; + txd-pins { + function = "uart0"; + pins = "gpio26"; + bias-disable; + }; + rxd-pins { + function = "uart0"; + pins = "gpio27"; + bias-pull-up; + }; + }; + wl_on_default: wl-on-default-state { function = "gpio"; pins = "gpio28";
@@ -188,6 +216,21 @@ power: power { }; }; +/* uarta communicates with the BT module */ +&uarta { + uart-has-rtscts; + auto-flow-control; + pinctrl-0 = <&uarta_24_default &bt_shutdown_default>; + pinctrl-names = "default"; + status = "okay"; + + bluetooth: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; + }; +}; + &hvs { clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; clock-names = "core", "disp";
arch/arm64/boot/dts/broadcom/bcm2712.dtsi +11 -0
@@ -260,6 +260,17 @@ gio: gpio@7d508500 { brcm,gpio-bank-widths = <32 22>; }; + uarta: serial@7d50c000 { + compatible = "brcm,bcm7271-uart"; + reg = <0x7d50c000 0x20>; + reg-names = "uart"; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <96000000>; + interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + pinctrl_aon: pinctrl@7d510700 { compatible = "brcm,bcm2712c0-aon-pinctrl"; reg = <0x7d510700 0x20>;
Signature · 1 line
2.35.3
PATCH 7/7 arm64: defconfig: Enable BCM2712 on-chip pin controller driver
In reply to Andrea della PortaSelect the on-chip pin controller driver for BCM2712 SoC.
On RapsberryPi 5 devices it is primarily needed to operate the bluetooth and WiFi devices, to configure the uSD interface and the power button.
---
This patch is based on linux-next/master
arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm64/configs/defconfig +1 -0
@@ -590,6 +590,7 @@ CONFIG_SPI_TEGRA114=m CONFIG_SPI_SPIDEV=m CONFIG_SPMI=y CONFIG_SPMI_MTK_PMIF=m +CONFIG_PINCTRL_BRCMSTB=y CONFIG_PINCTRL_DA9062=m CONFIG_PINCTRL_MAX77620=y CONFIG_PINCTRL_RK805=m
Signature · 1 line
2.35.3
Hi Andrea,
Am 15.07.25 um 20:31 schrieb Andrea della Porta:
Quoted 32 lines
Hi,
The following patches add a pin control driver for the BCM2712 SoC and few pin/gpio Devicetree nodes for Raspberry Pi 5.
Device driver is follow up version on what Andrea posted in April [1].
It is based on sources from here [2]. I just made few cosmetic changes and addressed review comments from earlier submission. I don't have documentation for this controller.
Patch 4 wire up power button on RPi5.
Patch 5 adds WiFi Devicetree node for RPi5.
Patch 6 adds Bluetooth Devicetree node for RPi5.
All this have been tested as kernel was directly booted RPi5 via kernel= config.txt option and cmdline.txt file with following content (Note I am using Tumbleweed RPi raw images)
# cat /boot/efi/cmdline.txt root=/dev/mmcblk0p3 rootwait rw systemd.show_status=1 console=tty ignore_loglevel earlycon console=ttyAMA10,115200With all these patches Bluetooth and Wifi are working fine (tm) with firmware files provided by openSUSE Tumbleweed.
All comments and suggestions are welcome!
Happy hacking!
Ivan and Andrea
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
[2] https://github.com/raspberrypi/linux/blob/rpi-6.6.y/drivers/pinctrl/bcm/pinctrl-bcm2712.c
[3] https://lore.kernel.org/lkml/[email protected]/#t
[4] https://lore.kernel.org/all/[email protected]/CHANGES in V2: (all patchset is based upon linux-next/master)
this mention a V2, but the series doesn't have a version in the subject?
Best regards
Quoted 111 lines
--- PINCTRL DRIVER ---
- dropped bcm2712_c0_aon_sgpio_pin_funcs[] and bcm2712_d0_aon_sgpio_pin_funcs[] struct array definitions since they are not used anywhere.
- dropped 'arg' variable in
brcmstb_pinconf_set()as it's not used.- updated copyright info at the top.
- several changes in the declared macros. Renaming the macro name and the macro parameters to better reflect the semantic.
- reworked
MUX_BIT()macro to be more streamlined and easy to understand.- added
PAD_BIT()macro to avoid code duplication.- renamed 'lock' variable to '
fsel_lock'.- added some comments about non-existent pins on D0 silicon revision pin declarations.
-
brcmstb_pinctrl_fsel_set(),brcmstb_pull_config_set()andbrcmstb_pinconf_set()(and functions that call them) can now return-EINVALas error.- added myself as
MODULE_AUTHOR.- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
--- DTS ---
- moved 'clock-frequency' property from (uarta) board dts node to SoC dtsi node.
- added 'brcm,sdhci-brcmstb' compatible and 'clock-names' property to mmc node to avoid
dt_binding_checkerrors.- added 'brcm,bcm7445-gpio' compatible to gpio node to avoid
dt_binding_checkerrors.- renamed all pinctrl pin nodes as per yaml schema (*-state and *-pins).
- changed 'brcm,bcm2712-*pinctrl' to 'brcm,bcm2712c0-*pinctrl' since the former was more of a fallback and does not reflect a real silicon revision.
- moved status="okay" to the last entry in 'uarta' node.
- removed 'local-*-address' property from everywhere.
- dropped 'skip-init' property in 'uarta' node since it does not apply to linux kernel.
- renamed 'pwr-button' node to 'gpio-keys' and '
pwr_key' node to 'power_button'.- dropped an userspace related 'brcm,gpio-direct' property from gpio node.
--- DT BINDINGS ---
- binding schema file renamed to 'brcm,bcm2712c0-pinctrl.yaml' to reflect the compatible name.
- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
- added example section.
- moved allOf: block at the beginning of the schema.
- dropped some unnecessary new lines.
- replaced current layout to describe the pin subnodes with patternProperties (nodes now end with -state and -pins).
- expanded the schema description to give some context about STB family of pin controller and added some details about C0 and D0 silicon variants. This is also reflected in the commit message.
--- MISC ---
- enabled
CONFIG_PINCTRL_BRCMSTBin arm64 defconfig.Andrea della Porta (1):
arm64: defconfig: Enable BCM2712 on-chip pin controller driverIvan T. Ivanov (6):
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: bcm: Add STB family pin controller driver
arm64: dts: broadcom: bcm2712: Add pin controller nodes
arm64: dts: broadcom: bcm2712: Add one more GPIO node
arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
arm64: dts: broadcom: bcm2712: Add UARTA controller node.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++ .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 134 ++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 48 + arch/arm64/configs/defconfig | 1 + drivers/pinctrl/bcm/Kconfig | 13 + drivers/pinctrl/bcm/Makefile | 1 + drivers/pinctrl/bcm/pinctrl-brcmstb.c | 1195 +++++++++++++++++ 7 files changed, 1515 insertions(+)create mode 100644
Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yamlcreate mode 100644drivers/pinctrl/bcm/pinctrl-brcmstb.c
Rob Herring (Arm)
maintainerQuoted 150 lines · Andrea della Porta
Hi,
The following patches add a pin control driver for the BCM2712 SoC and few pin/gpio Devicetree nodes for Raspberry Pi 5.
Device driver is follow up version on what Andrea posted in April [1].
It is based on sources from here [2]. I just made few cosmetic changes and addressed review comments from earlier submission. I don't have documentation for this controller.
Patch 4 wire up power button on RPi5.
Patch 5 adds WiFi Devicetree node for RPi5.
Patch 6 adds Bluetooth Devicetree node for RPi5.
All this have been tested as kernel was directly booted RPi5 via kernel= config.txt option and cmdline.txt file with following content (Note I am using Tumbleweed RPi raw images)
# cat /boot/efi/cmdline.txt root=/dev/mmcblk0p3 rootwait rw systemd.show_status=1 console=tty ignore_loglevel earlycon console=ttyAMA10,115200With all these patches Bluetooth and Wifi are working fine (tm) with firmware files provided by openSUSE Tumbleweed.
All comments and suggestions are welcome!
Happy hacking!
Ivan and Andrea[1] https://lore.kernel.org/lkml/[email protected]/
[2] https://github.com/raspberrypi/linux/blob/rpi-6.6.y/drivers/pinctrl/bcm/pinctrl-bcm2712.c
[3] https://lore.kernel.org/lkml/[email protected]/#t
[4] https://lore.kernel.org/all/[email protected]/CHANGES in V2: (all patchset is based upon linux-next/master)
--- PINCTRL DRIVER ---
- dropped bcm2712_c0_aon_sgpio_pin_funcs[] and bcm2712_d0_aon_sgpio_pin_funcs[] struct array definitions since they are not used anywhere.
- dropped 'arg' variable in
brcmstb_pinconf_set()as it's not used.- updated copyright info at the top.
- several changes in the declared macros. Renaming the macro name and the macro parameters to better reflect the semantic.
- reworked
MUX_BIT()macro to be more streamlined and easy to understand.- added
PAD_BIT()macro to avoid code duplication.- renamed 'lock' variable to '
fsel_lock'.- added some comments about non-existent pins on D0 silicon revision pin declarations.
-
brcmstb_pinctrl_fsel_set(),brcmstb_pull_config_set()andbrcmstb_pinconf_set()(and functions that call them) can now return-EINVALas error.- added myself as
MODULE_AUTHOR.- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
--- DTS ---
- moved 'clock-frequency' property from (uarta) board dts node to SoC dtsi node.
- added 'brcm,sdhci-brcmstb' compatible and 'clock-names' property to mmc node to avoid
dt_binding_checkerrors.- added 'brcm,bcm7445-gpio' compatible to gpio node to avoid
dt_binding_checkerrors.- renamed all pinctrl pin nodes as per yaml schema (*-state and *-pins).
- changed 'brcm,bcm2712-*pinctrl' to 'brcm,bcm2712c0-*pinctrl' since the former was more of a fallback and does not reflect a real silicon revision.
- moved status="okay" to the last entry in 'uarta' node.
- removed 'local-*-address' property from everywhere.
- dropped 'skip-init' property in 'uarta' node since it does not apply to linux kernel.
- renamed 'pwr-button' node to 'gpio-keys' and '
pwr_key' node to 'power_button'.- dropped an userspace related 'brcm,gpio-direct' property from gpio node.
--- DT BINDINGS ---
- binding schema file renamed to 'brcm,bcm2712c0-pinctrl.yaml' to reflect the compatible name.
- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
- added example section.
- moved allOf: block at the beginning of the schema.
- dropped some unnecessary new lines.
- replaced current layout to describe the pin subnodes with patternProperties (nodes now end with -state and -pins).
- expanded the schema description to give some context about STB family of pin controller and added some details about C0 and D0 silicon variants. This is also reflected in the commit message.
--- MISC ---
- enabled
CONFIG_PINCTRL_BRCMSTBin arm64 defconfig.Andrea della Porta (1):
arm64: defconfig: Enable BCM2712 on-chip pin controller driverIvan T. Ivanov (6):
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: bcm: Add STB family pin controller driver
arm64: dts: broadcom: bcm2712: Add pin controller nodes
arm64: dts: broadcom: bcm2712: Add one more GPIO node
arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
arm64: dts: broadcom: bcm2712: Add UARTA controller node.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++ .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 134 ++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 48 + arch/arm64/configs/defconfig | 1 + drivers/pinctrl/bcm/Kconfig | 13 + drivers/pinctrl/bcm/Makefile | 1 + drivers/pinctrl/bcm/pinctrl-brcmstb.c | 1195 +++++++++++++++++ 7 files changed, 1515 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.c
Quoted 5 lines
--
2.35.3
My bot found new DTB warnings on the .dts files added or changed in this series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: attempting to guess base-commit...
Base: tags/next-20250715 (exact match)
If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/broadcom/' for [email protected]:
arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: pinctrl@7d504100 (brcm,bcm2712c0-pinctrl): emmc-sd-default-state: 'oneOf' conditional failed, one must be fixed:
'function' is a required property
'bias-pull-up', 'pins' do not match any of the regexes: '-pins$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/pinctrl/brcm,brcmstb-pinctrl.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: pinctrl@7d504100 (brcm,bcm2712c0-pinctrl): emmc-sd-default-state: 'oneOf' conditional failed, one must be fixed:
'function' is a required property
'bias-pull-up', 'pins' do not match any of the regexes: '-pins$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/pinctrl/brcm,brcmstb-pinctrl.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'clocks' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'clock-names' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'interrupt-names' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: serial@7d50c000 (brcm,bcm7271-uart): Unevaluated properties are not allowed ('auto-flow-control', 'clock-frequency', 'reg-io-width', 'reg-shift' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: mmc@1100000 (brcm,bcm2712-sdhci): Unevaluated properties are not allowed ('sdhci-caps', 'sdhci-caps-mask' were unexpected)
from schema $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'clocks' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'clock-names' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'interrupt-names' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): Unevaluated properties are not allowed ('auto-flow-control', 'clock-frequency', 'reg-io-width', 'reg-shift' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: mmc@1100000 (brcm,bcm2712-sdhci): Unevaluated properties are not allowed ('sdhci-caps', 'sdhci-caps-mask' were unexpected)
from schema $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: pinctrl@7d504100 (brcm,bcm2712c0-pinctrl): emmc-sd-default-state: 'oneOf' conditional failed, one must be fixed:
'function' is a required property
'bias-pull-up', 'pins' do not match any of the regexes: '-pins$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/pinctrl/brcm,brcmstb-pinctrl.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'clocks' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'clock-names' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): 'interrupt-names' is a required property
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: serial@7d50c000 (brcm,bcm7271-uart): Unevaluated properties are not allowed ('auto-flow-control', 'clock-frequency', 'reg-io-width', 'reg-shift' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dtb: hvs@107c580000 (brcm,bcm2712-hvs): clocks: [[27, 4], [27, 16]] is too long
from schema $id: http://devicetree.org/schemas/display/brcm,bcm2835-hvs.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: mmc@1100000 (brcm,bcm2712-sdhci): Unevaluated properties are not allowed ('sdhci-caps', 'sdhci-caps-mask' were unexpected)
from schema $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dtb: hvs@107c580000 (brcm,bcm2712-hvs): clocks: [[27, 4], [27, 16]] is too long
from schema $id: http://devicetree.org/schemas/display/brcm,bcm2835-hvs.yaml#arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dtb: hvs@107c580000 (brcm,bcm2712-hvs): clocks: [[27, 4], [27, 16]] is too long
from schema $id: http://devicetree.org/schemas/display/brcm,bcm2835-hvs.yaml#
Quoted 32 lines · Andrea della Porta
Hi,
The following patches add a pin control driver for the BCM2712 SoC and few pin/gpio Devicetree nodes for Raspberry Pi 5.
Device driver is follow up version on what Andrea posted in April [1].
It is based on sources from here [2]. I just made few cosmetic changes and addressed review comments from earlier submission. I don't have documentation for this controller.
Patch 4 wire up power button on RPi5.
Patch 5 adds WiFi Devicetree node for RPi5.
Patch 6 adds Bluetooth Devicetree node for RPi5.
All this have been tested as kernel was directly booted RPi5 via kernel= config.txt option and cmdline.txt file with following content (Note I am using Tumbleweed RPi raw images)
# cat /boot/efi/cmdline.txt root=/dev/mmcblk0p3 rootwait rw systemd.show_status=1 console=tty ignore_loglevel earlycon console=ttyAMA10,115200With all these patches Bluetooth and Wifi are working fine (tm) with firmware files provided by openSUSE Tumbleweed.
All comments and suggestions are welcome!
Happy hacking!
Ivan and Andrea
Quoted 7 lines
[1] https://lore.kernel.org/lkml/[email protected]/
[2] https://github.com/raspberrypi/linux/blob/rpi-6.6.y/drivers/pinctrl/bcm/pinctrl-bcm2712.c
[3] https://lore.kernel.org/lkml/[email protected]/#t
[4] https://lore.kernel.org/all/[email protected]/CHANGES in V2: (all patchset is based upon linux-next/master)
Sorry, I've just realized this patchset has been sent with no V2 in the subject. Anyway, I'm preparing a new revision (which will be V3) after amending it after Rob's automated script warning.
I'll also split the patchset into two, oen with binding / driver for SoC pin controller and another with thie remaining DTS related patches.
Many thanks,
Andrea
Quoted 114 lines
--- PINCTRL DRIVER ---
- dropped bcm2712_c0_aon_sgpio_pin_funcs[] and bcm2712_d0_aon_sgpio_pin_funcs[] struct array definitions since they are not used anywhere.
- dropped 'arg' variable in
brcmstb_pinconf_set()as it's not used.- updated copyright info at the top.
- several changes in the declared macros. Renaming the macro name and the macro parameters to better reflect the semantic.
- reworked
MUX_BIT()macro to be more streamlined and easy to understand.- added
PAD_BIT()macro to avoid code duplication.- renamed 'lock' variable to '
fsel_lock'.- added some comments about non-existent pins on D0 silicon revision pin declarations.
-
brcmstb_pinctrl_fsel_set(),brcmstb_pull_config_set()andbrcmstb_pinconf_set()(and functions that call them) can now return-EINVALas error.- added myself as
MODULE_AUTHOR.- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
--- DTS ---
- moved 'clock-frequency' property from (uarta) board dts node to SoC dtsi node.
- added 'brcm,sdhci-brcmstb' compatible and 'clock-names' property to mmc node to avoid
dt_binding_checkerrors.- added 'brcm,bcm7445-gpio' compatible to gpio node to avoid
dt_binding_checkerrors.- renamed all pinctrl pin nodes as per yaml schema (*-state and *-pins).
- changed 'brcm,bcm2712-*pinctrl' to 'brcm,bcm2712c0-*pinctrl' since the former was more of a fallback and does not reflect a real silicon revision.
- moved status="okay" to the last entry in 'uarta' node.
- removed 'local-*-address' property from everywhere.
- dropped 'skip-init' property in 'uarta' node since it does not apply to linux kernel.
- renamed 'pwr-button' node to 'gpio-keys' and '
pwr_key' node to 'power_button'.- dropped an userspace related 'brcm,gpio-direct' property from gpio node.
--- DT BINDINGS ---
- binding schema file renamed to 'brcm,bcm2712c0-pinctrl.yaml' to reflect the compatible name.
- dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0 compatibles are permitted now.
- added example section.
- moved allOf: block at the beginning of the schema.
- dropped some unnecessary new lines.
- replaced current layout to describe the pin subnodes with patternProperties (nodes now end with -state and -pins).
- expanded the schema description to give some context about STB family of pin controller and added some details about C0 and D0 silicon variants. This is also reflected in the commit message.
--- MISC ---
- enabled
CONFIG_PINCTRL_BRCMSTBin arm64 defconfig.Andrea della Porta (1):
arm64: defconfig: Enable BCM2712 on-chip pin controller driverIvan T. Ivanov (6):
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: bcm: Add STB family pin controller driver
arm64: dts: broadcom: bcm2712: Add pin controller nodes
arm64: dts: broadcom: bcm2712: Add one more GPIO node
arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
arm64: dts: broadcom: bcm2712: Add UARTA controller node.../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++ .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 134 ++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 48 + arch/arm64/configs/defconfig | 1 + drivers/pinctrl/bcm/Kconfig | 13 + drivers/pinctrl/bcm/Makefile | 1 + drivers/pinctrl/bcm/pinctrl-brcmstb.c | 1195 +++++++++++++++++ 7 files changed, 1515 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.cSignature · 1 line
2.35.3