Skip to contentSkip to conversation

arm64: zynqmp: Misc changes

PATCH Applied Michal Simek 1 participant 9 messages Jul 18, 2025 – Aug 1, 2025

Subsystems (2)
Device tree bindings Arm/Zynq architecture
lore
Share & tools
lore

Michal Simek

author maintainer
#0 lore raw

cover arm64: zynqmp: Misc changes

Hi,

these are patches which I found in Xilinx tree which have never been upstreamed.

Thanks,
Michal

Michal Simek (3):
arm64: zynqmp: Use generic spi@ name in zcu111-revA
arm64: zynqmp: Remove undocumented arasan,has-mdma property
arm64: zynqmp: Introduce DP port labels

Paul Alvin (1):
arm64: zynqmp: Add cap-mmc-hw-reset and no-sd, no-sdio property to
eMMC

Rohit Visavalia (1):
arm64: zynqmp: Enable DP for zcu100, zcu102, zcu104, zcu111

Venkatesh Yadav Abbarapu (1):
arm64: zynqmp: Update the usb5744 hub node as per binding

Vishal Patel (1):
arm64: zynqmp: Fix pwm-fan polarity

 .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 19 +++++++++-
 .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 35 +++++++++++++++----
 .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts    |  7 ++--
 .../dts/xilinx/zynqmp-zc1751-xm016-dc2.dts    |  1 -
 .../dts/xilinx/zynqmp-zc1751-xm017-dc3.dts    |  1 -
 .../boot/dts/xilinx/zynqmp-zcu100-revC.dts    | 21 +++++++++++
 .../boot/dts/xilinx/zynqmp-zcu102-revA.dts    | 18 ++++++++++
 .../boot/dts/xilinx/zynqmp-zcu104-revA.dts    | 18 ++++++++++
 .../boot/dts/xilinx/zynqmp-zcu104-revC.dts    | 18 ++++++++++
 .../boot/dts/xilinx/zynqmp-zcu106-revA.dts    | 10 +++---
 .../boot/dts/xilinx/zynqmp-zcu111-revA.dts    | 20 ++++++++++-
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi        | 12 +++----
 12 files changed, 155 insertions(+), 25 deletions(-)
Signature · 3 lines
2.43.0

base-commit: 6832a9317eee280117cd695fa885b2b7a7a38daf
author maintainer
#1 lore raw

PATCH 1/7 arm64: zynqmp: Use generic spi@ name in zcu111-revA

DT schema requires to use spi@ name for SPI devices that's why fix it.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts +1 -1
index b67ff7ecf3c3..a0cddaa64424 100644
@@ -494,7 +494,7 @@ i2c@5 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <5>;
-				sc18is603@2f { /* sc18is602 - u93 */
+				sc18is603: spi@2f { /* sc18is602 - u93 */
 					compatible = "nxp,sc18is603";
 					reg = <0x2f>;
 					/* 4 gpios for CS not handled by driver */
Signature · 1 line
2.43.0
author maintainer
#2 lore raw

PATCH 2/7 arm64: zynqmp: Remove undocumented arasan,has-mdma property

In reply to Michal Simek

arasan,has-mdma is not described in DT binding that's why remove it.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 1 -
 arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 1 -
 2 files changed, 2 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts +0 -1
index 1850325e1d6c..2ad7423c2f05 100644
@@ -135,7 +135,6 @@ &nand0 {
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_nand0_default>;
-	arasan,has-mdma;
 
 	nand@0 {
 		reg = <0x0>;
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts +0 -1
index f553b317e6b2..8fbc33562bc4 100644
@@ -129,7 +129,6 @@ &i2c1 {
 /* MT29F64G08AECDBJ4-6 */
 &nand0 {
 	status = "okay";
-	arasan,has-mdma;
 	num-cs = <2>;
 };
Signature · 1 line
2.43.0
author maintainer
#3 lore raw

PATCH 3/7 arm64: zynqmp: Add cap-mmc-hw-reset and no-sd, no-sdio property to eMMC

In reply to Michal Simek

From: Paul Alvin <[email protected]>

Add "cap-mmc-hw-reset" property to the eMMC DT node to perform the eMMC device hardware reset.
Also, add "no-sd", "no-sdio" properties to eMMC DT node to skip unwanted sd, sdio related commands during initialization for eMMC device as this may lead to unnecessary register dump.

Signed-off-by Paul Alvin <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 3 +++
 arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | 3 +++
 2 files changed, 6 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +3 -0
index bfa7ea6b9224..51778df5540c 100644
@@ -233,6 +233,9 @@ &sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A */
 	pinctrl-0 = <&pinctrl_sdhci0_default>;
 	non-removable;
 	disable-wp;
+	no-sd;
+	no-sdio;
+	cap-mmc-hw-reset;
 	bus-width = <8>;
 	xlnx,mio-bank = <0>;
 	assigned-clock-rates = <187498123>;
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts +3 -0
index 62c2503a502a..3542844e6977 100644
@@ -509,6 +509,9 @@ &sdhci1 {
 	xlnx,mio-bank = <0>;
 	non-removable;
 	disable-wp;
+	no-sd;
+	no-sdio;
+	cap-mmc-hw-reset;
 	cap-power-off-card;
 	mmc-pwrseq = <&sdio_pwrseq>;
 	vqmmc-supply = <&wmmcsdio_fixed>;
Signature · 1 line
2.43.0
author maintainer
#4 lore raw

PATCH 4/7 arm64: zynqmp: Update the usb5744 hub node as per binding

In reply to Michal Simek

From: Venkatesh Yadav Abbarapu <[email protected]>

Updating the usb5744 hub node as per the latest upstream DT binding.

Signed-off-by Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 19 +++++++++++++-
 .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 25 ++++++++++++++++++-
 2 files changed, 42 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +18 -1
index 95d16904d765..a98a888d1385 100644
@@ -129,7 +129,6 @@ &usb0 {
 	pinctrl-0 = <&pinctrl_usb0_default>;
 	phy-names = "usb3-phy";
 	phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
-	/* missing usb5744 - u43 */
 };
 
 &dwc3_0 {

@@ -137,6 +136,24 @@ &dwc3_0 {
 	dr_mode = "host";
 	snps,usb3_lpm_capable;
 	maximum-speed = "super-speed";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/* 2.0 hub on port 1 */
+	hub_2_0: hub@1 {
+		compatible = "usb424,2744";
+		reg = <1>;
+		peer-hub = <&hub_3_0>;
+		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
+
+	/* 3.0 hub on port 2 */
+	hub_3_0: hub@2 {
+		compatible = "usb424,5744";
+		reg = <2>;
+		peer-hub = <&hub_2_0>;
+		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &sdhci1 { /* on CC with tuned parameters */
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +24 -1
index a74d0ac7e07a..7490efea98bd 100644
@@ -92,7 +92,10 @@ u14: ina260@40 { /* u14 */
 		label = "ina260-u14";
 		reg = <0x40>;
 	};
-	/* u43 - 0x2d - USB hub */
+	hub: usb-hub@2d {
+		compatible = "microchip,usb5744";
+		reg = <0x2d>;
+	};
 	/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
 };
 

@@ -138,6 +141,26 @@ &dwc3_0 {
 	dr_mode = "host";
 	snps,usb3_lpm_capable;
 	maximum-speed = "super-speed";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/* 2.0 hub on port 1 */
+	hub_2_0: hub@1 {
+		compatible = "usb424,2744";
+		reg = <1>;
+		peer-hub = <&hub_3_0>;
+		i2c-bus = <&hub>;
+		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
+
+	/* 3.0 hub on port 2 */
+	hub_3_0: hub@2 {
+		compatible = "usb424,5744";
+		reg = <2>;
+		peer-hub = <&hub_2_0>;
+		i2c-bus = <&hub>;
+		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &sdhci1 { /* on CC with tuned parameters */
Signature · 1 line
2.43.0
author maintainer
#5 lore raw

PATCH 5/7 arm64: zynqmp: Fix pwm-fan polarity

In reply to Michal Simek

From: Vishal Patel <[email protected]>

The correct operating mode for the fan is inversed (1). The previous pwm driver implementation had a bug and the polarity information was propagated incorrectly to the kernel. The normal (0) polarity specified in the device tree was incorrectly clearing the polarity bit in the counter control register. After the bug fix, setting the polarity to inversed (1) in the device tree will clear the polarity bit.
Also provide label for custom description based on this SOM.

Signed-off-by Vishal Patel <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +2 -2
index 51778df5540c..500af1d2232f 100644
@@ -90,10 +90,10 @@ ds36-led {
 		};
 	};
 
-	pwm-fan {
+	pwm_fan: pwm-fan {
 		compatible = "pwm-fan";
 		status = "okay";
-		pwms = <&ttc0 2 40000 0>;
+		pwms = <&ttc0 2 40000 1>;
 	};
 };
Signature · 1 line
2.43.0
author maintainer
#6 lore raw

PATCH 6/7 arm64: zynqmp: Introduce DP port labels

In reply to Michal Simek

Describe every port by unique label for easier wiring with DT overlays. And also labels help to describe which port is used for what.

Signed-off-by Michal Simek <[email protected]>

---

 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 10 ++++------
 arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts    | 10 ++++------
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi               | 12 ++++++------
 3 files changed, 14 insertions(+), 18 deletions(-)
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +4 -6
index 7490efea98bd..1d2b46d7949e 100644
@@ -112,13 +112,11 @@ &zynqmp_dpsub {
 	phy-names = "dp-phy0", "dp-phy1";
 	phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
 	assigned-clock-rates = <27000000>, <25000000>, <300000000>;
+};
 
-	ports {
-		port@5 {
-			dpsub_dp_out: endpoint {
-				remote-endpoint = <&dpcon_in>;
-			};
-		};
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
 	};
 };
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts +4 -6
index 7beedd730f94..cd132abf6e00 100644
@@ -1042,12 +1042,10 @@ &zynqmp_dpsub {
 	phy-names = "dp-phy0", "dp-phy1";
 	phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
 	       <&psgtr 0 PHY_TYPE_DP 1 3>;
+};
 
-	ports {
-		port@5 {
-			dpsub_dp_out: endpoint {
-				remote-endpoint = <&dpcon_in>;
-			};
-		};
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
 	};
 };
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +6 -6
index e11d282462bd..b20a560741e5 100644
@@ -1319,22 +1319,22 @@ ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
 
-				port@0 {
+				live_video: port@0 {
 					reg = <0>;
 				};
-				port@1 {
+				live_gfx: port@1 {
 					reg = <1>;
 				};
-				port@2 {
+				live_audio: port@2 {
 					reg = <2>;
 				};
-				port@3 {
+				out_video: port@3 {
 					reg = <3>;
 				};
-				port@4 {
+				out_audio: port@4 {
 					reg = <4>;
 				};
-				port@5 {
+				out_dp: port@5 {
 					reg = <5>;
 				};
 			};
Signature · 1 line
2.43.0
author maintainer
#7 lore raw

PATCH 7/7 arm64: zynqmp: Enable DP for zcu100, zcu102, zcu104, zcu111

In reply to Michal Simek

From: Rohit Visavalia <[email protected]>

Upstream DP DT binding enforcing dp-connector and port description to operate properly.

Signed-off-by Rohit Visavalia <[email protected]>
Signed-off-by Michal Simek <[email protected]>

---

 .../boot/dts/xilinx/zynqmp-zcu100-revC.dts     | 18 ++++++++++++++++++
 .../boot/dts/xilinx/zynqmp-zcu102-revA.dts     | 18 ++++++++++++++++++
 .../boot/dts/xilinx/zynqmp-zcu104-revA.dts     | 18 ++++++++++++++++++
 .../boot/dts/xilinx/zynqmp-zcu104-revC.dts     | 18 ++++++++++++++++++
 .../boot/dts/xilinx/zynqmp-zcu111-revA.dts     | 18 ++++++++++++++++++
 5 files changed, 90 insertions(+)
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts +18 -0
index 3542844e6977..4ec8a400494e 100644
@@ -134,6 +134,18 @@ si5335_1: si5335-1 { /* clk1_dp - u23 */
 		#clock-cells = <0>;
 		clock-frequency = <27000000>;
 	};
+
+	dpcon {
+		compatible = "dp-connector";
+		label = "P11";
+		type = "full-size";
+
+		port {
+			dpcon_in: endpoint {
+				remote-endpoint = <&dpsub_dp_out>;
+			};
+		};
+	};
 };
 
 &dcc {

@@ -607,3 +619,9 @@ &zynqmp_dpsub {
 	phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
 	       <&psgtr 0 PHY_TYPE_DP 1 1>;
 };
+
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
+	};
+};
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +18 -0
index 7e26489a1539..e172a30e7b21 100644
@@ -151,6 +151,18 @@ refhdmi: refhdmi {
 		#clock-cells = <0>;
 		clock-frequency = <114285000>;
 	};
+
+	dpcon {
+		compatible = "dp-connector";
+		label = "P11";
+		type = "full-size";
+
+		port {
+			dpcon_in: endpoint {
+				remote-endpoint = <&dpsub_dp_out>;
+			};
+		};
+	};
 };
 
 &can1 {

@@ -1045,3 +1057,9 @@ &zynqmp_dpsub {
 	phy-names = "dp-phy0";
 	phys = <&psgtr 1 PHY_TYPE_DP 0 3>;
 };
+
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
+	};
+};
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts +18 -0
index eb2090673ec1..fe8f151ed706 100644
@@ -60,6 +60,18 @@ clock_8t49n287_3: clk27 {
 		#clock-cells = <0>;
 		clock-frequency = <27000000>;
 	};
+
+	dpcon {
+		compatible = "dp-connector";
+		label = "P11";
+		type = "full-size";
+
+		port {
+			dpcon_in: endpoint {
+				remote-endpoint = <&dpsub_dp_out>;
+			};
+		};
+	};
 };
 
 &can1 {

@@ -529,3 +541,9 @@ &zynqmp_dpsub {
 	phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
 	       <&psgtr 0 PHY_TYPE_DP 1 3>;
 };
+
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
+	};
+};
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts +18 -0
index 4694d0a841f1..3ee8ab224722 100644
@@ -65,6 +65,18 @@ clock_8t49n287_3: clk27 {
 		#clock-cells = <0>;
 		clock-frequency = <27000000>;
 	};
+
+	dpcon {
+		compatible = "dp-connector";
+		label = "P11";
+		type = "full-size";
+
+		port {
+			dpcon_in: endpoint {
+				remote-endpoint = <&dpsub_dp_out>;
+			};
+		};
+	};
 };
 
 &can1 {

@@ -541,3 +553,9 @@ &zynqmp_dpsub {
 	phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
 	       <&psgtr 0 PHY_TYPE_DP 1 3>;
 };
+
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
+	};
+};
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts +18 -0
index a0cddaa64424..428b5558fbba 100644
@@ -129,6 +129,18 @@ ref48: ref48M {
 		#clock-cells = <0>;
 		clock-frequency = <48000000>;
 	};
+
+	dpcon {
+		compatible = "dp-connector";
+		label = "P11";
+		type = "full-size";
+
+		port {
+			dpcon_in: endpoint {
+				remote-endpoint = <&dpsub_dp_out>;
+			};
+		};
+	};
 };
 
 &dcc {

@@ -864,3 +876,9 @@ &zynqmp_dpsub {
 	phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
 	       <&psgtr 0 PHY_TYPE_DP 1 1>;
 };
+
+&out_dp {
+	dpsub_dp_out: endpoint {
+		remote-endpoint = <&dpcon_in>;
+	};
+};
Signature · 1 line
2.43.0
author maintainer Applied
#8 lore raw
In reply to Michal Simek
Quoted 27 lines · Michal Simek

Hi,

these are patches which I found in Xilinx tree which have never been upstreamed.

Thanks,
Michal

Michal Simek (3):
arm64: zynqmp: Use generic spi@ name in zcu111-revA
arm64: zynqmp: Remove undocumented arasan,has-mdma property
arm64: zynqmp: Introduce DP port labels

Paul Alvin (1):
arm64: zynqmp: Add cap-mmc-hw-reset and no-sd, no-sdio property to
eMMC

Rohit Visavalia (1):

   arm64: zynqmp: Enable DP for zcu100, zcu102, zcu104, zcu111

Venkatesh Yadav Abbarapu (1):
arm64: zynqmp: Update the usb5744 hub node as per binding

Vishal Patel (1):
arm64: zynqmp: Fix pwm-fan polarity

Quoted 14 lines
  .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 19 +++++++++-
  .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 35 +++++++++++++++----
  .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts    |  7 ++--
  .../dts/xilinx/zynqmp-zc1751-xm016-dc2.dts    |  1 -
  .../dts/xilinx/zynqmp-zc1751-xm017-dc3.dts    |  1 -
  .../boot/dts/xilinx/zynqmp-zcu100-revC.dts    | 21 +++++++++++
  .../boot/dts/xilinx/zynqmp-zcu102-revA.dts    | 18 ++++++++++
  .../boot/dts/xilinx/zynqmp-zcu104-revA.dts    | 18 ++++++++++
  .../boot/dts/xilinx/zynqmp-zcu104-revC.dts    | 18 ++++++++++
  .../boot/dts/xilinx/zynqmp-zcu106-revA.dts    | 10 +++---
  .../boot/dts/xilinx/zynqmp-zcu111-revA.dts    | 20 ++++++++++-
  arch/arm64/boot/dts/xilinx/zynqmp.dtsi        | 12 +++----
  12 files changed, 155 insertions(+), 25 deletions(-)

Applied.
M