powerpc64/bpf: Inline helper in powerpc JIT
Subsystems (3)
PATCH v4 1/2 powerpc64/bpf: Support internal-only MOV instruction to resolve per-CPU addrs
In reply to Saket Kumar BhaskarWith the introduction of commit 7bdbf7446305 ("bpf: add special internal-only MOV instruction to resolve per-CPU addrs"), a new BPF instruction BPF_MOV64_PERCPU_REG has been added to resolve absolute addresses of per-CPU data from their per-CPU offsets. This update requires enabling support for this instruction in the powerpc JIT compiler.
As of commit 7a0268fa1a36 ("[PATCH] powerpc/64: per cpu data optimisations"), the per-CPU data offset for the CPU is stored in the paca.
To support this BPF instruction in the powerpc JIT, the following powerpc instructions are emitted:
if (IS_ENABLED(CONFIG_SMP))
ld tmp1_reg, 48(13) //Load per-CPU data offset from paca(r13) in tmp1_reg.
add dst_reg, src_reg, tmp1_reg //Add the per cpu offset to the dst.
else if (src_reg != dst_reg)
mr dst_reg, src_reg //Move src_reg to dst_reg, if src_reg != dst_reg
To evaluate the performance improvements introduced by this change, the benchmark described in [1] was employed.
Before Change:
glob-arr-inc : 41.580 ± 0.034M/s arr-inc : 39.592 ± 0.055M/s hash-inc : 25.873 ± 0.012M/s
After Change:
glob-arr-inc : 42.024 ± 0.049M/s arr-inc : 55.447 ± 0.031M/s hash-inc : 26.565 ± 0.014M/s
[1] https://github.com/anakryiko/linux/commit/8dec900975ef
--- arch/powerpc/net/bpf_jit_comp.c | 5 +++++ arch/powerpc/net/bpf_jit_comp64.c | 10 ++++++++++ 2 files changed, 15 insertions(+)
arch/powerpc/net/bpf_jit_comp.c +5 -0
@@ -466,6 +466,11 @@ bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)return true; } +bool bpf_jit_supports_percpu_insn (void ) +{ +return IS_ENABLED (CONFIG_PPC64 ); +} +void *arch_alloc_bpf_trampoline (unsigned int size) {return bpf_prog_pack_alloc (size, bpf_jit_fill_ill_insns);
arch/powerpc/net/bpf_jit_comp64.c +10 -0
@@ -918,6 +918,16 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codecase BPF_ALU |BPF_MOV |BPF_X :/* (u32) dst = src */ case BPF_ALU64 |BPF_MOV |BPF_X :/* dst = src */ +if (insn_is_mov_percpu_addr (&insn[i])) { +if (IS_ENABLED (CONFIG_SMP )) { +EMIT (PPC_RAW_LD (tmp1_reg, _R13, offsetof(struct paca_struct , data_offset))); +EMIT (PPC_RAW_ADD (dst_reg, src_reg, tmp1_reg)); + }else if (src_reg != dst_reg) { +EMIT (PPC_RAW_MR (dst_reg, src_reg)); + } +break ; + } +if (insn_is_cast_user (&insn[i])) {EMIT (PPC_RAW_RLDICL_DOT (tmp1_reg, src_reg,0 ,32 ));PPC_LI64 (dst_reg, (ctx->user_vm_start &0xffffffff00000000UL ));
Signature · 1 line
2.51.0
PATCH v4 2/2 powerpc64/bpf: Inline bpf_get_smp_processor_id() and bpf_get_current_task/_btf()
In reply to Saket Kumar BhaskarInline the calls to bpf_get_smp_processor_id() and bpf_get_current_task/_btf() in the powerpc bpf jit.
powerpc saves the Logical processor number (paca_index) and pointer to current task (__current) in paca.
Here is how the powerpc JITed assembly changes after this commit:
Before:
cpu = bpf_get_smp_processor_id();
addis 12, 2, -517
addi 12, 12, -29456
mtctr 12
bctrl
mr 8, 3
After:
cpu = bpf_get_smp_processor_id();
lhz 8, 8(13)
To evaluate the performance improvements introduced by this change, the benchmark described in [1] was employed.
+---------------+-------------------+-------------------+--------------+ | Name | Before | After | % change | |---------------+-------------------+-------------------+--------------| | glob-arr-inc | 40.701 ± 0.008M/s | 55.207 ± 0.021M/s | + 35.64% | | arr-inc | 39.401 ± 0.007M/s | 56.275 ± 0.023M/s | + 42.42% | | hash-inc | 24.944 ± 0.004M/s | 26.212 ± 0.003M/s | + 5.08% | +---------------+-------------------+-------------------+--------------+
[1] https://github.com/anakryiko/linux/commit/8dec900975ef
--- arch/powerpc/net/bpf_jit_comp.c | 12 ++++++++++++ arch/powerpc/net/bpf_jit_comp64.c | 11 +++++++++++ 2 files changed, 23 insertions(+)
arch/powerpc/net/bpf_jit_comp.c +12 -0
@@ -471,6 +471,18 @@ bool bpf_jit_supports_percpu_insn(void)return IS_ENABLED (CONFIG_PPC64 ); } +bool bpf_jit_inlines_helper_call (s32 imm) +{ +switch (imm) { +case BPF_FUNC_get_smp_processor_id: +case BPF_FUNC_get_current_task: +case BPF_FUNC_get_current_task_btf: +return true; +default : +return false; + } +} +void *arch_alloc_bpf_trampoline (unsigned int size) {return bpf_prog_pack_alloc (size, bpf_jit_fill_ill_insns);
arch/powerpc/net/bpf_jit_comp64.c +11 -0
@@ -1400,6 +1400,17 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codecase BPF_JMP |BPF_CALL : ctx->seen |=SEEN_FUNC ; +if (src_reg ==bpf_to_ppc (BPF_REG_0 )) { +if (imm == BPF_FUNC_get_smp_processor_id) { +EMIT (PPC_RAW_LHZ (src_reg, _R13, offsetof(struct paca_struct , paca_index))); +break ; + }else if (imm == BPF_FUNC_get_current_task || + imm == BPF_FUNC_get_current_task_btf) { +EMIT (PPC_RAW_LD (src_reg, _R13, offsetof(struct paca_struct , __current))); +break ; + } + } + ret =bpf_jit_get_func_addr (fp, &insn[i], extra_pass, &func_addr, &func_addr_fixed);if (ret <0 )
Signature · 1 line
2.51.0
v4 cover powerpc64/bpf: Inline helper in powerpc JIT
This series add support for internal only per-CPU instructions, inlines the bpf_get_smp_processor_id() and bpf_get_current_task() helper calls for powerpc BPF JIT.
Changes since v3:
* Added break after computing per cpu address so that the computed address is not overwritten by src_reg as suggested by AI bot.
v3: https://lore.kernel.org/all/[email protected]/
Changes since v2:
* Collected Reviewed-by tag.
* Inlined bpf_get_current_task/btf().
* Fixed addressing of src_reg and BPF_REG_0. (Christophe)
* Fixed condition for non smp case as suggested by Christophe.
v2: https://lore.kernel.org/all/[email protected]/
Changes since v1:
* Addressed Christophe's comments.
* Inlined bpf_get_current_task() as well.
v1: https://lore.kernel.org/all/[email protected]/
Saket Kumar Bhaskar (2):
powerpc64/bpf: Support internal-only MOV instruction to resolve
per-CPU addrs
powerpc64/bpf: Inline bpf_get_smp_processor_id() and
bpf_get_current_task/_btf()
arch/powerpc/net/bpf_jit_comp.c | 17 +++++++++++++++++ arch/powerpc/net/bpf_jit_comp64.c | 21 +++++++++++++++++++++ 2 files changed, 38 insertions(+)
Signature · 1 line
2.51.0
Quoted 5 lines · Saket Kumar Bhaskar
This series add support for internal only per-CPU instructions, inlines the
bpf_get_smp_processor_id()andbpf_get_current_task()helper calls for powerpc BPF JIT.
This is marked for bpf-next tree, but I think this should actually go through ppc64-specific tree, is that right?
Quoted 33 lines
Changes since v3:
* Added break after computing per cpu address so that the computed address is not overwritten bysrc_regas suggested by AI bot.v3: https://lore.kernel.org/all/[email protected]/
Changes since v2:
* Collected Reviewed-by tag.
* Inlined bpf_get_current_task/btf().
* Fixed addressing ofsrc_regandBPF_REG_0. (Christophe)
* Fixed condition for non smp case as suggested by Christophe.v2: https://lore.kernel.org/all/[email protected]/
Changes since v1:
* Addressed Christophe's comments.
* Inlinedbpf_get_current_task()as well.v1: https://lore.kernel.org/all/[email protected]/
Saket Kumar Bhaskar (2):
powerpc64/bpf: Support internal-only MOV instruction to resolve
per-CPU addrs
powerpc64/bpf: Inlinebpf_get_smp_processor_id()andbpf_get_current_task/_btf()arch/powerpc/net/bpf_jit_comp.c | 17 +++++++++++++++++ arch/powerpc/net/bpf_jit_comp64.c | 21 +++++++++++++++++++++ 2 files changed, 38 insertions(+)--
2.51.0
Re: [PATCH bpf-next v4 1/2] powerpc64/bpf: Support internal-only MOV instruction to resolve per-CPU addrs
In reply to Saket Kumar BhaskarQuoted 27 lines · Saket Kumar Bhaskar
With the introduction of commit
7bdbf7446305("bpf: add special internal-only MOV instruction to resolve per-CPU addrs"), a new BPF instructionBPF_MOV64_PERCPU_REGhas been added to resolve absolute addresses of per-CPU data from their per-CPU offsets. This update requires enabling support for this instruction in the powerpc JIT compiler.As of commit
7a0268fa1a36("[PATCH] powerpc/64: per cpu data optimisations"), the per-CPU data offset for the CPU is stored in the paca.To support this BPF instruction in the powerpc JIT, the following powerpc instructions are emitted:
if (IS_ENABLED(CONFIG_SMP))
ldtmp1_reg, 48(13) //Load per-CPU data offset from paca(r13) intmp1_reg.
adddst_reg,src_reg,tmp1_reg//Add the per cpu offset to the dst.
else if (src_reg!=dst_reg)
mrdst_reg,src_reg//Movesrc_regtodst_reg, ifsrc_reg!=dst_regTo evaluate the performance improvements introduced by this change, the benchmark described in [1] was employed.
Before Change:
glob-arr-inc : 41.580 ± 0.034M/s arr-inc : 39.592 ± 0.055M/s hash-inc : 25.873 ± 0.012M/s
Quoted 7 lines
After Change:
glob-arr-inc : 42.024 ± 0.049M/s arr-inc : 55.447 ± 0.031M/s hash-inc : 26.565 ± 0.014M/s
Looks good to me.
Quoted 44 lines
Reviewed-by Puranjay Mohan <[email protected]>Signed-off-by Saket Kumar Bhaskar <[email protected]>--- arch/powerpc/net/bpf_jit_comp.c | 5 +++++ arch/powerpc/net/bpf_jit_comp64.c | 10 ++++++++++ 2 files changed, 15 insertions(+)arch/powerpc/net/bpf_jit_comp.c +5
-0@@ -466,6 +466,11 @@ bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)return true; } +bool bpf_jit_supports_percpu_insn (void ) +{ +return IS_ENABLED (CONFIG_PPC64 ); +} +void *arch_alloc_bpf_trampoline (unsigned int size) {return bpf_prog_pack_alloc (size, bpf_jit_fill_ill_insns);arch/powerpc/net/bpf_jit_comp64.c +10
-0@@ -918,6 +918,16 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codecase BPF_ALU |BPF_MOV |BPF_X :/* (u32) dst = src */ case BPF_ALU64 |BPF_MOV |BPF_X :/* dst = src */ +if (insn_is_mov_percpu_addr (&insn[i])) { +if (IS_ENABLED (CONFIG_SMP )) { +EMIT (PPC_RAW_LD (tmp1_reg, _R13, offsetof(struct paca_struct , data_offset))); +EMIT (PPC_RAW_ADD (dst_reg, src_reg, tmp1_reg)); + }else if (src_reg != dst_reg) { +EMIT (PPC_RAW_MR (dst_reg, src_reg)); + } +break ; + } +if (insn_is_cast_user (&insn[i])) {EMIT (PPC_RAW_RLDICL_DOT (tmp1_reg, src_reg,0 ,32 ));PPC_LI64 (dst_reg, (ctx->user_vm_start &0xffffffff00000000UL ));
Re: [PATCH bpf-next v4 2/2] powerpc64/bpf: Inline bpf_get_smp_processor_id() and bpf_get_current_task/_btf()
In reply to Saket Kumar BhaskarQuoted 35 lines · Saket Kumar Bhaskar
Inline the calls to
bpf_get_smp_processor_id()and bpf_get_current_task/_btf() in the powerpc bpf jit.powerpc saves the Logical processor number (
paca_index) and pointer to current task (__current) in paca.Here is how the powerpc JITed assembly changes after this commit:
Before:
cpu =
bpf_get_smp_processor_id();addis 12, 2, -517
addi 12, 12, -29456
mtctr 12
bctrl
mr 8, 3After:
cpu =
bpf_get_smp_processor_id();lhz 8, 8(13)
To evaluate the performance improvements introduced by this change, the benchmark described in [1] was employed.
+---------------+-------------------+-------------------+--------------+ | Name | Before | After | % change | |---------------+-------------------+-------------------+--------------| | glob-arr-inc | 40.701 ± 0.008M/s | 55.207 ± 0.021M/s | + 35.64% | | arr-inc | 39.401 ± 0.007M/s | 56.275 ± 0.023M/s | + 42.42% | | hash-inc | 24.944 ± 0.004M/s | 26.212 ± 0.003M/s | + 5.08% | +---------------+-------------------+-------------------+--------------+
Quoted 2 lines
Looks good.
Quoted 52 lines
Reviewed-by Puranjay Mohan <[email protected]>Signed-off-by Saket Kumar Bhaskar <[email protected]>--- arch/powerpc/net/bpf_jit_comp.c | 12 ++++++++++++ arch/powerpc/net/bpf_jit_comp64.c | 11 +++++++++++ 2 files changed, 23 insertions(+)arch/powerpc/net/bpf_jit_comp.c +12
-0@@ -471,6 +471,18 @@ bool bpf_jit_supports_percpu_insn(void)return IS_ENABLED (CONFIG_PPC64 ); } +bool bpf_jit_inlines_helper_call (s32 imm) +{ +switch (imm) { +case BPF_FUNC_get_smp_processor_id: +case BPF_FUNC_get_current_task: +case BPF_FUNC_get_current_task_btf: +return true; +default : +return false; + } +} +void *arch_alloc_bpf_trampoline (unsigned int size) {return bpf_prog_pack_alloc (size, bpf_jit_fill_ill_insns);arch/powerpc/net/bpf_jit_comp64.c +11
-0@@ -1400,6 +1400,17 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codecase BPF_JMP |BPF_CALL : ctx->seen |=SEEN_FUNC ; +if (src_reg ==bpf_to_ppc (BPF_REG_0 )) { +if (imm == BPF_FUNC_get_smp_processor_id) { +EMIT (PPC_RAW_LHZ (src_reg, _R13, offsetof(struct paca_struct , paca_index))); +break ; + }else if (imm == BPF_FUNC_get_current_task || + imm == BPF_FUNC_get_current_task_btf) { +EMIT (PPC_RAW_LD (src_reg, _R13, offsetof(struct paca_struct , __current))); +break ; + } + } + ret =bpf_jit_get_func_addr (fp, &insn[i], extra_pass, &func_addr, &func_addr_fixed);if (ret <0 )
Hari Bathini
maintainerQuoted 9 lines · Andrii Nakryiko
Quoted 5 lines · Saket Kumar Bhaskar
This series add support for internal only per-CPU instructions, inlines the
bpf_get_smp_processor_id()andbpf_get_current_task()helper calls for powerpc BPF JIT.This is marked for bpf-next tree, but I think this should actually go through ppc64-specific tree, is that right?
Yeah.
Maddy, can you pick it via powerpc tree?
- Hari
Madhavan Srinivasan
maintainerQuoted 10 lines · Hari Bathini
Quoted 7 lines · Andrii Nakryiko
Quoted 5 lines · Saket Kumar Bhaskar
This series add support for internal only per-CPU instructions, inlines the
bpf_get_smp_processor_id()andbpf_get_current_task()helper calls for powerpc BPF JIT.
Quoted 5 lines
Quoted 2 lines
This is marked for bpf-next tree, but I think this should actually go through ppc64-specific tree, is that right?
Yeah.
Maddy, can you pick it via powerpc tree?
Yep, will pull this via powerpc tree.
Maddy
Quoted 2 lines
- Hari
Quoted 9 lines · Saket Kumar Bhaskar
This series add support for internal only per-CPU instructions, inlines the
bpf_get_smp_processor_id()andbpf_get_current_task()helper calls for powerpc BPF JIT.Changes since v3:
* Added break after computing per cpu address so that the computed address is not overwritten bysrc_regas suggested by AI bot.[...]
Applied to powerpc/next.
[1/2] powerpc64/bpf: Support internal-only MOV instruction to resolve per-CPU addrs
https://git.kernel.org/powerpc/c/58a075adf3fb1701435d29e0113284dc31d6e43e [2/2] powerpc64/bpf: Inline bpf_get_smp_processor_id() and bpf_get_current_task/_btf() https://git.kernel.org/powerpc/c/20ab1d11265350a9ea3d315d6c70170b8198f329
cheers