ARM: dts: aspeed: Add ASRock Rack B650D4U BMC support

PATCH Superseded Prasanth Kumar Padarthi 3 participants 9 messages Sep 22

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Device tree bindings Arm/Aspeed machine support

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Prasanth Kumar Padarthi

author

2026-09-22 12:37 UTC #0 lore raw

v7 cover ARM: dts: aspeed: Add ASRock Rack B650D4U BMC support

Add support for the ASRock Rack B650D4U BMC, based on the ASPEED AST2600 SoC.

The series adds the board compatible string and describes the BMC memory, SPI NOR flash layout, UART console, GPIO line names, graphics reserved memory, I2C EEPROM, and MAC0 connected to an RTL8211F Ethernet PHY.

MAC0 obtains its MAC address from the EEPROM on I2C7 and uses RGMII-ID mode.

Changes in v7:

* Correct the GPIOP bank line names for the reset, power and NMI button/control signals according to the confirmed board mapping.
* Remove the obsolete GPIOF5 reset-button line name.
* Leave the binding patch unchanged.

The B650D4U DTB builds successfully using aspeed_g5_defconfig.

Prasanth Kumar Padarthi (2):
dt-bindings: arm: aspeed: Add ASRock Rack B650D4U
ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

 .../bindings/arm/aspeed/aspeed.yaml           |   1 +
 arch/arm/boot/dts/aspeed/Makefile             |   1 +
 .../dts/aspeed/aspeed-bmc-asrock-b650d4u.dts  | 135 ++++++++++++++++++
 3 files changed, 137 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts

Signature · 1 line

2.47.3

Prasanth Kumar Padarthi

author

2026-09-22 12:37 UTC #1 lore raw

PATCH v7 1/2 dt-bindings: arm: aspeed: Add ASRock Rack B650D4U

Add the compatible string for the ASRock Rack B650D4U BMC, which is an AST2600-based server motherboard.

Acked-by Krzysztof Kozlowski <[email protected]>

Signed-off-by Prasanth Kumar Padarthi <[email protected]>

---
 Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 +
 1 file changed, 1 insertion(+)

Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +1 -0

index 9ba195b8f22d..4c9e96801c1a 100644
@@ -81,6 +81,7 @@ properties:
               - ampere,mtmitchell-bmc
               - aspeed,ast2600-evb
               - aspeed,ast2600-evb-a1
+              - asrock,b650d4u-bmc
               - asus,ast2600-kommando-ipmi-card
               - asus,x4tf-bmc
               - facebook,anacapa-bmc

Signature · 1 line

2.47.3

Prasanth Kumar Padarthi

author

2026-09-22 12:37 UTC #2 lore raw

PATCH v7 2/2 ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

In reply to Prasanth Kumar Padarthi

Add the device tree for the ASRock Rack B650D4U BMC, which is based on the ASPEED AST2600 SoC.

Describe the BMC memory, SPI NOR flash layout, UART console, GPIO line names, video framebuffer memory, I2C EEPROM, and MAC0 connected to an RTL8211F Ethernet PHY.

Use the EEPROM on I2C7 as the NVMEM provider for the MAC0 address.

Configure MAC0 to use the RTL8211F in RGMII-ID mode.

Signed-off-by Prasanth Kumar Padarthi <[email protected]>

---
 arch/arm/boot/dts/aspeed/Makefile             |   1 +
 .../dts/aspeed/aspeed-bmc-asrock-b650d4u.dts  | 135 ++++++++++++++++++
 2 files changed, 136 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts

arch/arm/boot/dts/aspeed/Makefile +1 -0

index 6b68671f9379..b109491d5c8f 100644
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
 	aspeed-bmc-ampere-mtmitchell.dtb \
 	aspeed-bmc-arm-stardragon4800-rep2.dtb \
 	aspeed-bmc-asrock-altrad8.dtb \
+	aspeed-bmc-asrock-b650d4u.dtb \
 	aspeed-bmc-asrock-e3c246d4i.dtb \
 	aspeed-bmc-asrock-e3c256d4i.dtb \
 	aspeed-bmc-asrock-paul-ipmi-card.dtb \

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +135 -0

135 lines not on this page · raw message

Signature · 1 line

2.47.3

Andrew Lunn

Reviewed-by on v7 2/2

2026-09-22 12:50 UTC #3 lore raw

Re: [PATCH v7 2/2] ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

Quoted 9 lines

+&mac0 {

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +8 -0

+	nvmem-cells = <&eth0_macaddress>;
+	nvmem-cell-names = "mac-address";
+	phy-handle = <&ethphy0>;
+	phy-mode = "rgmii-id";
+	pinctrl-0 = <&pinctrl_rgmii1_default>;
+	pinctrl-names = "default";
+
+	status = "okay";

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts line 131

Quoted 10 lines

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +10 -0

+};
+
+&mdio0 {
+	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0>;
+	};
+};

For these nodes only:

Reviewed-by Andrew Lunn <[email protected]>

Andrew

Tan Siewert

Reviewed-by on v7 2/2

2026-09-22 13:28 UTC #4 lore raw

Re: [PATCH v7 2/2] ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

In reply to Prasanth Kumar Padarthi

Quoted 7 lines

Add the device tree for the ASRock Rack B650D4U BMC, which is based on the ASPEED AST2600 SoC.
Describe the BMC memory, SPI NOR flash layout, UART console, GPIO line names, video framebuffer memory, I2C EEPROM, and MAC0 connected to an RTL8211F Ethernet PHY.

Quoted 6 lines

Use the EEPROM on I2C7 as the NVMEM provider for the MAC0 address.
Configure MAC0 to use the RTL8211F in RGMII-ID mode.
Signed-off-by Prasanth Kumar Padarthi <[email protected]>

*snip*

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts

Quoted 5 lines

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +0 -0
new file mode 100644
index 000000000000..a4e384588a54

*snip*

Quoted 11 lines

+&gpio0 {

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +10 -0

+	gpio-line-names =
+		/* A0-A7 */	"","","","","","","","",
+		/* B0-B7 */	"","","","","","","","",
+		/* C0-C7 */	"","","","","","","","",
+		/* D0-D7 */	"","","","","","","","",
+		/* E0-E7 */	"","","","","","","","",
+		/* F0-F7 */	"","","","","","","","",
+		/* G0-G7 */	"","","","","","","","",
+		/* H0-H7 */	"","","","","","","","",
+		/* I0-I7 */	"","","","","","","","",

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts line 80

Quoted 10 lines

arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +10 -0

+		/* J0-J7 */	"","","","","","","","",
+		/* K0-K7 */	"","","","","","","","",
+		/* L0-L7 */	"","","","","","","","",
+		/* M0-M7 */	"","","","","","","","",
+		/* N0-N7 */	"","","","","","","","",
+		/* O0-O7 */	"","","","","","","","",
+		/* P0-P7 */	"button-reset-n","control-reset-n",
+		"button-power-n","control-power-n",
+		"button-nmi-n","control-nmi-n",
+		"","",

Nit: indentation.

Other than that:

Reviewed-by Tan Siewert <[email protected]>

Signature · 1 line

Tan Siewert <[email protected]>

Prasanth

author

2026-09-22 16:04 UTC #5 lore raw

Re: [PATCH v7 2/2] ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

Hi Tan,

Thank you for the review.

I have successfully rebuilt the B650D4U DTB using multi_v7_defconfig, with CONFIG_ARCH_ASPEED=y and CONFIG_MACH_ASPEED_G6=y.

I'll correct the GPIOP indentation and retain the review trailers if another revision is needed.

Thanks,
Prasanth

Quoted 55 lines · Tan Siewert

Quoted 8 lines
Add the device tree for the ASRock Rack B650D4U BMC, which is based on the ASPEED AST2600 SoC.
Describe the BMC memory, SPI NOR flash layout, UART console, GPIO line names, video framebuffer memory, I2C EEPROM, and MAC0 connected to an RTL8211F Ethernet PHY.
Quoted 6 lines
Use the EEPROM on I2C7 as the NVMEM provider for the MAC0 address.
Configure MAC0 to use the RTL8211F in RGMII-ID mode.
Signed-off-by Prasanth Kumar Padarthi <[email protected]>
*snip*
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +0 -0
new file mode 100644
index 000000000000..a4e384588a54
*snip*
Quoted 11 lines
+&gpio0 {
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +10 -0
+     gpio-line-names =
+             /* A0-A7 */     "","","","","","","","",
+             /* B0-B7 */     "","","","","","","","",
+             /* C0-C7 */     "","","","","","","","",
+             /* D0-D7 */     "","","","","","","","",
+             /* E0-E7 */     "","","","","","","","",
+             /* F0-F7 */     "","","","","","","","",
+             /* G0-G7 */     "","","","","","","","",
+             /* H0-H7 */     "","","","","","","","",
+             /* I0-I7 */     "","","","","","","","",
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts line 80
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts new file +10 -0
+             /* J0-J7 */     "","","","","","","","",
+             /* K0-K7 */     "","","","","","","","",
+             /* L0-L7 */     "","","","","","","","",
+             /* M0-M7 */     "","","","","","","","",
+             /* N0-N7 */     "","","","","","","","",
+             /* O0-O7 */     "","","","","","","","",
+             /* P0-P7 */     "button-reset-n","control-reset-n",
+             "button-power-n","control-power-n",
+             "button-nmi-n","control-nmi-n",
+             "","",
Nit: indentation.
Other than that:
Reviewed-by Tan Siewert <[email protected]>
--
Tan Siewert <[email protected]>

Tan Siewert

2026-09-22 13:21 UTC #6 lore raw

In reply to Prasanth Kumar Padarthi

Quoted 6 lines · Prasanth Kumar Padarthi

Add support for the ASRock Rack B650D4U BMC, based on the ASPEED AST2600 SoC.
The series adds the board compatible string and describes the BMC memory, SPI NOR flash layout, UART console, GPIO line names, graphics reserved memory, I2C EEPROM, and MAC0 connected to an RTL8211F Ethernet PHY.
MAC0 obtains its MAC address from the EEPROM on I2C7 and uses RGMII-ID mode.

Quoted 7 lines

Changes in v7:
* Correct the GPIOP bank line names for the reset, power and NMI button/control signals according to the confirmed board mapping.
* Remove the obsolete GPIOF5 reset-button line name.
* Leave the binding patch unchanged.
The B650D4U DTB builds successfully using aspeed_g5_defconfig.

What? The B650D4U has an AST2600, so using aspeed_g5_defconfig means you're using a config set for the AST2*5*00...

Also, please preserve the trailers from previous serieses (i.e. Andrew's Reviewed-by trailer) if you don't change anything significantly for the parts that got reviewed.

Tan

Prasanth

author

2026-09-22 13:26 UTC #7 lore raw

Hi Tan,

Thank you for catching these issues.

You're correct about the defconfig. I used aspeed_g5_defconfig for the DTB build and incorrectly reported it as validation for the AST2600. I'll rebuild using the appropriate AST2600 configuration and correct the statement in the next revision.

I'll also carry forward Andrew's Reviewed-by trailer for the unchanged MAC0 and MDIO nodes, preserving the scope of his review.

Thanks,
Prasanth

Quoted 24 lines · Tan Siewert

Quoted 6 lines · Prasanth Kumar Padarthi
Add support for the ASRock Rack B650D4U BMC, based on the ASPEED AST2600 SoC.
The series adds the board compatible string and describes the BMC memory, SPI NOR flash layout, UART console, GPIO line names, graphics reserved memory, I2C EEPROM, and MAC0 connected to an RTL8211F Ethernet PHY.
MAC0 obtains its MAC address from the EEPROM on I2C7 and uses RGMII-ID mode.
Quoted 7 lines
Changes in v7:
* Correct the GPIOP bank line names for the reset, power and NMI button/control signals according to the confirmed board mapping.
* Remove the obsolete GPIOF5 reset-button line name.
* Leave the binding patch unchanged.
The B650D4U DTB builds successfully using aspeed_g5_defconfig.
What? The B650D4U has an AST2600, so using aspeed_g5_defconfig means you're using a config set for the AST2*5*00...
Also, please preserve the trailers from previous serieses (i.e. Andrew's Reviewed-by trailer) if you don't change anything significantly for the parts that got reviewed.
Tan

Tan Siewert

2026-09-22 13:27 UTC #8 lore raw

Quoted 11 lines · Prasanth

Hi Tan,
Thank you for catching these issues.
You're correct about the defconfig. I used aspeed_g5_defconfig for the DTB build and incorrectly reported it as validation for the AST2600. I'll rebuild using the appropriate AST2600 configuration and correct the statement in the next revision.
I'll also carry forward Andrew's Reviewed-by trailer for the unchanged MAC0 and MDIO nodes, preserving the scope of his review.

Andrew has already resent the trailer, so no need to send another revision for that.

Tan