gpu: nova-core: populate VF information in GSP_INIT
Subsystems (4)
v3 cover gpu: nova-core: populate VF information in GSP_INIT
This patch supplies VF topology to GSP-RM through GSP_INIT when vGPU mode is enabled, allowing firmware to configure per-VF interrupt and doorbell routing.
This patch depends on the PCI extended capability and SR-IOV support patch, which has already been merged into driver-core-testing.
To avoid conflicts with the series currently under review, this patch is based on a local merge of driver-core-testing into drm-rust-next, with the following series applied on top:
- GSP command-queue preparation v4 [1].
- NVKV codec v4 [2].
- Boot on the r000 GSP firmware v3 [3].
- Channel ID allocation v9 [4], with its cv! v5 prerequisite [5].
Changes since v2 [6]:
- Rebase onto the integrated base and populate VF information through the GSP_INIT NVKV schema.
- Use the merged PCI API's first_vf_offset() accessor and logical VF BAR iterator.
[1] https://lore.kernel.org/nova-gpu/[email protected]/
[2] https://lore.kernel.org/nova-gpu/[email protected]/
[3] https://lore.kernel.org/nova-gpu/[email protected]/
[4] https://lore.kernel.org/nova-gpu/[email protected]/
[5] https://lore.kernel.org/nova-gpu/[email protected]/
[6] https://lore.kernel.org/nova-gpu/[email protected]/
Zhi Wang (1):
gpu: nova-core: populate VF information in GSP_INIT
drivers/gpu/nova-core/gsp/fw/commands.rs | 34 +++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-)
base-commit: a767f1cd2b0da50e0dfc48d7991f55c92369ce6f
PATCH v3 1/1 gpu: nova-core: populate VF information in GSP_INIT
GSP firmware requires the VF BAR layout to route interrupts and doorbell events to individual virtual functions.
When vGPU mode is enabled, read the VF topology from the typed PCI SR-IOV extended capability and populate the existing NVKV VF information schema in GSP_INIT.
--- drivers/gpu/nova-core/gsp/fw/commands.rs | 34 +++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-)
drivers/gpu/nova-core/gsp/fw/commands.rs +33 -1
@@ -225,6 +225,38 @@ struct DomainBusDevice(u64) { ];impl GspInitRequest { +fn build_vf_info ( + dev: &pci::Device <device::Bound >, + vgpu_state:VgpuState , + ) ->Result <Option <VfInfo >> { +let total_vfs =match vgpu_state { +VgpuState ::Disabled =>return Ok (None ), +VgpuState ::Enabled { total_vfs } => total_vfs, + }; + +let sriov = dev + .config_space_extended ()? + .find_ext_capability ::<pci::ExtSriovRegs >()? + .ok_or (ENODEV )?; + +let mut vf_bars = sriov.vf_bars ()?; +let bar0 = vf_bars.next ().ok_or (EINVAL )?; +let bar1 = vf_bars.next ().ok_or (EINVAL )?; +let bar2 = vf_bars.next ().ok_or (EINVAL )?; +let flags = u64::from (bar0.is_64bit) + | (u64::from (bar1.is_64bit) <<1 ) + | (u64::from (bar2.is_64bit) <<2 ); + +Ok (Some (VfInfo { + total_vfs: u32::from (total_vfs.get ()).into (), + first_vf_offset: u32::from (sriov.first_vf_offset ()).into (), + flags: flags.into (), + first_bar0_address: bar0.address.into (), + first_bar1_address: bar1.address.into (), + first_bar2_address: bar2.address.into (), + })) + } +/// Creates the request for `dev`. /// /// The registry keys are [`REGISTRY_ENTRIES`], plus `RMSetSriovMode` when `vgpu_state` reports
@@ -265,7 +297,7 @@ pub(crate) fn new( host_arch: HostArch::host().into(), domain_bus_device: u64::from(domain_bus_device).into(), regkeys, - vf_info: None, + vf_info: Self::build_vf_info(dev, vgpu_state)?, }) } }