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Dev Digest, Vol 14, Issue 5

OpenRISC Philipp Wagner 2 participants 3 messages Jul 18, 2017 – Jul 19, 2017 2 messages not in the archive

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A message that is not in the archive (sent off-list or not yet received): [email protected]

A message that is not in the archive (sent off-list or not yet received): [email protected]

#2 lore raw

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Hello,

Am 18.07.2017 um 17:49 schrieb jallouli kais:

Quoted 2 lines

I know that mor1kx is more perfermant than or1200. But I chose or1200 since it contains a dsp block. Does mor1kx contain a dsp?

what do you mean by a "dsp block"? It's a CPU, after all. The performance is pretty similar IIRC, 1 cycle per instruction for most instructions.

Quoted 2 lines

I just want to test it on an example c soft to verify its working. Can you help me. I am a debutant.

In this case, us or1ksim.

Quoted 1 line

I want to use it later in order to integrate it in network on chip

If you are looking for a system including a NoC you could have a look at OpTiMSoC (https://optimsoc.org).

Philipp

#3 lore raw

For the NoC,we have our NoC.For testing a soft c code;  I  must installing  his toolchain ?Thanks

Le Mardi 18 juillet 2017 17h57, Philipp Wagner <[email protected]> a écrit :

[Please reply to the openrisc mailing list.]

Hello,

Am 18.07.2017 um 17:49 schrieb jallouli kais:

Quoted 2 lines

I know that mor1kx is more perfermant than or1200. But I chose or1200 since it contains a dsp block. Does mor1kx contain a dsp?

what do you mean by a "dsp block"? It's a CPU, after all. The performance is pretty similar IIRC, 1 cycle per instruction for most instructions.

Quoted 2 lines

I just want to test it on an example c soft to verify its working. Can you help me. I am a debutant.

In this case, us or1ksim.

Quoted 1 line

I want to use it later in order to integrate it in network on chip

If you are looking for a system including a NoC you could have a look at OpTiMSoC (https://optimsoc.org).

Philipp

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