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incorrect misalignment handling

Linux-ia64 Zach, Yoav 2 participants 2 messages Aug 12, 2001 – Aug 13, 2001

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Zach, Yoav

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We encountered a problem with the handling of misaligned operations. When handling a misaligned 'stfX' instruction, the kernel uses the function emulate_store_float( ), which practically copies the source to destination byte by byte. The length of the operation is determined according to the instruction's fsz completer, using the float_fsz table:

static const unsigned char float_fsz[4]={
	16, /* extended precision (e) */
	8,  /* integer (8)            */
	4,  /* single precision (s)   */
	8   /* double precision (d)   */
}

The problem is that fsz==e means the operation length is 10 bytes, and not 16 bytes as in the implementation. Attached is a small test case that demonstrates this problem.

My questions are:
* Is there a rationale behind this implementation, or is it just a
mistake ?
* If it is a mistake, was it corrected in kernel versions later than
2.4.3 ?

<<mis64.c>>
TIA,
Yoav.

Yoav Zach
Mail: [email protected]

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Yoav> The problem is that fsz=e means the operation length is 10 Yoav> bytes, and not 16 bytes as in the implementation. Attached is Yoav> a small test case that demonstrates this problem.

Yoav> Is there a rationale behind this implementation, or is it just Yoav> a mistake ?

Looks like a bug to me.

Yoav> * If it is a mistake, was it corrected in kernel versions Yoav> later than 2.4.3 ?

No, you're the first person to report this issue. I'll look into fixing this. The bug also affects the "load" side (you could see a page fault that otherwise you wouldn't see on a CPU that did the unaligned access in hardware).

	--david