New rev 2.1 SDM for Itanium published
All,
The latest SDM rev 2.1 for Itanium is available in Intel's web-site
(http://developer.intel.com/design/itanium/family/, then click on "Software Specifications" in the left-hand bar). This version includes the 3 new instructions:
- atomic ops (16 byte compare and exchange)
- fc.i (flush cache with instruction cache coherent form)
- hint (performance hint)
Thanks,
Asit
Quoted 2 lines · Asit K
This version includes the 3 new instructions:
- atomic ops (16 byte compare and exchange)
I presume this one is not backwards-compatible with existing processor implementations? If so, should this be noted somewhere so that naive people who read the manuals don't assume that it's implemented?
Matt
Quoted 6 lines · Matt
Quoted 2 lines · Asit K
This version includes the 3 new instructions:
- atomic ops (16 byte compare and exchange)I presume this one is not backwards-compatible with existing processor implementations?
Correct.
Quoted 2 lines
If so, should this be noted somewhere so that naive people who read the manuals don't assume that it's implemented?
There is a new "ao" bit in CPUID[4], which as described on p. 1:32, will be 1 only if the new larger atomic ops are implemented. Do you think this is insufficient?
-- Jim
HP IPF Processor Architect
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Quoted 1 line · Jim Hull
If so, should this be noted somewhere so that naive people who read the manuals don't assume that it's implemented?
Jim> There is a new "ao" bit in CPUID[4], which as described on p. 1:32, will Jim> be 1 only if the new larger atomic ops are implemented. Do you think Jim> this is insufficient?
The ao bit seems to have gotten lost in the final version of SDM2.1. It's mentioned (indirectly) in the Document Revision history, but in the CPUID[4] description, only "branchlong" and "spontaneous deferral" show up.
--david
Quoted 4 lines · David
The ao bit seems to have gotten lost in the final version of SDM2.1. It's mentioned (indirectly) in the Document Revision history, but in the CPUID[4] description, only "branchlong" and "spontaneous deferral" show up.
You're right, the "ao" bit is missing from the final public SDM 2.1. I wonder how that happened. I'll check into this and see if I can get it fixed.
-- Jim
Quoted 5 lines · David Mosberger
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Quoted 1 line · Jim Hull
If so, should this be noted somewhere so that naive people who read the manuals don't assume that it's implemented?
Quoted 8 lines
Jim> There is a new "ao" bit in CPUID[4], which as described on p. 1:32, will Jim> be 1 only if the new larger atomic ops are implemented. Do you think Jim> this is insufficient?
The ao bit seems to have gotten lost in the final version of SDM2.1. It's mentioned (indirectly) in the Document Revision history, but in the CPUID[4] description, only "branchlong" and "spontaneous deferral" show up.
Also, seems like the cmp8xchg16 instruction description ought to mention that not all implementations support the instruction. At least, that's what was done for "brl".
Signature · 3 lines
Bjorn Helgaas - bjorn_helgaas at hp.com Linux and Open Source Lab Hewlett-Packard Company