ia64 objdump bug for brl instruction

We found a bug in ia64 objdump that brl instruction was decoded incorrectly. The issue is that the mid 39 bit for the long immediate was incorrectly positioned and resulting in incorrect target branch address for branch long instruction. This bug is on ia64 only. The following patch fixes the issue. (note, it also fixes a spelling error as well :-).

- Ken

@@ -167,10 +167,10 @@
         }
       else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
 	{
-	  /* 60-bit immedate for long branches.  */
+	  /* 60-bit immediate for long branches. */
 	  value = (((insn >> 13) & 0xfffff)
 		   | (((insn >> 36) & 1) << 59)
-		   | (slot[1] << 20)) << 4;
+		   | (((slot[1] >> 2) & 0x7fffffffffLL) << 20)) << 4;
 	}
       else
 	{

Thanks. I checked it into the FSF binutils sources.

Jim